add directory gnu

gnu/gcc/gcc-2.2.2/config/3b1.h

@@ -0,0 +1,498 @@
+/* Definitions of target machine for GNU compiler.
+   AT&T UNIX PC version (pc7300, 3b1)
+
+   Written by Alex Crain
+   bug reports to alex@umbc3.umd.edu
+
+   Copyright (C) 1987 Free Software Foundation, Inc.
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GNU CC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GNU CC; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+#define SGS_SWITCH_TABLES	/* Different switch table handling */
+
+#include "hp320.h"
+
+/* See m68k.h.  0 means 680[01]0 with no 68881.  */
+
+#undef TARGET_DEFAULT
+#define	TARGET_DEFAULT 0
+
+/* -m68020 requires special flags to the assembler.  */
+
+#undef ASM_SPEC
+#define ASM_SPEC "%{m68020:-68020}%{!m68020:-68010} %{m68881:-68881}"
+
+/* we use /lib/libp/lib*  when profiling */
+
+#undef LIB_SPEC
+#define LIB_SPEC "%{!shlib:%{p:-L/lib/libp} %{pg:-L/lib/libp} -lc}"
+
+/* shared libraries need to use crt0s.o  */
+
+#undef STARTFILE_SPEC
+#define STARTFILE_SPEC \
+  "%{!shlib:%{pg:mcrt0.o%s}%{!pg:%{p:mcrt0.o%s}%{!p:crt0.o%s}}}\
+   %{shlib:crt0s.o%s shlib.ifile%s} "
+
+/* cpp has to support a #sccs directive for the /usr/include files */
+
+#define SCCS_DIRECTIVE
+
+/* Make output for SDB.  */
+
+#define SDB_DEBUGGING_INFO
+
+/* The .file command should always begin the output.  */
+
+#undef ASM_FILE_START
+#define ASM_FILE_START(FILE) \
+output_file_directive ((FILE), main_input_filename)
+
+/* Don't try to define `gcc_compiled.' since the assembler might not
+   accept symbols with periods and GDB doesn't run on this machine anyway.  */
+#define ASM_IDENTIFY_GCC(FILE)
+
+/* Define __HAVE_68881__ in preprocessor if -m68881 is specified.
+   This will control the use of inline 68881 insns in certain macros.  */
+
+#undef CPP_SPEC
+#define CPP_SPEC "%{m68881:-D__HAVE_68881__}"
+
+/* Names to predefine in the preprocessor for this target machine.  */
+/* ihnp4!lmayk!lgm@eddie.mit.edu says mc68000 and m68k should not be here.  */
+
+#undef CPP_PREDEFINES
+#define CPP_PREDEFINES "-Dmc68k -Dunix -Dunixpc"
+
+#undef REGISTER_NAMES
+#define REGISTER_NAMES \
+{"%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7",	\
+ "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%fp", "%sp",	\
+ "%f0", "%f1", "%f2", "%f3", "%f4", "%f5", "%f6", "%f7"}
+
+/* Specify how to pad function arguments.
+   Value should be `upward', `downward' or `none'.
+   Same as the default, except no padding for large or variable-size args.  */
+
+#define FUNCTION_ARG_PADDING(MODE, TYPE)				\
+  (((MODE) == BLKmode							\
+    ? ((TYPE) && TREE_CODE (TYPE_SIZE (TYPE)) == INTEGER_CST		\
+       && int_size_in_bytes (TYPE) < PARM_BOUNDARY / BITS_PER_UNIT)	\
+    : GET_MODE_BITSIZE (MODE) < PARM_BOUNDARY)				\
+   ? downward : none)
+
+/* Override part of the obstack macros.  */
+
+#define __PTR_TO_INT(P) ((int)(P))
+#define __INT_TO_PTR(P) ((char *)(P))
+
+/* The 3b1 does not have `atexit'.  */
+
+#undef HAVE_ATEXIT
+
+/* Override parts of m68k.h to fit the SGS-3b1 assembler.  */
+
+#undef TARGET_VERSION
+#undef ASM_FORMAT_PRIVATE_NAME
+#undef ASM_OUTPUT_DOUBLE
+#undef ASM_OUTPUT_FLOAT
+#undef ASM_OUTPUT_ALIGN
+#undef ASM_OUTPUT_SOURCE_FILENAME
+#undef ASM_OUTPUT_SOURCE_LINE
+#undef PRINT_OPERAND_ADDRESS
+#undef ASM_GENERATE_INTERNAL_LABEL
+#undef FUNCTION_PROFILER
+#undef ASM_OUTPUT_ADDR_VEC_ELT
+#undef ASM_OUTPUT_ADDR_DIFF_ELT
+#undef ASM_OUTPUT_INTERNAL_LABEL
+#undef ASM_OUTPUT_OPCODE
+#undef ASM_OUTPUT_LOCAL
+#undef ASM_OUTPUT_LABELREF
+#undef ASM_OUTPUT_ASCII
+
+#define TARGET_VERSION fprintf (stderr, " (68k, SGS/AT&T unixpc syntax)");
+
+/* Store in OUTPUT a string (made with alloca) containing
+   an assembler-name for a local static variable named NAME.
+   LABELNO is an integer which is different for each call.  */
+
+#define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO)	\
+( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 12),	\
+  sprintf ((OUTPUT), "%s_%%%d", (NAME), (LABELNO)))
+
+/* The unixpc doesn't know about double's and float's */
+
+#define ASM_OUTPUT_DOUBLE(FILE,VALUE)  \
+do { union { double d; long l[2]; } tem;		\
+     tem.d = (VALUE);					\
+     fprintf(FILE, "\tlong 0x%x,0x%x\n", tem.l[0], tem.l[1]); \
+   } while (0)
+
+#define ASM_OUTPUT_FLOAT(FILE,VALUE)  \
+do { union { float f; long l;} tem;			\
+     tem.f = (VALUE);					\
+     fprintf (FILE, "\tlong 0x%x\n", tem.l);	\
+   } while (0)
+
+#define ASM_OUTPUT_ALIGN(FILE,LOG)	\
+  if ((LOG) == 1)			\
+    fprintf (FILE, "\teven\n");	\
+  else if ((LOG) != 0)			\
+    abort ();
+
+/* This is how to output an assembler line
+   that says to advance the location counter by SIZE bytes.  */
+
+#undef ASM_OUTPUT_SKIP
+#define ASM_OUTPUT_SKIP(FILE,SIZE)  \
+  fprintf (FILE, "\tspace %d\n", (SIZE))
+
+/* Can't use ASM_OUTPUT_SKIP in text section; it doesn't leave 0s.  */
+
+#define ASM_NO_SKIP_IN_TEXT 1
+
+/* The beginnings of sdb support... */
+
+#define ASM_OUTPUT_SOURCE_FILENAME(FILE, FILENAME) \
+  fprintf (FILE, "\tfile\t\"%s\"\n", FILENAME)
+
+#define ASM_OUTPUT_SOURCE_LINE(FILE, LINENO)	\
+  fprintf (FILE, "\tln\t%d\n",			\
+	   (sdb_begin_function_line		\
+	    ? last_linenum - sdb_begin_function_line : 1))
+
+/* Yet another null terminated string format. */
+
+#define ASM_OUTPUT_ASCII(FILE,PTR,LEN) \
+  { register int sp = 0, lp = 0; \
+    fprintf ((FILE), "\tbyte\t"); \
+  loop: \
+    if ((PTR)[sp] > ' ' && ! ((PTR)[sp] & 0x80) && (PTR)[sp] != '\\') \
+      { lp += 3; \
+	fprintf ((FILE), "'%c", (PTR)[sp]); } \
+    else \
+      { lp += 5; \
+	fprintf ((FILE), "0x%x", (PTR)[sp]); } \
+    if (++sp < (LEN)) \
+      {	if (lp > 60) \
+	  { lp = 0; \
+	    fprintf ((FILE), "\n\t%s ", ASCII_DATA_ASM_OP); }	\
+	else \
+	  putc (',', (FILE)); \
+	goto loop; } \
+    putc ('\n', (FILE)); }
+
+/* Note that in the case of the movhi which fetches an element of
+   an ADDR_DIFF_VEC the offset output is too large by 2.
+   This is because the 3b1 assembler refuses to subtract 2.
+   ASM_OUTPUT_CASE_LABEL, below, compensates for this.  */
+
+#define PRINT_OPERAND_ADDRESS(FILE, ADDR)  \
+{ register rtx reg1, reg2, breg, ireg;					\
+  register rtx addr = ADDR;						\
+  rtx offset;								\
+  switch (GET_CODE (addr))						\
+    {									\
+    case REG:								\
+      fprintf (FILE, "(%s)", reg_names[REGNO (addr)]);			\
+      break;								\
+    case PRE_DEC:							\
+      fprintf (FILE, "-(%s)", reg_names[REGNO (XEXP (addr, 0))]);	\
+      break;								\
+    case POST_INC:							\
+      fprintf (FILE, "(%s)+", reg_names[REGNO (XEXP (addr, 0))]);	\
+      break;								\
+    case PLUS:								\
+      reg1 = 0;	reg2 = 0;						\
+      ireg = 0;	breg = 0;						\
+      offset = 0;							\
+      if (CONSTANT_ADDRESS_P (XEXP (addr, 0)))				\
+	{								\
+	  offset = XEXP (addr, 0);					\
+	  addr = XEXP (addr, 1);					\
+	}								\
+      else if (CONSTANT_ADDRESS_P (XEXP (addr, 1)))			\
+	{								\
+	  offset = XEXP (addr, 1);					\
+	  addr = XEXP (addr, 0);					\
+	}								\
+      if (GET_CODE (addr) != PLUS) ;					\
+      else if (GET_CODE (XEXP (addr, 0)) == SIGN_EXTEND)		\
+	{								\
+	  reg1 = XEXP (addr, 0);					\
+	  addr = XEXP (addr, 1);					\
+	}								\
+      else if (GET_CODE (XEXP (addr, 1)) == SIGN_EXTEND)		\
+	{								\
+	  reg1 = XEXP (addr, 1);					\
+	  addr = XEXP (addr, 0);					\
+	}								\
+      else if (GET_CODE (XEXP (addr, 0)) == MULT)			\
+	{								\
+	  reg1 = XEXP (addr, 0);					\
+	  addr = XEXP (addr, 1);					\
+	}								\
+      else if (GET_CODE (XEXP (addr, 1)) == MULT)			\
+	{								\
+	  reg1 = XEXP (addr, 1);					\
+	  addr = XEXP (addr, 0);					\
+	}								\
+      else if (GET_CODE (XEXP (addr, 0)) == REG)			\
+	{								\
+	  reg1 = XEXP (addr, 0);					\
+	  addr = XEXP (addr, 1);					\
+	}								\
+      else if (GET_CODE (XEXP (addr, 1)) == REG)			\
+	{								\
+	  reg1 = XEXP (addr, 1);					\
+	  addr = XEXP (addr, 0);					\
+	}								\
+      if (GET_CODE (addr) == REG || GET_CODE (addr) == MULT		\
+	  || GET_CODE (addr) == SIGN_EXTEND)				\
+	{ if (reg1 == 0) reg1 = addr; else reg2 = addr; addr = 0; }	\
+/*  for OLD_INDEXING							\
+      else if (GET_CODE (addr) == PLUS)					\
+	{								\
+	  if (GET_CODE (XEXP (addr, 0)) == REG)				\
+	    {								\
+	      reg2 = XEXP (addr, 0);					\
+	      addr = XEXP (addr, 1);					\
+	    }								\
+	  else if (GET_CODE (XEXP (addr, 1)) == REG)			\
+	    {								\
+	      reg2 = XEXP (addr, 1);					\
+	      addr = XEXP (addr, 0);					\
+	    }								\
+	}								\
+  */									\
+      if (offset != 0) { if (addr != 0) abort (); addr = offset; }	\
+      if ((reg1 && (GET_CODE (reg1) == SIGN_EXTEND			\
+		    || GET_CODE (reg1) == MULT))			\
+	  || (reg2 != 0 && REGNO_OK_FOR_BASE_P (REGNO (reg2))))		\
+	{ breg = reg2; ireg = reg1; }					\
+      else if (reg1 != 0 && REGNO_OK_FOR_BASE_P (REGNO (reg1)))		\
+	{ breg = reg1; ireg = reg2; }					\
+      if (ireg != 0 && breg == 0 && GET_CODE (addr) == LABEL_REF)	\
+        { int scale = 1;						\
+	  if (GET_CODE (ireg) == MULT)					\
+	    { scale = INTVAL (XEXP (ireg, 1));				\
+	      ireg = XEXP (ireg, 0); }					\
+	  if (GET_CODE (ireg) == SIGN_EXTEND)				\
+	    fprintf (FILE, "LD%%%d(%%pc,%s.w",				\
+		     CODE_LABEL_NUMBER (XEXP (addr, 0)),		\
+		     reg_names[REGNO (XEXP (ireg, 0))]); 		\
+	  else								\
+	    fprintf (FILE, "LD%%%d(%%pc,%s.l",				\
+		     CODE_LABEL_NUMBER (XEXP (addr, 0)),		\
+		     reg_names[REGNO (ireg)]);				\
+	  if (scale != 1) fprintf (FILE, "*%d", scale);			\
+	  fprintf (FILE, ")");						\
+	  break; }							\
+      if (breg != 0 && ireg == 0 && GET_CODE (addr) == LABEL_REF)	\
+        { fprintf (FILE, "LD%%%d(%%pc,%s.l",				\
+		   CODE_LABEL_NUMBER (XEXP (addr, 0)),			\
+		   reg_names[REGNO (breg)]);				\
+	  putc (')', FILE);						\
+	  break; }							\
+      if (ireg != 0 || breg != 0)					\
+	{ int scale = 1;						\
+	  if (breg == 0)						\
+	    abort ();							\
+	  if (addr != 0)						\
+	    output_addr_const (FILE, addr);				\
+	  fprintf (FILE, "(%s", reg_names[REGNO (breg)]);		\
+	  if (ireg != 0)					        \
+	    putc (',', FILE);						\
+	  if (ireg != 0 && GET_CODE (ireg) == MULT)			\
+	    { scale = INTVAL (XEXP (ireg, 1));				\
+	      ireg = XEXP (ireg, 0); }					\
+	  if (ireg != 0 && GET_CODE (ireg) == SIGN_EXTEND)		\
+	    fprintf (FILE, "%s.w", reg_names[REGNO (XEXP (ireg, 0))]);	\
+	  else if (ireg != 0)						\
+	    fprintf (FILE, "%s.l", reg_names[REGNO (ireg)]);		\
+	  if (scale != 1) fprintf (FILE, "*%d", scale);			\
+	  putc (')', FILE);						\
+	  break;							\
+	}								\
+      else if (reg1 != 0 && GET_CODE (addr) == LABEL_REF)		\
+	{ fprintf (FILE, "LD%%%d(%%pc,%s.w)",				\
+		   CODE_LABEL_NUMBER (XEXP (addr, 0)),			\
+		   reg_names[REGNO (reg1)]);				\
+	  break; }							\
+    default:								\
+      if (GET_CODE (addr) == CONST_INT					\
+	  && INTVAL (addr) < 0x8000					\
+	  && INTVAL (addr) >= -0x8000)					\
+	fprintf (FILE, "%d", INTVAL (addr));				\
+      else								\
+        output_addr_const (FILE, addr);					\
+    }}
+
+#define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM)	\
+  sprintf ((LABEL), "%s%%%d", (PREFIX), (NUM))
+
+#define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM)	\
+    fprintf (FILE, "%s%%%d:\n", PREFIX, NUM)
+
+/* Must put address in  %a0 , not  %d0 . -- LGM, 7/15/88 */
+#define FUNCTION_PROFILER(FILE, LABEL_NO)	\
+    fprintf (FILE, "\tmov.l &LP%%%d,%%a0\n\tjsr mcount\n", (LABEL_NO))
+
+#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE)	\
+    fprintf (FILE, "\tlong L%%%d\n", (VALUE))
+
+#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL)	\
+    fprintf (FILE, "\tshort L%%%d-L%%%d\n", (VALUE), (REL))
+
+/* ihnp4!lmayk!lgm says that `short 0' triggers assembler bug;
+   `short L%nn-L%nn' supposedly works.  */
+#define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLE)			\
+  if (! RTX_INTEGRATED_P (TABLE))					\
+    fprintf (FILE, "\tswbeg &%d\n%s%%%d:\n",				\
+	     XVECLEN (PATTERN (TABLE), 1), (PREFIX), (NUM));		\
+  else									\
+    fprintf (FILE, "\tswbeg &%d\n%s%%%d:\n\tshort %s%%%d-%s%%%d\n",	\
+	     XVECLEN (PATTERN (TABLE), 1) + 1, (PREFIX), (NUM),		\
+	     (PREFIX), (NUM), (PREFIX), (NUM))
+
+/* At end of a switch table, define LDnnn iff the symbol LInnn was defined.
+   Some SGS assemblers have a bug such that "Lnnn-LInnn-2.b(pc,d0.l*2)"
+   fails to assemble.  Luckily "LDnnn(pc,d0.l*2)" produces the results
+   we want.  This difference can be accommodated by making the assembler
+   define such "LDnnn" to be either "Lnnn-LInnn-2.b", "Lnnn", or any other
+   string, as necessary.  This is accomplished via the ASM_OUTPUT_CASE_END
+   macro. */
+
+#define ASM_OUTPUT_CASE_END(FILE,NUM,TABLE)				\
+{ if (switch_table_difference_label_flag)				\
+    fprintf (FILE, "\tset LD%%%d,L%%%d-LI%%%d\n", (NUM), (NUM), (NUM))	\
+  switch_table_difference_label_flag = 0; }
+
+int switch_table_difference_label_flag;
+
+#define ASM_OUTPUT_OPCODE(FILE, PTR)			\
+{ if ((PTR)[0] == 'j' && (PTR)[1] == 'b')		\
+    { ++(PTR);						\
+      while (*(PTR) != ' ')				\
+	{ putc (*(PTR), (FILE)); ++(PTR); }		\
+      fprintf ((FILE), ".w"); }				\
+  else if ((PTR)[0] == 's')				\
+    {							\
+      if (!strncmp ((PTR), "swap", 4))			\
+	{ fprintf ((FILE), "swap.w"); (PTR) += 4; }	\
+    }							\
+  else if ((PTR)[0] == 'f')				\
+    {							\
+      if (!strncmp ((PTR), "fmove", 5))			\
+	{ fprintf ((FILE), "fmov"); (PTR) += 5; }	\
+      else if (!strncmp ((PTR), "fbne", 4))		\
+	{ fprintf ((FILE), "fbneq"); (PTR) += 4; }	\
+    }							\
+/* MOVE, MOVEA, MOVEQ, MOVEC ==> MOV	*/		\
+  else if ((PTR)[0] == 'm' && (PTR)[1] == 'o'		\
+	   && (PTR)[2] == 'v' && (PTR)[3] == 'e')	\
+    { fprintf ((FILE), "mov"); (PTR) += 4;		\
+       if ((PTR)[0] == 'q' || (PTR)[0] == 'a'		\
+	   || (PTR)[0] == 'c') (PTR)++; }		\
+/* SUB, SUBQ, SUBA, SUBI ==> SUB */			\
+  else if ((PTR)[0] == 's' && (PTR)[1] == 'u' 		\
+	   && (PTR)[2] == 'b')				\
+    { fprintf ((FILE), "sub"); (PTR) += 3;		\
+       if ((PTR)[0] == 'q' || (PTR)[0] == 'i'	 	\
+	   || (PTR)[0] == 'a') (PTR)++; }		\
+/* CMP, CMPA, CMPI, CMPM ==> CMP	*/		\
+  else if ((PTR)[0] == 'c' && (PTR)[1] == 'm'		\
+	   && (PTR)[2] == 'p')				\
+    { fprintf ((FILE), "cmp"); (PTR) += 3;		\
+       if ((PTR)[0] == 'a' || (PTR)[0] == 'i'	 	\
+	   || (PTR)[0] == 'm') (PTR)++; }		\
+}
+
+#define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED)  \
+( fputs ("\tlcomm ", (FILE)),			\
+  assemble_name ((FILE), (NAME)),		\
+  fprintf ((FILE), ",%u\n", (ROUNDED)))
+
+#define ASM_OUTPUT_LABELREF(FILE,NAME)	\
+  fprintf (FILE, "%s", NAME)
+
+/* Override usual definitions of SDB output macros.
+   These definitions differ only in the absence of the period
+   at the beginning of the name of the directive
+   and in the use of `~' as the symbol for the current location.  */
+
+#define PUT_SDB_SCL(a) fprintf(asm_out_file, "\tscl\t%d;", (a))
+#define PUT_SDB_INT_VAL(a) fprintf (asm_out_file, "\tval\t%d;", (a))
+#define PUT_SDB_VAL(a)				\
+( fputs ("\tval\t", asm_out_file),		\
+  output_addr_const (asm_out_file, (a)),	\
+  fputc (';', asm_out_file))
+
+#define PUT_SDB_DEF(a)				\
+do { fprintf (asm_out_file, "\tdef\t");	\
+     ASM_OUTPUT_LABELREF (asm_out_file, a); 	\
+     fprintf (asm_out_file, ";"); } while (0)
+
+#define PUT_SDB_PLAIN_DEF(a) fprintf(asm_out_file,"\tdef\t~%s;",a)
+#define PUT_SDB_ENDEF fputs("\tendef\n", asm_out_file)
+#define PUT_SDB_TYPE(a) fprintf(asm_out_file, "\ttype\t0%o;", a)
+#define PUT_SDB_SIZE(a) fprintf(asm_out_file, "\tsize\t%d;", a)
+#define PUT_SDB_START_DIM fprintf(asm_out_file, "\tdim\t")
+
+#define PUT_SDB_TAG(a)				\
+do { fprintf (asm_out_file, "\ttag\t");	\
+     ASM_OUTPUT_LABELREF (asm_out_file, a);	\
+     fprintf (asm_out_file, ";"); } while (0)
+
+#define PUT_SDB_BLOCK_START(LINE)		\
+  fprintf (asm_out_file,			\
+	   "\tdef\t~bb;\tval\t~;\tscl\t100;\tline\t%d;\tendef\n",	\
+	   (LINE))
+
+#define PUT_SDB_BLOCK_END(LINE)			\
+  fprintf (asm_out_file,			\
+	   "\tdef\t~eb;\tval\t~;\tscl\t100;\tline\t%d;\tendef\n",	\
+	   (LINE))
+
+#define PUT_SDB_FUNCTION_START(LINE)		\
+  fprintf (asm_out_file,			\
+	   "\tdef\t~bf;\tval\t~;\tscl\t101;\tline\t%d;\tendef\n",	\
+	   (LINE))
+
+#define PUT_SDB_FUNCTION_END(LINE)		\
+  fprintf (asm_out_file,			\
+	   "\tdef\t~ef;\tval\t~;\tscl\t101;\tline\t%d;\tendef\n",	\
+	   (LINE))
+
+#define PUT_SDB_EPILOGUE_END(NAME)		\
+  fprintf (asm_out_file,			\
+	   "\tdef\t%s;\tval\t~;\tscl\t-1;\tendef\n",	\
+	   (NAME))
+
+#define SDB_GENERATE_FAKE(BUFFER, NUMBER) \
+  sprintf ((BUFFER), "~%dfake", (NUMBER));
+
+/* Define subroutines to call to handle multiply, divide, and remainder.
+   Use the subroutines that the 3b1's library provides.
+   The `*' prevents an underscore from being prepended by the compiler.  */
+
+#define DIVSI3_LIBCALL "*ldiv"
+#define UDIVSI3_LIBCALL "*uldiv"
+#define MODSI3_LIBCALL "*lrem"
+#define UMODSI3_LIBCALL "*ulrem"
+#define MULSI3_LIBCALL "*lmul"
+#define UMULSI3_LIBCALL "*ulmul"

gnu/gcc/gcc-2.2.2/config/3b1g.h

@@ -0,0 +1,63 @@
+/* Definitions of target machine for GNU compiler, for a 3b1 using GAS.
+   Copyright (C) 1987, 1988 Free Software Foundation, Inc.
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GNU CC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GNU CC; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+#include "m68k.h"
+
+/* See m68k.h.  0 means 68000 with no 68881.  */
+#define TARGET_DEFAULT 0
+
+/* Define __HAVE_68881 in preprocessor only if -m68881 is specified.
+   This will control the use of inline 68881 insns in certain macros.
+   Also inform the program which CPU this is for.  */
+#define CPP_SPEC "%{m68881:-D__HAVE_68881__} \
+%{!ansi:%{m68020:-Dmc68020}%{mc68020:-Dmc68020}%{!mc68020:%{!m68020:-Dmc68010}}}"
+
+/* -m68020 requires special flags to the assembler.  */
+#define ASM_SPEC \
+ "%{m68020:-mc68020}%{mc68020:-mc68020}%{!mc68020:%{!m68020:-mc68010}}"
+
+/* Names to predefine in the preprocessor for this target machine.  */
+#define CPP_PREDEFINES "-Dmc68000 -Dmc68k -Dunix -Dunixpc"
+
+/* This is (not really) BSD, so (but) it wants DBX format.  */
+#define DBX_DEBUGGING_INFO
+
+/* Brain damage. */
+#define SCCS_DIRECTIVE
+
+/* Specify how to pad function arguments.
+   Value should be `upward', `downward' or `none'.
+   Same as the default, except no padding for large or variable-size args.  */
+#define FUNCTION_ARG_PADDING(MODE, TYPE)				\
+  (((MODE) == BLKmode							\
+    ? ((TYPE) && TREE_CODE (TYPE_SIZE (TYPE))	== INTEGER_CST		\
+       && int_size_in_bytes (TYPE) < PARM_BOUNDARY / BITS_PER_UNIT)	\
+    : GET_MODE_BITSIZE (MODE) < PARM_BOUNDARY)				\
+   ? downward : none)
+
+/* Override part of the obstack macros.  */
+#define __PTR_TO_INT(P) ((int)(P))
+#define __INT_TO_PTR(P) ((char *)(P))
+
+/* Every structure or union's size must be a multiple of 2 bytes.  */
+#define STRUCTURE_SIZE_BOUNDARY 16
+
+/* Generate calls to memcpy, memcmp and memset.  */
+#define TARGET_MEM_FUNCTIONS
+

gnu/gcc/gcc-2.2.2/config/a29kunix.h

@@ -0,0 +1,63 @@
+/* Definitions of target machine for GNU compiler, for AMD Am29000 CPU, Unix.
+   Copyright (C) 1991 Free Software Foundation, Inc.
+   Contributed by Richard Kenner (kenner@nyu.edu)
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GNU CC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GNU CC; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+
+/* This is mostly the same as a29k.h, except that we define unix instead of
+   EPI and define unix-style machine names.  */
+
+#include "a29k.h"
+
+/* Set our default target to be the 29050; that is the more interesting chip
+   for Unix systems.  */
+
+#undef TARGET_DEFAULT
+#define TARGET_DEFAULT (1+2+8+64)
+
+#undef CPP_PREDEFINES
+#define CPP_PREDEFINES "-Dam29k -Da29k -Dam29000"
+
+#undef CPP_SPEC
+#define CPP_SPEC "%{!m29000:-Dam29050 -D__am29050__}"
+
+#undef LINK_SPEC
+#define LINK_SPEC "-c /usr/lib/default.ld"
+
+/* We can't say "-lgcc" due to a bug in gld for now.  */
+#define LINK_LIBGCC_SPECIAL
+
+/* For some systems, it is best if double-word objects are aligned on a 
+   doubleword boundary.  We want to maintain compatibility with MetaWare in
+   a29k.h, but do not feel constrained to do so here.  */
+
+#undef BIGGEST_ALIGNMENT
+#define BIGGEST_ALIGNMENT 64
+
+#if 0 /* This would be needed except that the 29k doesn't have strict
+	 alignment requirements.  */
+
+#define FUNCTION_ARG_BOUNDARY(MODE, TYPE)				\
+  (((TYPE) != 0)							\
+	? ((TYPE_ALIGN(TYPE) <= PARM_BOUNDARY)				\
+		? PARM_BOUNDARY						\
+		: TYPE_ALIGN(TYPE))					\
+	: ((GET_MODE_ALIGNMENT(MODE) <= PARM_BOUNDARY)			\
+		? PARM_BOUNDARY						\
+		: GET_MODE_ALIGNMENT(MODE)))
+#endif

gnu/gcc/gcc-2.2.2/config/aix386.h

@@ -0,0 +1,129 @@
+/* Definitions for IBM PS2 running AIX/386.
+   From: Minh Tran-Le <TRANLE@intellicorp.com>
+   Copyright (C) 1988 Free Software Foundation, Inc.
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GNU CC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GNU CC; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+
+#include "i386.h"
+
+/* Get the generic definitions for system V.3.  */
+
+#include "svr3.h"
+
+/* Use the ATT assembler syntax.
+   This overrides at least one macro (ASM_OUTPUT_LABELREF) from svr3.h.  */
+
+#include "att386.h"
+
+/* By default, target has a 80387.  */
+
+#define TARGET_DEFAULT 1
+
+/* Use crt1.o as a startup file and crtn.o as a closing file.  */
+
+#define STARTFILE_SPEC  \
+  "%{pg:gcrt1.o%s}%{!pg:%{p:mcrt1.o%s}%{!p:crt1.o%s}} crtbegin.o%s"
+
+#define LIB_SPEC "%{p:-L/usr/lib/libp}%{pg:-L/usr/lib/libp} -lc \
+  crtend.o%s crtn.o%s"
+
+/* Special flags for the linker.  I don't know what they do.  */
+
+#define LINK_SPEC "%{K} %{!K:-K} %{T*} %{z:-lm}"
+
+/* Specify predefined symbols in preprocessor.  */
+
+#define CPP_PREDEFINES "-D_I386 -Di386 -DAIX -D_AIX"
+
+/* special flags for the aix assembler to generate the short form for all
+   qualifying forward reference */
+
+#define ASM_SPEC "-s2"
+
+#undef ASM_FILE_START
+#define ASM_FILE_START(FILE) 					\
+  do { fprintf (FILE, "\t.file\t\"%s\"\n", dump_base_name);	\
+       if (optimize)						\
+          ASM_FILE_START_1 (FILE); 				\
+       else							\
+          fprintf (FILE, "\t.noopt\n");				\
+     } while (0)
+
+/* This was suggested, but it shouldn't be right for DBX output. -- RMS
+   #define ASM_OUTPUT_SOURCE_FILENAME(FILE, NAME) */
+
+/* Writing `int' for a bitfield forces int alignment for the structure.  */
+
+#define PCC_BITFIELD_TYPE_MATTERS 1
+
+#if 0
+/* Don't write a `.optim' pseudo; this assembler
+   is said to have a bug when .optim is used.  */
+
+#undef ASM_FILE_START_1
+#define ASM_FILE_START_1(FILE) fprintf (FILE, "\t.noopt\n");
+#endif
+
+/* Machines that use the AT&T assembler syntax
+   also return floating point values in an FP register.  */
+/* Define how to find the value returned by a function.
+   VALTYPE is the data type of the value (as a tree).
+   If the precise function being called is known, FUNC is its FUNCTION_DECL;
+   otherwise, FUNC is 0.  */
+
+#define VALUE_REGNO(MODE) \
+  (((MODE)==SFmode || (MODE)==DFmode) ? FIRST_FLOAT_REG : 0)
+
+/* 1 if N is a possible register number for a function value. */
+
+#define FUNCTION_VALUE_REGNO_P(N) ((N) == 0 || (N)== FIRST_FLOAT_REG)
+
+/* Output assembler code to FILE to increment profiler label # LABELNO
+   for profiling a function entry.  */
+
+#undef FUNCTION_PROFILER
+#define FUNCTION_PROFILER(FILE, LABELNO)  \
+   fprintf (FILE, "\tleal %sP%d,%%eax\n\tcall mcount\n", LPREFIX, (LABELNO));
+
+/* Note that using bss_section here caused errors
+   in building shared libraries on system V.3.
+   but AIX 1.2 does not have yet shareable libraries on PS2 */
+#undef ASM_OUTPUT_LOCAL
+#define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED)  \
+  (bss_section (),					\
+   ASM_OUTPUT_LABEL ((FILE), (NAME)),			\
+   fprintf ((FILE), "\t.set .,.+%u\n", (ROUNDED)))
+
+/* Define a few machine-specific details of the implementation of
+   constructors.  */
+
+#undef INIT_SECTION_ASM_OP
+#define INIT_SECTION_ASM_OP     ".section .init,\"x\""
+
+#define CTOR_LIST_BEGIN				\
+  asm (INIT_SECTION_ASM_OP);			\
+  asm ("pushl $0")
+#define CTOR_LIST_END CTOR_LIST_BEGIN
+
+#define ASM_OUTPUT_CONSTRUCTOR(FILE,NAME)	\
+  do {						\
+    init_section ();				\
+    fprintf (FILE, "\tpushl $");		\
+    assemble_name (FILE, NAME);			\
+    fprintf (FILE, "\n");			\
+  } while (0)

gnu/gcc/gcc-2.2.2/config/altos3068.h

@@ -0,0 +1,107 @@
+/* Definitions of target machine for GNU compiler.  Altos 3068 68020 version.
+   Copyright (C) 1988,1989 Free Software Foundation, Inc.
+
+Written by Jyrki Kuoppala <jkp@cs.hut.fi>
+Last modified: Mon Mar  6 22:47:58 1989
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GNU CC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GNU CC; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+
+#include "m68k.h"
+
+/* See m68k.h.  7 means 68020 with 68881.  */
+/* 5 is without 68881.  Change to 7 if you have 68881 */
+
+#ifndef TARGET_DEFAULT
+#define TARGET_DEFAULT 5
+#endif
+
+/* Define __HAVE_68881__ in preprocessor,
+   according to the -m flags.
+   This will control the use of inline 68881 insns in certain macros.
+   Also inform the program which CPU this is for.  */
+
+#if TARGET_DEFAULT & 02
+
+/* -m68881 is the default */
+#define CPP_SPEC \
+"%{!msoft-float:-D__HAVE_68881__ }\
+%{!ansi:%{m68000:-Dmc68010}%{mc68000:-Dmc68010}%{!mc68000:%{!m68000:-Dmc68020}}}"
+
+#else
+
+/* -msoft-float is the default */
+#define CPP_SPEC \
+"%{m68881:-D__HAVE_68881__ }\
+%{!ansi:%{m68000:-Dmc68010}%{mc68000:-Dmc68010}%{!mc68000:%{!m68000:-Dmc68020}}}"
+
+#endif
+
+/* -m68000 requires special flags to the assembler.  */
+
+#define ASM_SPEC \
+ "%{m68000:-mc68010}%{mc68000:-mc68010}%{!mc68000:%{!m68000:-mc68020}}"
+
+/* Names to predefine in the preprocessor for this target machine.  */
+
+#define CPP_PREDEFINES "-Dmc68000 -DPORTAR -Dmc68k32 -Uvax -Dm68k -Dunix"
+
+/* Every structure or union's size must be a multiple of 2 bytes.  */
+
+#define STRUCTURE_SIZE_BOUNDARY 16
+
+/* Generate calls to memcpy, memcmp and memset.  */
+#define TARGET_MEM_FUNCTIONS
+
+/* We use gnu assembler, linker and gdb, so we want DBX format.  */
+
+#define DBX_DEBUGGING_INFO
+
+/* Tell some conditionals we will use GAS.  Is this really used?  */
+
+#define USE_GAS
+
+/* This is how to output an assembler line defining a `double' constant.  */
+
+#undef ASM_OUTPUT_DOUBLE
+#define ASM_OUTPUT_DOUBLE(FILE,VALUE)                    \
+     fprintf (FILE, "\t.double 0r%.20e\n", (VALUE))
+
+/* This is how to output an assembler line defining a `float' constant.  */
+
+#undef ASM_OUTPUT_FLOAT
+#define ASM_OUTPUT_FLOAT(FILE,VALUE)                    \
+     fprintf (FILE, "\t.single 0r%.20e\n", (VALUE))
+
+#undef ASM_OUTPUT_FLOAT_OPERAND
+#define ASM_OUTPUT_FLOAT_OPERAND(FILE,VALUE)                \
+     fprintf (FILE, "#0r%.9g", (VALUE))
+
+#undef ASM_OUTPUT_DOUBLE_OPERAND
+#define ASM_OUTPUT_DOUBLE_OPERAND(FILE,VALUE)                \
+     fprintf (FILE, "#0r%.20g", (VALUE))
+
+/* Return pointer values in both d0 and a0.  */
+
+#undef FUNCTION_EXTRA_EPILOGUE
+#define FUNCTION_EXTRA_EPILOGUE(FILE, SIZE)			\
+{								\
+  extern int current_function_returns_pointer;			\
+  if ((current_function_returns_pointer) && 			\
+      ! find_equiv_reg (0, get_last_insn (), 0, 0, 0, 8, Pmode))\
+    fprintf (FILE, "\tmovel d0,a0\n");				\
+}

gnu/gcc/gcc-2.2.2/config/amix.h

@@ -0,0 +1,125 @@
+/* Definitions of target machine for GNU compiler.
+   Commodore Amiga A3000UX version.
+
+   Copyright (C) 1991 Free Software Foundation, Inc.
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 1, or (at your option)
+any later version.
+
+GNU CC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GNU CC; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+#include "m68kv4.h"
+
+/* Alter assembler syntax for fsgldiv.  */
+
+#define FSGLDIV_USE_S
+
+/* Names to predefine in the preprocessor for this target machine.  For the
+   Amiga, these definitions match those of the native AT&T compiler.  Note
+   that we override the definition in m68kv4.h, where SVR4 is defined and
+   AMIX isn't. */
+
+#undef CPP_PREDEFINES
+#define CPP_PREDEFINES \
+  "-Dm68k -Dunix -DAMIX -Amachine(m68k) -Acpu(m68k) -Asystem(unix) -Alint(off)"
+
+/* This is the library routine that is used to transfer control from
+   the trampoline to the actual nested function.  FIXME:  This needs to
+   be implemented still.  -fnf */
+
+#undef TRANSFER_FROM_TRAMPOLINE
+
+/* At end of a switch table, define LDnnn iff the symbol LInnn was defined.
+   Some SGS assemblers have a bug such that "Lnnn-LInnn-2.b(pc,d0.l*2)"
+   fails to assemble.  Luckily "Lnnn(pc,d0.l*2)" produces the results
+   we want.  This difference can be accommodated by making the assembler
+   define such "LDnnn" to be either "Lnnn-LInnn-2.b", "Lnnn", or any other
+   string, as necessary.  This is accomplished via the ASM_OUTPUT_CASE_END
+   macro. (the Amiga assembler has this bug) */
+
+#undef ASM_OUTPUT_CASE_END
+#define ASM_OUTPUT_CASE_END(FILE,NUM,TABLE)				\
+do {									\
+  if (switch_table_difference_label_flag)				\
+    asm_fprintf ((FILE), "%s %LLD%d,%LL%d\n", SET_ASM_OP, (NUM), (NUM));\
+  switch_table_difference_label_flag = 0;				\
+} while (0)
+
+int switch_table_difference_label_flag;
+
+/* This says how to output assembler code to declare an
+   uninitialized external linkage data object.  Under SVR4,
+   the linker seems to want the alignment of data objects
+   to depend on their types.  We do exactly that here.
+   [This macro overrides the one in svr4.h because the amix assembler
+    has a minimum default alignment of 4, and will not accept any
+    explicit alignment smaller than this.  -fnf] */
+
+#undef ASM_OUTPUT_ALIGNED_COMMON
+#define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGN)		\
+do {									\
+  fputs ("\t.comm\t", (FILE));						\
+  assemble_name ((FILE), (NAME));					\
+  fprintf ((FILE), ",%u,%u\n", (SIZE), MAX ((ALIGN) / BITS_PER_UNIT, 4)); \
+} while (0)
+
+/* This says how to output assembler code to declare an
+   uninitialized internal linkage data object.  Under SVR4,
+   the linker seems to want the alignment of data objects
+   to depend on their types.  We do exactly that here.
+   [This macro overrides the one in svr4.h because the amix assembler
+    has a minimum default alignment of 4, and will not accept any
+    explicit alignment smaller than this.  -fnf] */
+
+#undef ASM_OUTPUT_ALIGNED_LOCAL
+#define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGN)		\
+do {									\
+  fprintf ((FILE), "%s\t%s,%u,%u\n",					\
+	   BSS_ASM_OP, (NAME), (SIZE), MAX ((ALIGN) / BITS_PER_UNIT, 4)); \
+} while (0)
+
+/* This definition of ASM_OUTPUT_ASCII is the same as the one in m68ksgs.h,
+   which has been overridden by the one in svr4.h.  However, we can't use
+   the one in svr4.h because the amix assembler croaks on some of the
+   strings that it emits (such as .string "\"%s\"\n"). */
+
+#undef ASM_OUTPUT_ASCII
+#define ASM_OUTPUT_ASCII(FILE,PTR,LEN)				\
+{								\
+  register int sp = 0, lp = 0, ch;				\
+  fprintf ((FILE), "\t%s ", BYTE_ASM_OP);				\
+  do {								\
+    ch = (PTR)[sp];						\
+    if (ch > ' ' && ! (ch & 0x80) && ch != '\\')		\
+      {								\
+	fprintf ((FILE), "'%c", ch);				\
+      }								\
+    else							\
+      {								\
+	fprintf ((FILE), "0x%x", ch);				\
+      }								\
+    if (++sp < (LEN))						\
+      {								\
+	if ((sp % 10) == 0)					\
+	  {							\
+	    fprintf ((FILE), "\n\t%s ", BYTE_ASM_OP);		\
+	  }							\
+	else							\
+	  {							\
+	    putc (',', (FILE));					\
+	  }							\
+      }								\
+  } while (sp < (LEN));						\
+  putc ('\n', (FILE));						\
+}

gnu/gcc/gcc-2.2.2/config/aoutos.h

@@ -0,0 +1,84 @@
+/* aoutos.h  --  operating system specific defines to be used when
+   targeting GCC for some system that uses a.out file format.
+   Copyright (C) 1992 Free Software Foundation, Inc.
+
+   Written by Ron Guilmette (rfg@ncd.com).
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GNU CC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GNU CC; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+/* To use this file, make up a file with a name like:
+
+	?????aout.h
+
+   where ????? is replaced by the name of the basic hardware that you
+   are targeting for.  Then, in the file ?????aout.h, put something
+   like:
+
+	#include "?????.h"
+	#include "aoutos.h"
+
+   followed by any really system-specific defines (or overrides of
+   defines) which you find that you need.  Now, modify the configure
+   or configure.in script to properly use the new ?????aout.h file
+   when configuring for the system.  */
+
+/* A C statement (sans semicolon) to output an element in the table of
+   global constructors. 
+   If using GNU LD, tell it that this is part of the static destructor set. 
+   This code works for any machine provided you use GNU as/ld.
+   If not using GNU LD, rely on a "collect" program to look for names defined
+   in the particular form we choose as global constructor function names.  */
+
+#define ASM_OUTPUT_CONSTRUCTOR(FILE,NAME)				\
+  do {									\
+    if (flag_gnu_linker)						\
+      {									\
+	/* Output an N_SETT (0x16, 22.) for the name.  */		\
+	fprintf (FILE, "%s \"___CTOR_LIST__\",22,0,0,", ASM_STABS_OP);	\
+	assemble_name (FILE, NAME);					\
+	fputc ('\n', FILE);						\
+      }									\
+  } while (0)
+
+
+/* A C statement (sans semicolon) to output an element in the table of
+   global destructors.  */
+
+#define ASM_OUTPUT_DESTRUCTOR(FILE,NAME)       				\
+  do {									\
+    if (flag_gnu_linker)						\
+      {									\
+	/* Output an N_SETT (0x16, 22.) for the name.  */		\
+	fprintf (FILE, "%s \"___DTOR_LIST__\",22,0,0,", ASM_STABS_OP);	\
+	assemble_name (FILE, NAME);					\
+	fputc ('\n', FILE);						\
+      }									\
+  } while (0)
+
+/* Likewise for entries we want to record for garbage collection.
+   Garbage collection is still under development.  */
+
+#define ASM_OUTPUT_GC_ENTRY(FILE,NAME)       				\
+  do {									\
+    if (flag_gnu_linker)						\
+      {									\
+	/* Output an N_SETT (0x16, 22.) for the name.  */		\
+	fprintf (FILE, "%s \"___PTR_LIST__\",22,0,0,", ASM_STABS_OP);	\
+	assemble_name (FILE, NAME);					\
+	fputc ('\n', FILE);						\
+      }									\
+  } while (0)

gnu/gcc/gcc-2.2.2/config/apollo68.h

@@ -0,0 +1,208 @@
+/* Definitions of target machine for GNU compiler.  Apollo 680X0 version.
+   Copyright (C) 1989,1992 Free Software Foundation, Inc.
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GNU CC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GNU CC; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+#include "m68k.h"
+
+/* This symbol may be tested in other files for special Apollo handling */
+
+#define TM_APOLLO
+
+/* See m68k.h.  7 means 68020 with 68881.  */
+
+#ifndef TARGET_DEFAULT
+#define TARGET_DEFAULT 7
+#endif
+
+/* Target switches for the Apollo is the same as in m68k.h, except
+   there is no Sun FPA. */
+
+#undef TARGET_SWITCHES
+#define TARGET_SWITCHES  \
+  { { "68020", 5},				\
+    { "c68020", 5},				\
+    { "68881", 2},				\
+    { "bitfield", 4},				\
+    { "68000", -5},				\
+    { "c68000", -5},				\
+    { "soft-float", -0102},			\
+    { "nobitfield", -4},			\
+    { "rtd", 8},				\
+    { "nortd", -8},				\
+    { "short", 040},				\
+    { "noshort", -040},				\
+    { "", TARGET_DEFAULT}}
+
+/* Define __HAVE_68881__ in preprocessor,
+   according to the -m flags.
+   This will control the use of inline 68881 insns in certain macros.
+   Also inform the program which CPU this is for.  */
+
+#if TARGET_DEFAULT & 02
+
+/* -m68881 is the default */
+#define CPP_SPEC \
+"%{!msoft-float:%{mfpa:-D__HAVE_FPA__ }%{!mfpa:-D__HAVE_68881__ }}\
+%{!ansi:%{m68000:-Dmc68010 }%{mc68000:-Dmc68010 }%{!mc68000:%{!m68000:-Dmc68020 }}\
+%{!ansi:-D_APOLLO_SOURCE}}"
+
+#else
+
+/* -msoft-float is the default */
+#define CPP_SPEC \
+"%{m68881:-D__HAVE_68881__ }%{mfpa:-D__HAVE_FPA__ }\
+%{!ansi:%{m68000:-Dmc68010 }%{mc68000:-Dmc68010 }%{!mc68000:%{!m68000:-Dmc68020 }}\
+%{!ansi:-D_APOLLO_SOURCE}}"
+
+#endif
+
+/* Names to predefine in the preprocessor for this target machine.  */
+/* These are the ones defined by Apollo, plus mc68000 for uniformity with
+   GCC on other 68000 systems.  */
+
+#define CPP_PREDEFINES "-Dapollo -Daegis -Dunix"
+
+/* cpp has to support a #sccs directive for the /usr/include files */
+
+#define SCCS_DIRECTIVE
+
+/* Allow #ident but output nothing for it.  */
+
+#define IDENT_DIRECTIVE
+#define ASM_OUTPUT_IDENT(FILE, NAME)
+
+/* Allow dollarsigns in identifiers */
+
+#define DOLLARS_IN_IDENTIFIERS 2
+
+/* -m68000 requires special flags to the assembler.  */
+
+#define ASM_SPEC \
+ "%{m68000:-mc68010}%{mc68000:-mc68010}%{!mc68000:%{!m68000:-mc68020}}"
+
+/* STARTFILE_SPEC
+   Note that includes knowledge of the default specs for gcc, ie. no
+   args translates to the same effect as -m68881 */
+
+#if TARGET_DEFAULT & 2
+/* -m68881 is the default */
+#define STARTFILE_SPEC					\
+  "%{pg:gcrt0.o%s}%{!pg:%{p:mcrt0.o%s}%{!p:crt0.o%s}}"
+#else
+/* -msoft-float is the default */
+#define STARTFILE_SPEC					\
+  "%{pg:gcrt0.o%s}%{!pg:%{p:mcrt0.o%s}%{!p:crt0.o%s}}"
+#endif
+
+/* Specify library to handle `-a' basic block profiling.  */
+
+#define LIB_SPEC "%{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p} \
+%{a:/usr/lib/bb_link.o} "
+
+/* Debugging is not supported yet */
+
+#undef DBX_DEBUGGING_INFO
+#undef SDB_DEBUGGING_INFO
+
+/* We have atexit(2).  So C++ can use it for global destructors.  */
+
+#define HAVE_ATEXIT
+
+/* Every structure or union's size must be a multiple of 2 bytes.  */
+
+#define STRUCTURE_SIZE_BOUNDARY 16
+
+/* Boundary (in *bits*) on which stack pointer should be aligned.  */
+#undef STACK_BOUNDARY
+#define STACK_BOUNDARY 32
+
+/* Functions which return large structures get the address
+   to place the wanted value from a hidden parameter.  */
+
+#undef  PCC_STATIC_STRUCT_RETURN
+#undef  STRUCT_VALUE_REGNUM
+#define STRUCT_VALUE 0
+#define STRUCT_VALUE_INCOMING 0
+
+/* Specify how to pad function arguments.
+   Arguments are not padded at all; the stack is kept aligned on long
+   boundaries. */
+
+#define FUNCTION_ARG_PADDING(mode, size) none
+
+/* The definition of this macro imposes a limit on the size of
+   an aggregate object which can be treated as if it were a scalar
+   object.  */
+
+#define MAX_FIXED_MODE_SIZE    BITS_PER_WORD
+
+/* The definition of this macro implies that there are cases where
+   a scalar value cannot be returned in registers.
+   For Apollo, anything larger than one integer register is returned
+   using the structure-value mechanism, i.e. objects of DFmode are
+   returned that way. */
+
+#define RETURN_IN_MEMORY(type) \
+  (GET_MODE_SIZE (TYPE_MODE (type)) > UNITS_PER_WORD)
+
+/* In order to link with Apollo libraries, we can't prefix external
+   symbols with an underscore.  */
+
+#undef  USER_LABEL_PREFIX
+
+/* Use a prefix for local labels, just to be on the save side.  */
+
+#undef LOCAL_LABEL_PREFIX
+#define LOCAL_LABEL_PREFIX "."
+
+/* Use a register prefix to avoid clashes with external symbols (classic
+   example: `extern char PC;' in termcap).  */
+
+#undef REGISTER_PREFIX
+#define REGISTER_PREFIX "%"
+
+/* In the machine description we can't use %R, because it will not be seen
+   by ASM_FPRINTF.  (Isn't that a design bug?).  */
+
+#undef REGISTER_PREFIX_MD
+#define REGISTER_PREFIX_MD "%%"
+
+/* config/m68k.md has an explicit reference to the program counter,
+   prefix this by the register prefix.  */
+
+#define ASM_RETURN_CASE_JUMP    return "jmp %%pc@(2,%0:w)"
+
+
+/* Here are the new register names.  */
+
+#undef REGISTER_NAMES
+#ifndef SUPPORT_SUN_FPA
+#define REGISTER_NAMES \
+{"%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7",	\
+ "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%a6", "%sp",	\
+ "%fp0", "%fp1", "%fp2", "%fp3", "%fp4", "%fp5", "%fp6", "%fp7" }
+#else /* SUPPORTED_SUN_FPA */
+#define REGISTER_NAMES \
+{"%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7",	\
+ "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%a6", "%sp",	\
+ "%fp0", "%fp1", "%fp2", "%fp3", "%fp4", "%fp5", "%fp6", "%fp7", \
+ "%fpa0", "%fpa1", "%fpa2", "%fpa3", "%fpa4", "%fpa5", "%fpa6", "%fpa7", \
+ "%fpa8", "%fpa9", "%fpa10", "%fpa11", "%fpa12", "%fpa13", "%fpa14", "%fpa15", \
+ "%fpa16", "%fpa17", "%fpa18", "%fpa19", "%fpa20", "%fpa21", "%fpa22", "%fpa23", \
+ "%fpa24", "%fpa25", "%fpa26", "%fpa27", "%fpa28", "%fpa29", "%fpa30", "%fpa31" }
+#endif /* defined SUPPORT_SUN_FPA */

gnu/gcc/gcc-2.2.2/config/att386.h

@@ -0,0 +1,102 @@
+/* Definitions for AT&T assembler syntax for the Intel 80386.
+   Copyright (C) 1988 Free Software Foundation, Inc.
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GNU CC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GNU CC; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+/* Include common aspects of all 386 Unix assemblers.  */
+#include "unx386.h"
+
+#define TARGET_VERSION fprintf (stderr, " (80386, ATT syntax)");
+
+/* Define the syntax of instructions and addresses.  */
+
+/* Prefix for internally generated assembler labels.  */
+#define LPREFIX ".L"
+
+/* Assembler pseudos to introduce constants of various size.  */
+
+/* #define ASM_BYTE_OP "\t.byte"  Now in svr3.h or svr4.h.  */
+#define ASM_SHORT "\t.value"
+#define ASM_LONG "\t.long"
+#define ASM_DOUBLE "\t.double"
+
+/* How to output an ASCII string constant.  */
+
+#define ASM_OUTPUT_ASCII(FILE, p, size) \
+{ int i = 0; 							\
+  while (i < (size))						\
+    { if (i%10 == 0) { if (i!=0) fprintf ((FILE), "\n");	\
+		       fprintf ((FILE), "%s ", ASM_BYTE_OP); }	\
+      else fprintf ((FILE), ",");					\
+	fprintf ((FILE), "0x%x", ((p)[i++] & 0377)) ;}		\
+      fprintf ((FILE), "\n"); }
+
+/* Do use .optim by default on this machine.  */
+#undef ASM_FILE_START_1
+#define ASM_FILE_START_1(FILE) fprintf (FILE, "\t.optim\n")
+
+/* This is how to output an assembler line
+   that says to advance the location counter
+   to a multiple of 2**LOG bytes.  */
+
+#define ASM_OUTPUT_ALIGN(FILE,LOG)	\
+    if ((LOG)!=0) fprintf ((FILE), "\t.align %d\n", 1<<(LOG))
+
+/* This is how to output an assembler line
+   that says to advance the location counter by SIZE bytes.  */
+
+#define ASM_OUTPUT_SKIP(FILE,SIZE)  \
+  fprintf ((FILE), "\t.set .,.+%u\n", (SIZE))
+
+/* Can't use ASM_OUTPUT_SKIP in text section; it doesn't leave 0s.  */
+
+#define ASM_NO_SKIP_IN_TEXT 1
+
+#define BSS_SECTION_FUNCTION \
+void								\
+bss_section ()							\
+{								\
+  if (in_section != in_bss)					\
+    {								\
+      fprintf (asm_out_file, "%s\n", BSS_SECTION_ASM_OP);	\
+      in_section = in_bss;					\
+    }								\
+}
+
+/* Define the syntax of labels and symbol definitions/declarations.  */
+
+/* This is how to store into the string BUF
+   the symbol_ref name of an internal numbered label where
+   PREFIX is the class of label and NUM is the number within the class.
+   This is suitable for output with `assemble_name'.  */
+
+#undef ASM_GENERATE_INTERNAL_LABEL
+#define ASM_GENERATE_INTERNAL_LABEL(BUF,PREFIX,NUMBER)	\
+  sprintf ((BUF), ".%s%d", (PREFIX), (NUMBER))
+
+/* This is how to output an internal numbered label where
+   PREFIX is the class of label and NUM is the number within the class.  */
+
+#undef ASM_OUTPUT_INTERNAL_LABEL
+#define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM)	\
+  fprintf (FILE, ".%s%d:\n", PREFIX, NUM)
+
+/* This is how to output a reference to a user-level label named NAME.  */
+
+#undef ASM_OUTPUT_LABELREF
+#define ASM_OUTPUT_LABELREF(FILE,NAME)	\
+  fprintf (FILE, "%s", NAME)

gnu/gcc/gcc-2.2.2/config/bsd386.h

@@ -0,0 +1,113 @@
+/* Definitions for BSD assembler syntax for Intel 386
+   (actually AT&T syntax for insns and operands,
+   adapted to BSD conventions for symbol names and debugging.)
+   Copyright (C) 1988 Free Software Foundation, Inc.
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GNU CC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GNU CC; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+/* Include common aspects of all 386 Unix assemblers.  */
+#include "unx386.h"
+
+/* Use the Sequent Symmetry assembler syntax.  */
+
+#define TARGET_VERSION fprintf (stderr, " (80386, BSD syntax)");
+
+/* Define the syntax of pseudo-ops, labels and comments.  */
+
+/* Prefix for internally generated assembler labels.  */
+#define LPREFIX "L"
+
+/* Assembler pseudos to introduce constants of various size.  */
+
+#define ASM_BYTE_OP "\t.byte"
+#define ASM_SHORT "\t.word"
+#define ASM_LONG "\t.long"
+#define ASM_DOUBLE "\t.double"
+
+/* Output at beginning of assembler file.
+   ??? I am skeptical of this -- RMS.  */
+
+#define ASM_FILE_START(FILE) \
+  fprintf (FILE, "\t.file\t\"%s\"\n", dump_base_name);
+
+/* This was suggested, but it shouldn't be right for DBX output. -- RMS
+   #define ASM_OUTPUT_SOURCE_FILENAME(FILE, NAME) */
+
+
+/* Define the syntax of labels and symbol definitions/declarations.  */
+
+/* This is how to output an assembler line
+   that says to advance the location counter by SIZE bytes.  */
+
+#define ASM_OUTPUT_SKIP(FILE,SIZE)  \
+  fprintf (FILE, "\t.space %u\n", (SIZE))
+
+/* Define the syntax of labels and symbol definitions/declarations.  */
+
+/* This says how to output an assembler line
+   to define a global common symbol.  */
+
+#define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED)  \
+( fputs (".comm ", (FILE)),			\
+  assemble_name ((FILE), (NAME)),		\
+  fprintf ((FILE), ",%u\n", (ROUNDED)))
+
+/* This says how to output an assembler line
+   to define a local common symbol.  */
+
+#define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED)  \
+( fputs (".lcomm ", (FILE)),			\
+  assemble_name ((FILE), (NAME)),		\
+  fprintf ((FILE), ",%u\n", (ROUNDED)))
+
+/* This is how to output an assembler line
+   that says to advance the location counter
+   to a multiple of 2**LOG bytes.  */
+
+#define ASM_OUTPUT_ALIGN(FILE,LOG)	\
+     if ((LOG)!=0) fprintf ((FILE), "\t.align %d\n", (LOG))
+
+/* This is how to store into the string BUF
+   the symbol_ref name of an internal numbered label where
+   PREFIX is the class of label and NUM is the number within the class.
+   This is suitable for output with `assemble_name'.  */
+
+#define ASM_GENERATE_INTERNAL_LABEL(BUF,PREFIX,NUMBER)	\
+    sprintf ((BUF), "*%s%d", (PREFIX), (NUMBER))
+
+/* This is how to output an internal numbered label where
+   PREFIX is the class of label and NUM is the number within the class.  */
+
+#define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM)	\
+  fprintf (FILE, "%s%d:\n", PREFIX, NUM)
+
+/* This is how to output a reference to a user-level label named NAME.  */
+
+#define ASM_OUTPUT_LABELREF(FILE,NAME)	\
+  fprintf (FILE, "_%s", NAME)
+
+/* Sequent has some changes in the format of DBX symbols.  */
+#define DBX_NO_XREFS 1
+
+/* Don't split DBX symbols into continuations.  */
+#define DBX_CONTIN_LENGTH 0
+
+/* This is how to output an assembler line defining a `double' constant.  */
+
+#undef ASM_OUTPUT_DOUBLE
+#define ASM_OUTPUT_DOUBLE(FILE,VALUE)  \
+  fprintf (FILE, "\t.double 0d%.20e\n", (VALUE))

gnu/gcc/gcc-2.2.2/config/convex.c

@@ -0,0 +1,220 @@
+/* Subroutines for insn-output.c for Convex.
+   Copyright (C) 1989,1991 Free Software Foundation, Inc.
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 1, or (at your option)
+any later version.
+
+GNU CC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GNU CC; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+#include "config.h"
+#include "rtl.h"
+#include "regs.h"
+#include "hard-reg-set.h"
+#include "real.h"
+#include "insn-config.h"
+#include "conditions.h"
+#include "insn-flags.h"
+#include "output.h"
+#include "insn-attr.h"
+
+/* Boolean to keep track of whether the current section is .text or not.
+   Used by .align handler in convex.h. */
+
+int current_section_is_text;
+
+/* set_cmp saves the operands of a "cmp" insn, along with the type character
+ * to be used in the compare instruction.
+ *
+ * gen_cmp finds out what comparison is to be performed and outputs the
+ * necessary instructions, e.g.
+ *    "eq.w a1,a2\;jbra.t L5"
+ * for (cmpsi a1 a2) (beq L5)  */
+ 
+static rtx xop0, xop1;
+static char typech, regch;
+
+char *
+set_cmp (op0, op1, typechr)
+     rtx op0, op1;
+     char typechr;
+{
+  xop0 = op0;
+  xop1 = op1;
+  typech = typechr;
+  if (GET_CODE (op0) == REG)
+    regch = A_REGNO_P (REGNO (op0)) ? 'a' : 's';
+  else if (GET_CODE (op1) == REG)
+    regch = A_REGNO_P (REGNO (op1)) ? 'a' : 's';
+  else abort ();
+  return "";
+}
+
+char *
+gen_cmp (label, cmpop, tf)
+     rtx label;
+     char *cmpop;
+     char tf;
+{
+  char buf[80];
+  char revop[4];
+  rtx ops[3];
+
+  ops[2] = label;
+
+  /* Constant must be first; swap operands if necessary.
+     If lt, le, ltu, leu are swapped, change to le, lt, leu, ltu
+     and reverse the sense of the jump. */
+
+  if (CONSTANT_P (xop1))
+    {
+      ops[0] = xop1;
+      ops[1] = xop0;
+      if (cmpop[0] == 'l')
+	{
+	  bcopy (cmpop, revop, sizeof revop);
+	  revop[1] ^= 'e' ^ 't';
+	  tf ^= 't' ^ 'f';
+	  cmpop = revop;
+	}
+    }
+  else
+    {
+      ops[0] = xop0;
+      ops[1] = xop1;
+    }
+
+  sprintf (buf, "%s.%c %%0,%%1\n\tjbr%c.%c %%l2", cmpop, typech, regch, tf);
+  output_asm_insn (buf, ops);
+  return "";
+}
+
+/* Routines to separate CONST_DOUBLEs into component parts. */
+
+int
+const_double_high_int (x)
+     rtx x;
+{
+  if (GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
+    return CONST_DOUBLE_LOW (x);
+  else
+    return CONST_DOUBLE_HIGH (x);
+}
+
+int
+const_double_low_int (x)
+     rtx x;
+{
+  if (GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
+    return CONST_DOUBLE_HIGH (x);
+  else
+    return CONST_DOUBLE_LOW (x);
+}
+
+/* Return the number of args in the call insn X. */
+
+static int
+call_num_args (x)
+     rtx x;
+{
+  if (GET_CODE (x) == CALL)
+    return INTVAL (x->fld[1].rtx);
+  if (GET_CODE (x) == SET)
+    return call_num_args (SET_SRC (x));
+  abort ();
+}
+
+/* Scan forward from a call to decide whether we need to reload AP
+   from 12(FP) after it.  We need to if there can be a reference to
+   arg_pointer_rtx before the next call, which will clobber AP.
+   Look forward in the instruction list until encountering a call
+   (don't need the load), or a reference to AP (do need it), or
+   a jump (don't know, do the load).  */
+
+static int
+ap_reload_needed (insn)
+     rtx insn;
+{
+  for (;;)
+    {
+      insn = NEXT_INSN (insn);
+      switch (GET_CODE (insn))
+	{
+	case JUMP_INSN:
+	  /* Basic block ends.  If return, no AP needed, else assume it is. */
+	  return GET_CODE (PATTERN (insn)) != RETURN;
+	case CALL_INSN:
+	  /* A subsequent call.  AP isn't needed unless the call itself
+	     requires it.  But zero-arg calls don't clobber AP, so
+	     don't terminate the search in that case. */
+	  if (reg_mentioned_p (arg_pointer_rtx, PATTERN (insn)))
+	    return 1;
+	  if (! TARGET_ARGCOUNT && call_num_args (PATTERN (insn)) == 0)
+	    break;
+	  return 0;
+	case BARRIER:
+	  /* Barrier, don't need AP. */
+	  return 0;
+	case INSN:
+	  /* Other insn may need AP; if not, keep looking. */
+	  if (reg_mentioned_p (arg_pointer_rtx, PATTERN (insn)))
+	    return 1;
+	}
+    }
+}
+
+/* Output the insns needed to do a call. */
+
+char *
+output_call (insn, address, argcount)
+    rtx insn, address, argcount;
+{
+  int set_ap = TARGET_ARGCOUNT || argcount != const0_rtx;
+
+  /* If AP is used by the call address, evaluate the address into a temp. */
+  if (reg_mentioned_p (arg_pointer_rtx, address))
+    if (set_ap)
+      {
+	address = XEXP (address, 0);
+	output_asm_insn ("ld.w %0,a1", &address);
+	address = gen_rtx (MEM, QImode, gen_rtx (REG, Pmode, 9));
+      }
+
+  /* If there are args, point AP to them. */
+  if (set_ap)
+    output_asm_insn ("mov sp,ap");
+
+  /* If we are passing an arg count, convert it to words and push it. */
+  if (TARGET_ARGCOUNT)
+    {
+      argcount = gen_rtx (CONST_INT, VOIDmode, (INTVAL (argcount) + 3) / 4);
+      output_asm_insn ("pshea %a0", &argcount);
+    }
+
+  /* The call. */
+  output_asm_insn ("calls %0", &address);
+
+  /* If we clobbered AP, reload it if it is live. */
+  if (set_ap)
+    if (ap_reload_needed (insn))
+      output_asm_insn ("ld.w 12(fp),ap");
+
+  /* If we pushed an arg count, pop it and the args. */
+  if (TARGET_ARGCOUNT)
+    {
+      argcount = gen_rtx (CONST_INT, VOIDmode, INTVAL (argcount) * 4 + 4);
+      output_asm_insn ("add.w %0,sp", &argcount);
+    }
+  
+  return "";
+}

gnu/gcc/gcc-2.2.2/config/convex1.h

@@ -0,0 +1,26 @@
+/* tm.h file for a Convex C1.  */
+
+#include "convex.h"
+
+#undef TARGET_DEFAULT
+#define TARGET_DEFAULT 1
+
+#define CC1_SPEC "%{mc2:-mnoc1}"
+
+/* Include Posix prototypes unless -ansi.  */
+
+#define CPP_SPEC \
+"%{mc2:-D__convex_c2__}%{!mc2:-D__convex_c1__}\
+ -D__NO_INLINE_MATH\
+ %{!traditional:-D__stdc__ \
+   -D_LONGLONG -Ds64_t=long\\ long -Du64_t=unsigned\\ long\\ long}\
+ %{!ansi:-D_POSIX_SOURCE -D_CONVEX_SOURCE}"
+
+/* Search Posix or else backward-compatible libraries depending
+   on -traditional. */
+
+#define LIB_SPEC \
+"%{mc2:-lC2}%{!mc2:-lC1}\
+ %{!p:%{!pg:%{traditional:-lc_old}%{!traditional:-lc}}}\
+%{p:%{traditional:-lc_old_p}%{!traditional:-lc_p}}\
+%{pg:%{traditional:-lc_old_p}%{!traditional:-lc_p}}"

gnu/gcc/gcc-2.2.2/config/convex2.h

@@ -0,0 +1,26 @@
+/* tm.h file for a Convex C2.  */
+
+#include "convex.h"
+
+#undef TARGET_DEFAULT
+#define TARGET_DEFAULT 2
+
+#define CC1_SPEC "%{mc1:-mnoc2}"
+
+/* Include Posix prototypes unless -ansi.  */
+
+#define CPP_SPEC \
+"%{mc1:-D__convex_c1__}%{!mc1:-D__convex_c2__}\
+ -D__NO_INLINE_MATH\
+ %{!traditional:-D__stdc__ \
+   -D_LONGLONG -Ds64_t=long\\ long -Du64_t=unsigned\\ long\\ long}\
+ %{!ansi:-D_POSIX_SOURCE -D_CONVEX_SOURCE}"
+
+/* Search Posix or else backward-compatible libraries depending
+   on -traditional. */
+
+#define LIB_SPEC \
+"%{mc1:-lC1}%{!mc1:-lC2}\
+ %{!p:%{!pg:%{traditional:-lc_old}%{!traditional:-lc}}}\
+%{p:%{traditional:-lc_old_p}%{!traditional:-lc_p}}\
+%{pg:%{traditional:-lc_old_p}%{!traditional:-lc_p}}"

gnu/gcc/gcc-2.2.2/config/convex32.h

@@ -0,0 +1,26 @@
+/* tm.h file for a Convex C32xx.  */
+
+#include "convex.h"
+
+#undef TARGET_DEFAULT
+#define TARGET_DEFAULT 2
+
+#define CC1_SPEC "%{mc1:-mnoc2}"
+
+/* Include Posix prototypes unless -ansi.  */
+
+#define CPP_SPEC \
+"%{mc1:-D__convex_c1__}%{!mc1:-D__convex_c2__}\
+ -D__NO_INLINE_MATH\
+ %{!traditional:-D__stdc__ \
+   -D_LONGLONG -Ds64_t=long\\ long -Du64_t=unsigned\\ long\\ long}\
+ %{!ansi:-D_POSIX_SOURCE -D_CONVEX_SOURCE}"
+
+/* Search Posix or else backward-compatible libraries depending
+   on -traditional. */
+
+#define LIB_SPEC \
+"%{mc1:-lC1}%{!mc1:-lC2}\
+ %{!p:%{!pg:%{traditional:-lc_old}%{!traditional:-lc}}}\
+%{p:%{traditional:-lc_old_p}%{!traditional:-lc_p}}\
+%{pg:%{traditional:-lc_old_p}%{!traditional:-lc_p}}"

gnu/gcc/gcc-2.2.2/config/convex34.h

@@ -0,0 +1,26 @@
+/* tm.h file for a Convex C34xx.  */
+
+#include "convex.h"
+
+#undef TARGET_DEFAULT
+#define TARGET_DEFAULT 6
+
+#define CC1_SPEC "%{mc1:-mnoc2}"
+
+/* Include Posix prototypes unless -ansi.  */
+
+#define CPP_SPEC \
+"%{mc1:-D__convex_c1__}%{!mc1:-D__convex_c2__}\
+ -D__NO_INLINE_MATH\
+ %{!traditional:-D__stdc__ \
+   -D_LONGLONG -Ds64_t=long\\ long -Du64_t=unsigned\\ long\\ long}\
+ %{!ansi:-D_POSIX_SOURCE -D_CONVEX_SOURCE}"
+
+/* Search Posix or else backward-compatible libraries depending
+   on -traditional. */
+
+#define LIB_SPEC \
+"%{mc1:-lC1}%{!mc1:-lC2}\
+ %{!p:%{!pg:%{traditional:-lc_old}%{!traditional:-lc}}}\
+%{p:%{traditional:-lc_old_p}%{!traditional:-lc_p}}\
+%{pg:%{traditional:-lc_old_p}%{!traditional:-lc_p}}"

gnu/gcc/gcc-2.2.2/config/convex38.h

@@ -0,0 +1,26 @@
+/* tm.h file for a Convex C38xx.  */
+
+#include "convex.h"
+
+#undef TARGET_DEFAULT
+#define TARGET_DEFAULT 012
+
+#define CC1_SPEC "%{mc1:-mnoc2}"
+
+/* Include Posix prototypes unless -ansi.  */
+
+#define CPP_SPEC \
+"%{mc1:-D__convex_c1__}%{!mc1:-D__convex_c2__}\
+ -D__NO_INLINE_MATH\
+ %{!traditional:-D__stdc__ \
+   -D_LONGLONG -Ds64_t=long\\ long -Du64_t=unsigned\\ long\\ long}\
+ %{!ansi:-D_POSIX_SOURCE -D_CONVEX_SOURCE}"
+
+/* Search Posix or else backward-compatible libraries depending
+   on -traditional. */
+
+#define LIB_SPEC \
+"%{mc1:-lC1}%{!mc1:-lC2}\
+ %{!p:%{!pg:%{traditional:-lc_old}%{!traditional:-lc}}}\
+%{p:%{traditional:-lc_old_p}%{!traditional:-lc_p}}\
+%{pg:%{traditional:-lc_old_p}%{!traditional:-lc_p}}"

gnu/gcc/gcc-2.2.2/config/crds.h

@@ -0,0 +1,603 @@
+/* Definitions of target machine for GNU compiler.
+   Charles River Data Systems UNiverse/32
+
+   Written by Gary E. Miller
+   bug reports to Gary_Edmunds_Miller@cup.portal.com
+
+   Copyright (C) 1987 Free Software Foundation, Inc.
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GNU CC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GNU CC; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+#define MOTOROLA		/* Use Motorola syntax rather than "MIT" */
+#define SGS			/* Uses SGS assembler */
+#define SGS_SWITCH_TABLES	/* Different switch table handling */
+#define CRDS			/* Charles River Data Systems assembler */
+
+#include "m68k.h"
+
+/* Without STRUCTURE_SIZE_BOUNDARY, we can't ensure that structures are
+   aligned such that we can correctly extract bitfields from them.
+   Someone should check whether the usual compiler on the crds machine
+   provides the equivalent behavior of STRUCTURE_SIZE_BOUNDARY.  */
+#error This doesn't define STRUCTURE_SIZE_BOUNDARY
+
+/* See m68k.h.  0 means 680[01]0 with no 68881.  */
+
+#undef TARGET_DEFAULT
+#define	TARGET_DEFAULT 0
+
+/* special flags to the unos assembler.  */
+
+#undef ASM_SPEC
+#define ASM_SPEC "-g"
+
+#undef LIB_SPEC
+#define LIB_SPEC "%{!p:%{!pg:-lunos}}%{p:-lc_p}%{pg:-lc_p}"
+
+#undef STARTFILE_SPEC
+#define STARTFILE_SPEC  \
+  "%{pg:gcrt0.o%s}%{!pg:%{p:mc68rt0.o%s}%{!p:c68rt0.o%s}}"
+
+/* CC1 spec */
+#if 0
+/* c.sac only used in _s_call_r() in libunos.a and malloc() in libmalloc.a */
+/* so we do not need to bother ! */
+#define CC1_SPEC "-fpcc-struct-return"
+#endif
+
+/* -O2 for MAX optimization */
+#undef CC1_SPEC
+#define CC1_SPEC "%{O2:-fstrength-reduce}"
+
+/* cpp has to support a #sccs directive for the /usr/include files */
+
+#define SCCS_DIRECTIVE
+
+/* Make output for SDB.  */
+
+/* #define SDB_DEBUGGING_INFO UNOS casm has no debugging :-( */
+
+/* UNOS has vprintf() */ 
+
+#define HAVE_VPRINTF
+
+/* UNOS need stack probe :-( */
+
+#define HAVE_probe 1
+#define gen_probe()  gen_rtx(ASM_INPUT, VOIDmode, "tstb -2048(sp)\t;probe\n")
+
+/* use memcpy, memset instead of bcopy, etc. */
+
+#define TARGET_MEM_FUNCTIONS
+
+/* Don't try to define `gcc_compiled.' since the assembler might not
+   accept symbols with periods and GDB doesn't run on this machine anyway.  */
+#define ASM_IDENTIFY_GCC(FILE)
+
+/* Define __HAVE_68881__ in preprocessor if -m68881 is specified.
+   This will control the use of inline 68881 insns in certain macros.  */
+
+#undef CPP_SPEC
+#define CPP_SPEC "%{m68881:-D__HAVE_68881__}"
+
+/* Names to predefine in the preprocessor for this target machine.  */
+
+#undef CPP_PREDEFINES
+#define CPP_PREDEFINES "-Dmc68k -DM68000 -Dmc68000 -Dunos -Dunix"
+
+/* Register in which address to store a structure value
+   is passed to a function.  */
+/* unos uses ".comm c.sac" returns &c.sac in d0 */
+/* make pointer to c.sac ?
+#undef STRUCT_VALUE_REGNUM
+#define STRUCT_VALUE gen_rtx(MEM, Pmode, gen_rtx( , , ) )
+*/
+
+#define EXTRA_SECTIONS in_bss
+
+#define EXTRA_SECTION_FUNCTIONS						\
+void									\
+bss_section ()								\
+{									\
+  if (in_section != in_bss)						\
+    {									\
+      fprintf (asm_out_file, ".bss\n");					\
+      in_section = in_bss;						\
+    }									\
+}
+
+/* Specify how to pad function arguments.
+   Value should be `upward', `downward' or `none'.
+   Same as the default, except no padding for large or variable-size args.  */
+
+#define FUNCTION_ARG_PADDING(MODE, TYPE)				\
+  (((MODE) == BLKmode							\
+    ? ((TYPE) && TREE_CODE (TYPE_SIZE (TYPE))	== INTEGER_CST		\
+       && int_size_in_bytes (TYPE) < PARM_BOUNDARY / BITS_PER_UNIT)	\
+    : GET_MODE_BITSIZE (MODE) < PARM_BOUNDARY)				\
+   ? downward : none)
+
+/* Override part of the obstack macros.  */
+
+#define __PTR_TO_INT(P) ((int)(P))
+#define __INT_TO_PTR(P) ((char *)(P))
+
+/* Override parts of m68k.h to fit the CRuDS assembler.  */
+
+#undef TARGET_VERSION 
+#define TARGET_VERSION fprintf (stderr, " (68k, CRDS/UNOS)");
+
+/* Specify extra dir to search for include files.  */
+#define SYSTEM_INCLUDE_DIR "/include"
+
+/* Control the assembler format that we output.  */
+
+/* Output at beginning of assembler file.  */
+
+#undef ASM_FILE_START
+#define ASM_FILE_START(FILE)	\
+  fprintf (FILE, ";#NO_APP\n");
+
+/* Output to assembler file text saying following lines
+   may contain character constants, extra white space, comments, etc.  */
+
+#undef ASM_APP_ON
+#define ASM_APP_ON ";#APP\n"
+
+/* Output to assembler file text saying following lines
+   no longer contain unusual constructs.  */
+
+#undef ASM_APP_OFF 
+#define ASM_APP_OFF ";#NO_APP\n"
+
+/* This is how to output an assembler line defining a `double' constant.  */
+
+#undef ASM_OUTPUT_DOUBLE
+#define ASM_OUTPUT_DOUBLE(FILE,VALUE)  \
+do { union { double f; long l[2];} tem;			\
+     tem.f = (VALUE);					\
+     fprintf (FILE, "\t.long 0x%x, 0x%x\n", tem.l[0], tem.l[1]);	\
+   } while (0)
+
+/*unos has no .skip :-( */
+#undef ASM_OUTPUT_SKIP
+#define ASM_OUTPUT_SKIP(FILE,SIZE)	 	\
+    fprintf (FILE, "\t. = . + %u\n", (SIZE));	
+
+/* This says how to output an assembler line
+   to define a local common symbol.  */
+/* should use bss_section instead of data_section but this makes casm die ? */
+
+#undef ASM_OUTPUT_LOCAL
+#define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED)  \
+{ data_section ();				\
+  if ((SIZE) > 1) fprintf (FILE, "\t.even\n");	\
+  assemble_name ((FILE), (NAME));		\
+  fprintf ((FILE), ":\t. = . + %u\n", (ROUNDED));}
+
+/* This is how to output an insn to push a register on the stack.
+   It need not be very fast code.  */
+
+#undef ASM_OUTPUT_REG_PUSH
+#define ASM_OUTPUT_REG_PUSH(FILE,REGNO)  \
+  fprintf (FILE, "\tmovel %s,-(sp)\n", reg_names[REGNO])
+
+/* This is how to output an insn to pop a register from the stack.
+   It need not be very fast code.  */
+
+#undef ASM_OUTPUT_REG_POP
+#define ASM_OUTPUT_REG_POP(FILE,REGNO)  \
+  fprintf (FILE, "\tmovel (sp)+,%s\n", reg_names[REGNO])
+
+#undef  ASM_OUTPUT_ASCII
+#define  ASM_OUTPUT_ASCII(FILE, P , SIZE)				\
+{  int i;								\
+	  fprintf ((FILE), "\t.ascii \"");				\
+	  for (i = 0; i < (SIZE); i++)					\
+	    {								\
+	      register int c = (P)[i];					\
+	      if (i != 0 && (i / 200) * 200 == i)			\
+		fprintf ((FILE), "\"\n\t.ascii \"");			\
+	      if (c >= ' ' && c < 0177) {				\
+	        if (c != '\"' && c != '\\') {				\
+		  putc (c, (FILE));					\
+		  continue;						\
+	        }							\
+	       }							\
+	       /* brain dead asm doesn't understand char escapes */  \
+	       fprintf ((FILE), "\"\n\t.byte\t%d\n\t.ascii \"", c);	\
+	    }								\
+	  fprintf ((FILE), "\"\n");					\
+ }
+
+
+/* Change all JBxx to Bxx.  Also change all DBRA to DBF.
+   Also change divs.l, etc., to divs, etc.  But don't change divsl.l.  */
+
+#define ASM_OUTPUT_OPCODE(FILE, PTR)			\
+{ if ((PTR)[0] == 'j' && (PTR)[1] == 'b')		\
+    { ++(PTR); }					\
+  else if ((PTR)[0] == 'd')				\
+    {							\
+      if (!strncmp ((PTR), "dbra", 4))			\
+	{ fprintf ((FILE), "dbf"); (PTR) += 4; }	\
+      else if (!strncmp ((PTR), "div", 3) && (PTR)[5] == ' ')  \
+	{ fprintf ((FILE), "div%c", (PTR)[3]); (PTR) += 6; }   \
+    }							\
+}
+
+
+/* Print operand X (an rtx) in assembler syntax to file FILE.
+   CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
+   For `%' followed by punctuation, CODE is the punctuation and X is null.
+
+   On the 68000, we use several CODE characters:
+   '.' for dot needed in Motorola-style opcode names.
+   '-' for an operand pushing on the stack:
+       sp@-, -(sp) or -(%sp) depending on the style of syntax.
+   '+' for an operand pushing on the stack:
+       sp@+, (sp)+ or (%sp)+ depending on the style of syntax.
+   '@' for a reference to the top word on the stack:
+       sp@, (sp) or (%sp) depending on the style of syntax.
+   '#' for an immediate operand prefix (# in MIT and Motorola syntax
+       but & in SGS syntax, $ in unos syntax).
+   '!' for the fpcr register (used in some float-to-fixed conversions).
+
+   'b' for byte insn (no effect, on the Sun; this is for the ISI).
+   'd' to force memory addressing to be absolute, not relative.
+   'f' for float insn (print a CONST_DOUBLE as a float rather than in hex)
+   'w' for FPA insn (print a CONST_DOUBLE as a SunFPA constant rather
+       than directly).  Second part of 'y' below.
+   'x' for float insn (print a CONST_DOUBLE as a float rather than in hex),
+       or print pair of registers as rx:ry.
+   'y' for a FPA insn (print pair of registers as rx:ry).  This also outputs
+       CONST_DOUBLE's as SunFPA constant RAM registers if
+       possible, so it should not be used except for the SunFPA. */
+
+#undef PRINT_OPERAND_PUNCT_VALID_P
+#define PRINT_OPERAND_PUNCT_VALID_P(CODE)				\
+  ((CODE) == '.' || (CODE) == '#' || (CODE) == '-'			\
+   || (CODE) == '+' || (CODE) == '@' || (CODE) == '!')
+
+#undef PRINT_OPERAND
+#define PRINT_OPERAND(FILE, X, CODE)  \
+{ int i;								\
+  if (CODE == '.') ;							\
+  else if (CODE == '#') fprintf (FILE, "$");				\
+  else if (CODE == '-') fprintf (FILE, "-(sp)");			\
+  else if (CODE == '+') fprintf (FILE, "(sp)+");			\
+  else if (CODE == '@') fprintf (FILE, "(sp)");				\
+  else if (CODE == '!') fprintf (FILE, "fpcr");				\
+  else if (GET_CODE (X) == REG)						\
+    { if (REGNO (X) < 16 && (CODE == 'y' || CODE == 'x') && GET_MODE (X) == DFmode)	\
+        fprintf (FILE, "%s:%s", reg_names[REGNO (X)], reg_names[REGNO (X)+1]); \
+      else								\
+        fprintf (FILE, "%s", reg_names[REGNO (X)]);			\
+    }									\
+  else if (GET_CODE (X) == MEM)						\
+    {									\
+      output_address (XEXP (X, 0));					\
+      if (CODE == 'd' && ! TARGET_68020					\
+	  && CONSTANT_ADDRESS_P (XEXP (X, 0)))				\
+	/* fprintf (FILE, ".l") */;					\
+    }									\
+  else if ((CODE == 'y' || CODE == 'w')					\
+	   && GET_CODE(X) == CONST_DOUBLE				\
+	   && (i = standard_sun_fpa_constant_p (X)))			\
+    fprintf (FILE, "%%%d", i & 0x1ff);					\
+  else if (GET_CODE (X) == CONST_DOUBLE && GET_MODE (X) == SFmode)	\
+    { union { double d; int i[2]; } u;					\
+      union { float f; int i; } u1;					\
+      u.i[0] = CONST_DOUBLE_LOW (X); u.i[1] = CONST_DOUBLE_HIGH (X);	\
+      u1.f = u.d;							\
+      if (CODE == 'f')							\
+	ASM_OUTPUT_FLOAT_OPERAND (FILE, u1.f);				\
+      else								\
+        fprintf (FILE, "$0x%x", u1.i); }				\
+  else if (GET_CODE (X) == CONST_DOUBLE && GET_MODE (X) != DImode)	\
+    { union { double d; int i[2]; } u;					\
+      u.i[0] = CONST_DOUBLE_LOW (X); u.i[1] = CONST_DOUBLE_HIGH (X);	\
+      ASM_OUTPUT_DOUBLE_OPERAND (FILE, u.d); }				\
+  else { putc ('$', FILE); output_addr_const (FILE, X); }}
+
+/* Note that this contains a kludge that knows that the only reason
+   we have an address (plus (label_ref...) (reg...))
+   is in the insn before a tablejump, and we know that m68k.md
+   generates a label LInnn: on such an insn.  */
+#undef PRINT_OPERAND_ADDRESS
+#define PRINT_OPERAND_ADDRESS(FILE, ADDR)  \
+{ register rtx reg1, reg2, breg, ireg;					\
+  register rtx addr = ADDR;						\
+  rtx offset;								\
+  switch (GET_CODE (addr))						\
+    {									\
+    case REG:								\
+      fprintf (FILE, "(%s)", reg_names[REGNO (addr)]);			\
+      break;								\
+    case PRE_DEC:							\
+      fprintf (FILE, "-(%s)", reg_names[REGNO (XEXP (addr, 0))]);	\
+      break;								\
+    case POST_INC:							\
+      fprintf (FILE, "(%s)+", reg_names[REGNO (XEXP (addr, 0))]);	\
+      break;								\
+    case PLUS:								\
+      reg1 = 0;	reg2 = 0;						\
+      ireg = 0;	breg = 0;						\
+      offset = 0;							\
+      if (CONSTANT_ADDRESS_P (XEXP (addr, 0)))				\
+	{								\
+	  offset = XEXP (addr, 0);					\
+	  addr = XEXP (addr, 1);					\
+	}								\
+      else if (CONSTANT_ADDRESS_P (XEXP (addr, 1)))			\
+	{								\
+	  offset = XEXP (addr, 1);					\
+	  addr = XEXP (addr, 0);					\
+	}								\
+      if (GET_CODE (addr) != PLUS) ;					\
+      else if (GET_CODE (XEXP (addr, 0)) == SIGN_EXTEND)		\
+	{								\
+	  reg1 = XEXP (addr, 0);					\
+	  addr = XEXP (addr, 1);					\
+	}								\
+      else if (GET_CODE (XEXP (addr, 1)) == SIGN_EXTEND)		\
+	{								\
+	  reg1 = XEXP (addr, 1);					\
+	  addr = XEXP (addr, 0);					\
+	}								\
+      else if (GET_CODE (XEXP (addr, 0)) == MULT)			\
+	{								\
+	  reg1 = XEXP (addr, 0);					\
+	  addr = XEXP (addr, 1);					\
+	}								\
+      else if (GET_CODE (XEXP (addr, 1)) == MULT)			\
+	{								\
+	  reg1 = XEXP (addr, 1);					\
+	  addr = XEXP (addr, 0);					\
+	}								\
+      else if (GET_CODE (XEXP (addr, 0)) == REG)			\
+	{								\
+	  reg1 = XEXP (addr, 0);					\
+	  addr = XEXP (addr, 1);					\
+	}								\
+      else if (GET_CODE (XEXP (addr, 1)) == REG)			\
+	{								\
+	  reg1 = XEXP (addr, 1);					\
+	  addr = XEXP (addr, 0);					\
+	}								\
+      if (GET_CODE (addr) == REG || GET_CODE (addr) == MULT		\
+	  || GET_CODE (addr) == SIGN_EXTEND)				\
+	{ if (reg1 == 0) reg1 = addr; else reg2 = addr; addr = 0; }	\
+      if (offset != 0) { if (addr != 0) abort (); addr = offset; }	\
+      if ((reg1 && (GET_CODE (reg1) == SIGN_EXTEND			\
+		    || GET_CODE (reg1) == MULT))			\
+	  || (reg2 != 0 && REGNO_OK_FOR_BASE_P (REGNO (reg2))))		\
+	{ breg = reg2; ireg = reg1; }					\
+      else if (reg1 != 0 && REGNO_OK_FOR_BASE_P (REGNO (reg1)))		\
+	{ breg = reg1; ireg = reg2; }					\
+      if (ireg != 0 && breg == 0 && GET_CODE (addr) == LABEL_REF)	\
+        { int scale = 1;						\
+	  if (GET_CODE (ireg) == MULT)					\
+	    { scale = INTVAL (XEXP (ireg, 1));				\
+	      ireg = XEXP (ireg, 0); }					\
+	  if (GET_CODE (ireg) == SIGN_EXTEND)				\
+	    fprintf (FILE, "L%d-LI%d-2(pc,%s.w",			\
+		     CODE_LABEL_NUMBER (XEXP (addr, 0)),		\
+		     CODE_LABEL_NUMBER (XEXP (addr, 0)),		\
+		     reg_names[REGNO (XEXP (ireg, 0))]); 		\
+	  else								\
+	    fprintf (FILE, "L%d-LI%d-2(pc,%s.l",			\
+		     CODE_LABEL_NUMBER (XEXP (addr, 0)),		\
+		     CODE_LABEL_NUMBER (XEXP (addr, 0)),		\
+		     reg_names[REGNO (ireg)]);				\
+	  if (scale != 1) fprintf (FILE, ":%d", scale);			\
+	  putc (')', FILE);						\
+	  break; }							\
+      if (breg != 0 && ireg == 0 && GET_CODE (addr) == LABEL_REF)	\
+        { fprintf (FILE, "L%d-LI%d-2(pc,%s.l",				\
+		   CODE_LABEL_NUMBER (XEXP (addr, 0)),			\
+		   CODE_LABEL_NUMBER (XEXP (addr, 0)),			\
+		   reg_names[REGNO (breg)]);				\
+	  putc (')', FILE);						\
+	  break; }							\
+      if (ireg != 0 || breg != 0)					\
+	{ int scale = 1;						\
+	  if (breg == 0)						\
+	    abort ();							\
+	  if (addr && GET_CODE (addr) == LABEL_REF) abort ();		\
+	  if (addr != 0)						\
+	    output_addr_const (FILE, addr);				\
+	  fprintf (FILE, "(%s", reg_names[REGNO (breg)]);		\
+	  if (breg != 0 && ireg != 0)					\
+	    putc (',', FILE);						\
+	  if (ireg != 0 && GET_CODE (ireg) == MULT)			\
+	    { scale = INTVAL (XEXP (ireg, 1));				\
+	      ireg = XEXP (ireg, 0); }					\
+	  if (ireg != 0 && GET_CODE (ireg) == SIGN_EXTEND)		\
+	    fprintf (FILE, "%s.w", reg_names[REGNO (XEXP (ireg, 0))]);	\
+	  else if (ireg != 0)						\
+	    fprintf (FILE, "%s.l", reg_names[REGNO (ireg)]);		\
+	  if (scale != 1) fprintf (FILE, ":%d", scale);			\
+	  putc (')', FILE);						\
+	  break;							\
+	}								\
+      else if (reg1 != 0 && GET_CODE (addr) == LABEL_REF)		\
+	{ fprintf (FILE, "L%d-LI%d-2(pc,%s.l)",				\
+		   CODE_LABEL_NUMBER (XEXP (addr, 0)),			\
+		   CODE_LABEL_NUMBER (XEXP (addr, 0)),			\
+		   reg_names[REGNO (reg1)]);				\
+	  break; }							\
+    default:								\
+      if (GET_CODE (addr) == CONST_INT					\
+	  && INTVAL (addr) < 0x8000					\
+	  && INTVAL (addr) >= -0x8000)					\
+	fprintf (FILE, "%d", INTVAL (addr));				\
+      else								\
+        output_addr_const (FILE, addr);					\
+    }}
+
+#define ASM_OUTPUT_SOURCE_FILENAME(FILE, FILENAME) \
+  fprintf (FILE, "\t; file\t\"%s\"\n", FILENAME)
+
+#define ASM_OUTPUT_SOURCE_LINE(FILE, LINENO)	\
+  fprintf (FILE, "\t; ln\t%d\n",			\
+	   (sdb_begin_function_line		\
+	    ? last_linenum - sdb_begin_function_line : 1))
+
+/* This macro generates the assembly code for function entry.
+   FILE is a stdio stream to output the code to.
+   SIZE is an int: how many units of temporary storage to allocate.
+   Refer to the array `regs_ever_live' to determine which registers
+   to save; `regs_ever_live[I]' is nonzero if register number I
+   is ever used in the function.  This macro is responsible for
+   knowing which registers should not be saved even if used.  */
+
+/* Note that the order of the bit mask for fmovem is the opposite
+   of the order for movem!  */
+
+#undef FUNCTION_PROLOGUE
+#define FUNCTION_PROLOGUE(FILE, SIZE)     \
+{ register int regno;						\
+  register int mask = 0;					\
+  extern char call_used_regs[];					\
+  int fsize = ((SIZE) + 3) & -4;				\
+  /* unos stack probe */					\
+  if ( fsize > 30000 ) {					\
+    fprintf (FILE, "\tmovel sp,a0\n");				\
+    fprintf (FILE, "\taddl $-%d,a0\n", 2048 + fsize);		\
+    fprintf (FILE, "\ttstb (a0)\n");				\
+  } else {							\
+    fprintf (FILE, "\ttstb -%d(sp)\n", 2048 + fsize);		\
+  }								\
+  if (frame_pointer_needed)					\
+    { if (TARGET_68020 || fsize < 0x8000)			\
+        fprintf (FILE, "\tlink a6,$%d\n", -fsize);		\
+      else							\
+	fprintf (FILE, "\tlink a6,$0\n\tsubl $%d,sp\n", fsize); }  \
+  for (regno = 24; regno < 56; regno++)				\
+    if (regs_ever_live[regno] && ! call_used_regs[regno])	\
+      fprintf(FILE, "\tfpmoved %s, sp@-\n",			\
+	      reg_names[regno]);				\
+  for (regno = 16; regno < 24; regno++)				\
+    if (regs_ever_live[regno] && ! call_used_regs[regno])	\
+       mask |= 1 << (regno - 16);				\
+  if ((mask & 0xff) != 0)					\
+    fprintf (FILE, "\tfmovem $0x%x,-(sp)\n", mask & 0xff);       \
+  mask = 0;							\
+  for (regno = 0; regno < 16; regno++)				\
+    if (regs_ever_live[regno] && ! call_used_regs[regno])	\
+       mask |= 1 << (15 - regno);				\
+  if (frame_pointer_needed)					\
+    mask &= ~ (1 << (15-FRAME_POINTER_REGNUM));			\
+  if (exact_log2 (mask) >= 0)					\
+    fprintf (FILE, "\tmovel %s,-(sp)\n", reg_names[15 - exact_log2 (mask)]);  \
+  else if (mask) fprintf (FILE, "\tmovem $0x%x,-(sp)\n", mask); }
+
+/* Must put address in  %a0 , not  %d0 . -- LGM, 7/15/88 */
+/* UNOS ?? */
+#undef FUNCTION_PROFILER
+#define FUNCTION_PROFILER(FILE, LABEL_NO)	\
+    fprintf (FILE, "\tmovl &LP%%%d,%%a0\n\tjsr mcount\n", (LABEL_NO))
+
+/* This macro generates the assembly code for function exit,
+   on machines that need it.  If FUNCTION_EPILOGUE is not defined
+   then individual return instructions are generated for each
+   return statement.  Args are same as for FUNCTION_PROLOGUE.
+
+   The function epilogue should not depend on the current stack pointer!
+   It should use the frame pointer only.  This is mandatory because
+   of alloca; we also take advantage of it to omit stack adjustments
+   before returning.  */
+
+#undef FUNCTION_EPILOGUE
+#define FUNCTION_EPILOGUE(FILE, SIZE) \
+{ register int regno;						\
+  register int mask, fmask;					\
+  register int nregs;						\
+  int offset, foffset, fpoffset;				\
+  extern char call_used_regs[];					\
+  int fsize = ((SIZE) + 3) & -4;				\
+  int big = 0;							\
+  nregs = 0;  fmask = 0; fpoffset = 0;				\
+  for (regno = 24 ; regno < 56 ; regno++)			\
+    if (regs_ever_live[regno] && ! call_used_regs[regno])	\
+      nregs++;							\
+  fpoffset = nregs*8;						\
+  nregs = 0;							\
+  for (regno = 16; regno < 24; regno++)				\
+    if (regs_ever_live[regno] && ! call_used_regs[regno])	\
+      { nregs++; fmask |= 1 << (23 - regno); }			\
+  foffset = fpoffset + nregs * 12;				\
+  nregs = 0;  mask = 0;						\
+  if (frame_pointer_needed) regs_ever_live[FRAME_POINTER_REGNUM] = 0; \
+  for (regno = 0; regno < 16; regno++)				\
+    if (regs_ever_live[regno] && ! call_used_regs[regno])	\
+      { nregs++; mask |= 1 << regno; }				\
+  offset = foffset + nregs * 4;					\
+  if (offset + fsize >= 0x8000 					\
+      && frame_pointer_needed 					\
+      && (mask || fmask || fpoffset)) 				\
+    { fprintf (FILE, "\tmovel $%d,a0\n", -fsize);		\
+      fsize = 0, big = 1; }					\
+  if (exact_log2 (mask) >= 0) {					\
+    if (big)							\
+      fprintf (FILE, "\tmovel -%d(a6,a0.l),%s\n",		\
+	       offset + fsize, reg_names[exact_log2 (mask)]);	\
+    else if (! frame_pointer_needed)				\
+      fprintf (FILE, "\tmovel (sp)+,%s\n",			\
+	       reg_names[exact_log2 (mask)]);			\
+    else							\
+      fprintf (FILE, "\tmovel -%d(a6),%s\n",			\
+	       offset + fsize, reg_names[exact_log2 (mask)]); }	\
+  else if (mask) {						\
+    if (big)							\
+      fprintf (FILE, "\tmovem -%d(a6,a0.l),$0x%x\n",		\
+	       offset + fsize, mask);				\
+    else if (! frame_pointer_needed)				\
+      fprintf (FILE, "\tmovem (sp)+,$0x%x\n", mask);		\
+    else							\
+      fprintf (FILE, "\tmovem -%d(a6),$0x%x\n",		\
+	       offset + fsize, mask); }				\
+  if (fmask) {							\
+    if (big)							\
+      fprintf (FILE, "\tfmovem -%d(a6,a0.l),$0x%x\n",		\
+	       foffset + fsize, fmask);				\
+    else if (! frame_pointer_needed)				\
+      fprintf (FILE, "\tfmovem (sp)+,$0x%x\n", fmask);		\
+    else							\
+      fprintf (FILE, "\tfmovem -%d(a6),$0x%x\n",		\
+	       foffset + fsize, fmask); }			\
+  if (fpoffset != 0)						\
+    for (regno = 55; regno >= 24; regno--)			\
+      if (regs_ever_live[regno] && ! call_used_regs[regno]) {	\
+	if (big)						\
+	  fprintf(FILE, "\tfpmoved -%d(a6,a0.l), %s\n",	\
+		  fpoffset + fsize, reg_names[regno]);		\
+	else if (! frame_pointer_needed)			\
+	  fprintf(FILE, "\tfpmoved (sp)+, %s\n",			\
+		  reg_names[regno]);				\
+	else							\
+	  fprintf(FILE, "\tfpmoved -%d(a6), %s\n",		\
+		  fpoffset + fsize, reg_names[regno]);		\
+	fpoffset -= 8;						\
+      }								\
+  if (frame_pointer_needed)					\
+    fprintf (FILE, "\tunlk a6\n");				\
+  if (current_function_pops_args)				\
+    fprintf (FILE, "\trtd $%d\n", current_function_pops_args);	\
+  else fprintf (FILE, "\trts\n"); }
+

gnu/gcc/gcc-2.2.2/config/ctix.h

@@ -0,0 +1,47 @@
+/* Definitions of target machine for GNU compiler.
+   Convergent Technologies MiniFrame version,
+   using GAS and binutils with COFF encapsulation.
+
+   Written by Ronald Cole
+
+   Because the MiniFrame's C compiler is so completely lobotomized,
+   bootstrapping this is damn near impossible!
+   Write to me for information on obtaining the binaries...
+
+   bug reports to csusac!unify!rjc@ucdavis.edu
+
+   Copyright (C) 1990 Free Software Foundation, Inc.
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GNU CC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GNU CC; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+#include "3b1g.h"
+
+/* Names to predefine in the preprocessor for this target machine.  */
+#undef CPP_PREDEFINES
+#define CPP_PREDEFINES "-Dmc68000 -Dmc68k -Dunix -Dctix"
+
+/* Where to look for robotussinized startfiles.  */
+#undef STANDARD_STARTFILE_PREFIX
+#define STANDARD_STARTFILE_PREFIX "/usr/local/lib/gnu/"
+
+/* Generate calls to the MiniFrame's library (for speed).  */
+#define DIVSI3_LIBCALL "ldiv"
+#define UDIVSI3_LIBCALL "uldiv"
+#define MODSI3_LIBCALL "lrem"
+#define UMODSI3_LIBCALL "ulrem"
+#define MULSI3_LIBCALL "lmul"
+#define UMULSI3_LIBCALL "ulmul"

gnu/gcc/gcc-2.2.2/config/dec-osf1.h

@@ -0,0 +1,26 @@
+/* Definitions of target machine for GNU compiler.  DECstation (OSF/1) version.
+   Copyright (C) 1992 Free Software Foundation, Inc.
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GNU CC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GNU CC; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+#define DECSTATION
+#define DEC_OSF1
+
+#define CPP_PREDEFINES "-D__ANSI_COMPAT \
+-DMIPSEL -DR3000 -DSYSTYPE_BSD -D_SYSTYPE_BSD -Dbsd4_2 -Dhost_mips -Dmips -Dosf -Dunix"
+
+#include "decstatn.h"

gnu/gcc/gcc-2.2.2/config/decrose.h

@@ -0,0 +1,134 @@
+/* Definitions of target machine for GNU compiler.  DECstation (OSF/1 with OSF/rose) version.
+   Copyright (C) 1991 Free Software Foundation, Inc.
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GNU CC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GNU CC; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+#define DECSTATION
+#define OSF_OS
+
+#define HALF_PIC_DEBUG	TARGET_DEBUG_B_MODE
+#define HALF_PIC_PREFIX	"$Lp."
+
+#include "halfpic.h"
+
+#define CPP_PREDEFINES "-DOSF -DOSF1 -Dbsd4_2 -DMIPSEL -Dhost_mips -Dmips -Dunix -DR3000 -DSYSTYPE_BSD"
+
+#define ASM_SPEC	"\
+%{mmips-as: \
+	%{pipe:%e:-pipe not supported} \
+	%{EL} %{!EL:-EL} \
+	%{EB: %e-EB not supported} \
+	%{!mrnames: %{!.s:-nocpp} %{.s: %{cpp} %{nocpp}}} \
+	%{mips1} %{mips2} %{mips3} \
+	%{O:-O2} %{O1:-O2} %{O2:-O2} %{O3:-O3} \
+	%{g} %{g0} %{g1} %{g2} %{g3} \
+	%{K} %{Q}} \
+	%{v*: -v} \
+	%{G*}"
+
+#define ASM_FINAL_SPEC "\
+%{mmips-as: %{!mno-mips-tfile: \
+	\n mips-tfile %{v*: -v} %{d*} \
+			%{K: -I %b.o~} \
+			%{!K: %{save-temps: -I %b.o~}} \
+			%{c:%W{o*}%{!o*:-o %b.o}}%{!c:-o %b.o} \
+			%{.s:%i} %{!.s:%g.s}}}"
+
+#define CPP_SPEC "\
+%{.S:	-D__LANGUAGE_ASSEMBLY__ -D__LANGUAGE_ASSEMBLY %{!ansi:-DLANGUAGE_ASSEMBLY} \
+	-ULANGUAGE_C -U__LANGUAGE_C__} \
+%{.cc:	-D__LANGUAGE_C_PLUS_PLUS__ -D__LANGUAGE_C_PLUS_PLUS} \
+%{.cxx:	-D__LANGUAGE_C_PLUS_PLUS__ -D__LANGUAGE_C_PLUS_PLUS} \
+%{.C:	-D__LANGUAGE_C_PLUS_PLUS__ -D__LANGUAGE_C_PLUS_PLUS} \
+%{.m:	-D__LANGUAGE_OBJECTIVE_C__ -D__LANGUAGE_OBJECTIVE_C} \
+%{!.S:	-D__LANGUAGE_C__  -D__LANGUAGE_C %{!ansi:-DLANGUAGE_C}}"
+
+#define LINK_SPEC "\
+%{G*} \
+%{mmips-as: \
+	%{EL} %{!EL: -EL} \
+	%{EB: %e-EB not supported} \
+	%{mips1} %{mips2} %{mips3} \
+	%{bestGnum}} \
+%{!mmips-as: \
+ 	%{v*: -v} \
+	%{!noshrlib: %{pic-none: -noshrlib} %{!pic-none: -warn_nopic}} \
+	%{nostdlib} %{noshrlib} %{glue}}"
+
+#define LIB_SPEC "-lc"
+
+#define STARTFILE_SPEC "%{pg:gcrt0.o%s}%{!pg:%{p:mcrt0.o%s}%{!p:crt0.o%s}}"
+
+#define MACHINE_TYPE "DECstation running OSF/1 with OSF/rose objects"
+
+#ifndef MD_EXEC_PREFIX
+#define MD_EXEC_PREFIX		"/usr/ccs/gcc/"
+#endif
+
+#ifndef MD_STARTFILE_PREFIX
+#define MD_STARTFILE_PREFIX	"/usr/ccs/lib/"
+#endif
+
+/* Specify size_t, ptrdiff_t, and wchar_t types.  */
+#define SIZE_TYPE	"long unsigned int"
+#define PTRDIFF_TYPE	"int"
+#define WCHAR_TYPE	"unsigned int"
+#define WCHAR_TYPE_SIZE BITS_PER_WORD
+
+#if 0
+#define WCHAR_TYPE	((TARGET_WC8)					\
+				? "unsigned char"			\
+				: ((TARGET_WC16)			\
+					? "short unsigned int"		\
+					: "long unsigned int"))
+#endif
+
+#define TARGET_DEFAULT MASK_GAS
+
+/* OSF/rose uses stabs, not ECOFF.  */
+#define PREFERRED_DEBUGGING_TYPE DBX_DEBUG
+
+/* Tell collect that the object format is OSF/rose.  */
+#define OBJECT_FORMAT_ROSE
+
+/* Use atexit for static constructors/destructors, instead of defining
+   our own exit function.  */
+#define HAVE_ATEXIT
+
+/* Generate calls to memcpy, etc., not bcopy, etc.  */
+#define TARGET_MEM_FUNCTIONS
+
+/* A C statement to output assembler commands which will identify
+   the object file as having been compiled with GNU CC (or another
+   GNU compiler).
+
+   If you don't define this macro, the string `gcc2_compiled.:' is
+   output.  This string is calculated to define a symbol which, on
+   BSD systems, will never be defined for any other reason.  GDB
+   checks for the presence of this symbol when reading the symbol
+   table of an executable.
+
+   On non-BSD systems, you must arrange communication with GDB in
+   some other fashion.  If GDB is not used on your system, you can
+   define this macro with an empty body.
+
+   On OSF/1, gcc2_compiled. confuses the kernel debugger, so don't
+   put it out.  */
+
+#define ASM_IDENTIFY_GCC(STREAM)
+
+#include "mips.h"

gnu/gcc/gcc-2.2.2/config/decstabs.h

@@ -0,0 +1,22 @@
+/* Definitions of target machine for GNU compiler.  DECstation (ultrix) version
+   using encapsulated stabs.
+   Copyright (C) 1992 Free Software Foundation, Inc.
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GNU CC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GNU CC; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+#define PREFERRED_DEBUGGING_TYPE DBX_DEBUG
+#include "decstatn.h"

gnu/gcc/gcc-2.2.2/config/decstatn.h

@@ -0,0 +1,70 @@
+/* Definitions of target machine for GNU compiler.  DECstation (ultrix) version.
+   Copyright (C) 1991 Free Software Foundation, Inc.
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GNU CC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GNU CC; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+#define DECSTATION
+
+#ifndef CPP_PREDEFINES
+#define CPP_PREDEFINES "-D__ANSI_COMPAT \
+-DMIPSEL -DR3000 -DSYSTYPE_BSD -D_SYSTYPE_BSD -Dbsd4_2 -Dhost_mips -Dmips -Dultrix -Dunix"
+#endif
+
+#define ASM_SPEC "\
+%{!mgas: \
+	%{!mrnames: %{!.s:-nocpp} %{.s: %{cpp} %{nocpp}}} \
+	%{pipe:%e:-pipe not supported} \
+	%{EL} %{!EL:-EL} \
+	%{EB: %e-EB not supported} \
+	%{mips1} %{mips2} %{mips3} \
+	%{O:-O2} %{O1:-O2} %{O2:-O2} %{O3:-O3} \
+	%{g} %{g0} %{g1} %{g2} %{g3} %{v} %{K}} \
+%{G*}"
+
+#define CPP_SPEC "\
+%{.S:	-D__LANGUAGE_ASSEMBLY__ -D__LANGUAGE_ASSEMBLY %{!ansi:-DLANGUAGE_ASSEMBLY}} \
+%{.cc:	-D__LANGUAGE_C_PLUS_PLUS__ -D__LANGUAGE_C_PLUS_PLUS} \
+%{.cxx:	-D__LANGUAGE_C_PLUS_PLUS__ -D__LANGUAGE_C_PLUS_PLUS} \
+%{.C:	-D__LANGUAGE_C_PLUS_PLUS__ -D__LANGUAGE_C_PLUS_PLUS} \
+%{.m:	-D__LANGUAGE_OBJECTIVE_C__ -D__LANGUAGE_OBJECTIVE_C} \
+%{!.S:	-D__LANGUAGE_C__  -D__LANGUAGE_C %{!ansi:-DLANGUAGE_C}}"
+
+#define LINK_SPEC "\
+%{G*} \
+%{!mgas: \
+	%{EL} %{!EL: -EL} \
+	%{EB: %e-EB not supported} \
+	%{mips1} %{mips2} %{mips3} \
+	%{bestGnum}}"
+
+#define LIB_SPEC "%{p:-lprof1} %{pg:-lprof1} -lc"
+
+#define STARTFILE_SPEC "%{pg:gcrt0.o%s}%{!pg:%{p:mcrt0.o%s}%{!p:crt0.o%s}}"
+
+/* For compatibility with types.h.  */
+#define SIZE_TYPE "unsigned int"
+
+#define MACHINE_TYPE "DECstation running ultrix"
+
+/* Use atexit for static constructors/destructors, instead of defining
+   our own exit function.  Ultrix 4.x has this, 3.x probably does not.  */
+#define HAVE_ATEXIT
+
+/* Generate calls to memcpy, etc., not bcopy, etc.  */
+#define TARGET_MEM_FUNCTIONS
+
+#include "mips.h"

gnu/gcc/gcc-2.2.2/config/dpx2.h

@@ -0,0 +1,159 @@
+/*
+ * dpx2.h - Bull DPX/2 200 and 300 systems (m68k, SysVr3)
+ *
+ * $Id: dpx2.h,v 1.3 1992/05/21 08:04:22 rms Exp $
+ */
+
+#include "m68k.h"
+#undef SELECT_RTX_SECTION
+#include "svr3.h"
+
+/* See m68k.h.  7 means 68020 with 68881. 
+ * We really have 68030, but this will get us going.  
+ */
+#ifndef TARGET_DEFAULT
+#define TARGET_DEFAULT 7
+#endif
+
+#define OBJECT_FORMAT_COFF
+#define NO_SYS_SIGLIST
+
+#ifdef CPP_PREDEFINES
+#undef CPP_PREDEFINES
+#endif
+/*
+ * define all the things the compiler should
+ */
+#ifdef ncl_mr
+# define CPP_PREDEFINES "-Dunix -Dbull -DDPX2 -DSVR3 -Dmc68000 -Dmc68020 -Dncl_mr=1"
+#else
+# ifdef ncl_el
+# define CPP_PREDEFINES "-Dunix -Dbull -DDPX2 -DSVR3 -Dmc68000 -Dmc68020 -Dncl_el"
+# else
+#   define CPP_PREDEFINES "-Dunix -Dbull -DDPX2 -DSVR3 -Dmc68000 -Dmc68020"
+# endif
+#endif
+
+#undef	CPP_SPEC
+/*
+ * use -ansi to imply POSIX and XOPEN and BULL source
+ * no -ansi implies _SYSV
+ */
+# define CPP_SPEC "%{ansi:-D_POSIX_SOURCE -D_XOPEN_SOURCE -D_BULL_SOURCE}\
+ %{!ansi:-D_SYSV}"
+
+#undef ASM_LONG
+#define ASM_LONG "\t.long"
+
+#define HAVE_ATEXIT
+#undef DO_GLOBAL_CTORS_BODY		/* don't use svr3.h version */
+#undef DO_GLOBAL_DTORS_BODY
+  
+#if 0 /* def DEBUG */
+/*
+ * find out where cc1 aborts
+ */
+#define abort() do { fprintf(stderr, "%s: aborting at line %d\n", \
+			     __FILE__, __LINE__); \
+ kill(getpid(), 6); } while (0)
+#endif
+
+/* 
+ * svr3.h says to use BSS_SECTION_FUNCTION
+ * but no one appears to, and there is
+ * no definition for m68k.
+ */
+#ifndef BSS_SECTION_FUNCTION
+# undef EXTRA_SECTION_FUNCTIONS
+# define EXTRA_SECTION_FUNCTIONS	\
+  CONST_SECTION_FUNCTION		\
+  INIT_SECTION_FUNCTION			\
+  FINI_SECTION_FUNCTION
+#endif
+
+#ifndef USE_GAS
+/*
+ * handle the native assembler.
+ * this does NOT yet work, there is much left to do.
+ * use GAS for now...
+ */
+#undef ASM_OUTPUT_SOURCE_FILENAME
+#define ASM_OUTPUT_SOURCE_FILENAME(FILE, NA)	\
+  do { fprintf ((FILE), "\t.file\t'%s'\n", (NA)); } while (0)
+
+/* 
+ * we don't seem to support any of:
+ * .globl
+ * .even
+ * .align
+ * .ascii
+ */
+#undef ASM_GLOBALIZE_LABEL
+#define ASM_GLOBALIZE_LABEL(FILE,NAME) while (0)
+#undef ASM_OUTPUT_ALIGN
+#define ASM_OUTPUT_ALIGN(asm_out_file, align) while (0)
+#define STRING_LIMIT	(0)
+#undef ASM_APP_ON
+#define ASM_APP_ON ""
+#undef ASM_APP_OFF
+#define ASM_APP_OFF ""
+/*
+ * dc.b 'hello, world!'
+ * dc.b 10,0
+ * is how we have to output "hello, world!\n"
+ */
+#undef ASM_OUTPUT_ASCII
+#define ASM_OUTPUT_ASCII(asm_out_file, p, thissize)	\
+  do { register int i, c, f=0;			\
+  for (i = 0; i < thissize; i++) { 		\
+    c = p[i];					\
+    if (c == '\'' || c < ' ' || c > 127) {	\
+      switch(f) {				\
+      case 0: /* need to output dc.b etc */	\
+	fprintf(asm_out_file, "\tdc.b %d", c);	\
+	f=1;					\
+	break;					\
+      case 1:					\
+	fprintf(asm_out_file, ",%d", c);	\
+	break;					\
+      default:					\
+	/* close a string */			\
+	fprintf(asm_out_file, "'\n\tdc.b %d", c); \
+	f=1;					\
+	break;					\
+      }						\
+    } else {					\
+      switch(f) {				\
+      case 0:					\
+	fprintf(asm_out_file, "\tdc.b '%c", c);	\
+	f=2;					\
+	break;					\
+      case 2:					\
+	fprintf(asm_out_file, "%c", c);		\
+	break;					\
+      default:					\
+	fprintf(asm_out_file, "\n\tdc.b '%c", c); \
+	f=2;					\
+	break;					\
+      }						\
+    }						\
+  }						\
+  if (f==2)					\
+    putc('\'', asm_out_file);			\
+  putc('\n', asm_out_file); } while (0)
+
+/* This is how to output an insn to push a register on the stack.
+   It need not be very fast code.  */
+
+#undef ASM_OUTPUT_REG_PUSH
+#define ASM_OUTPUT_REG_PUSH(FILE,REGNO)  \
+  fprintf (FILE, "\tmove.l %s,-(sp)\n", reg_names[REGNO])
+
+/* This is how to output an insn to pop a register from the stack.
+   It need not be very fast code.  */
+
+#undef ASM_OUTPUT_REG_POP
+#define ASM_OUTPUT_REG_POP(FILE,REGNO)  \
+  fprintf (FILE, "\tmove.l (sp)+,%s\n", reg_names[REGNO])
+			
+#endif /* ! use gas */			

gnu/gcc/gcc-2.2.2/config/dpx2g.h

@@ -0,0 +1,42 @@
+/*
+ * dpx2g.h - Bull DPX/2 200 and 300 systems (m68k, SysVr3) with gas
+ * 
+ * $Id: dpx2g.h,v 1.1 1992/03/27 21:26:48 rms Exp $
+ */
+
+#define USE_GAS
+#include "dpx2.h"
+
+
+/* GAS want's DBX debugging information.  */
+#undef SDB_DEBUGGING_INFO
+#ifndef DBX_DEBUGGING_INFO
+#define DBX_DEBUGGING_INFO
+#endif
+
+/*
+ * we are using GAS
+ */
+#undef EXTRA_SECTION_FUNCTIONS
+#undef EXTRA_SECTIONS
+
+/*
+ * put const's in the text section
+ */
+#define const_section()  text_section()
+#define fini_section() while (0)
+			       
+#if 0					/* this is fixed in 2.1 */
+#undef ASM_OUTPUT_ALIGN
+#define ASM_OUTPUT_ALIGN(FILE,LOG)	\
+  if ((LOG) >= 1)			\
+    fprintf (FILE, "\t.even\n");	
+#endif
+
+#undef CTORS_SECTION_ASM_OP
+#define CTORS_SECTION_ASM_OP "\t.data"
+#undef DTORS_SECTION_ASM_OP
+#define DTORS_SECTION_ASM_OP "\t.data"
+#undef INIT_SECTION_ASM_OP
+
+/* end of dpx2g.h */

gnu/gcc/gcc-2.2.2/config/encore.h

@@ -0,0 +1,188 @@
+/* Definitions of target machine for GNU compiler.  ENCORE NS32000 version.
+   Copyright (C) 1988 Free Software Foundation, Inc.
+   Adapted by Robert Brown (brown@harvard.harvard.edu) from the Sequent
+     version by Michael Tiemann (tiemann@mcc.com).
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GNU CC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GNU CC; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+
+#define EXTERNAL_PREFIX '?'
+#define IMMEDIATE_PREFIX '$'
+
+#include "ns32k.h"
+
+#define SDB_DEBUGGING_INFO
+#undef DBX_REGISTER_NUMBER
+#define DBX_REGISTER_NUMBER(REGNO) (REGNO)
+
+/* Cause long-jump assembler to be used,
+   since otherwise some files fail to be assembled right.  */
+#define ASM_SPEC "-j"
+
+#undef ASM_FILE_START
+#undef ASM_GENERATE_INTERNAL_LABEL
+#undef ASM_OUTPUT_ADDR_DIFF_ELT
+#undef ASM_OUTPUT_ALIGN
+#undef ASM_OUTPUT_ASCII
+#undef ASM_OUTPUT_DOUBLE
+#undef ASM_OUTPUT_INT
+#undef ASM_OUTPUT_INTERNAL_LABEL
+#undef ASM_OUTPUT_LOCAL
+#undef CPP_PREDEFINES
+#undef FUNCTION_BOUNDARY
+#undef PRINT_OPERAND
+#undef PRINT_OPERAND_ADDRESS
+#undef TARGET_VERSION
+#undef FUNCTION_PROFILER
+#undef ASM_OUTPUT_LABELREF_AS_INT
+
+#define TARGET_DEFAULT 9  /* 32332 with 32081.  */
+#define TARGET_VERSION fprintf (stderr, " (32000, Encore syntax)");
+/* Note Encore does not standardly do -Dencore.  */
+/* budd: should have a -ns32332 (or -apc) switch! but no harm for now */
+#define CPP_PREDEFINES "-Dns32000 -Dn16 -Dns16000 -Dns32332 -Dunix"
+
+/* Ignore certain cpp directives used in header files on sysV.  */
+#define SCCS_DIRECTIVE
+
+/* Output #ident as a .ident.  */
+#define ASM_OUTPUT_IDENT(FILE, NAME) fprintf (FILE, "\t.ident \"%s\"\n", NAME);
+
+/* The .file command should always begin the output.  */
+#define ASM_FILE_START(FILE) \
+output_file_directive ((FILE), main_input_filename)
+
+#define FUNCTION_BOUNDARY 128		/* speed optimization */
+
+/*
+ *  The Encore assembler uses ".align 2" to align on 2-byte boundaries.
+ */
+
+#define ASM_OUTPUT_ALIGN(FILE,LOG)					\
+	fprintf (FILE, "\t.align %d\n", 1 << (LOG))
+
+/*
+ *  Internal labels are prefixed with a period.
+ */
+
+#define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM)			\
+	sprintf (LABEL, "*.%s%d", PREFIX, NUM)
+#define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM)			\
+	fprintf (FILE, ".%s%d:\n", PREFIX, NUM)
+#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL)			\
+	fprintf (FILE, "\t.word .L%d-.LI%d\n", VALUE, REL)
+
+/*
+ *  Different syntax for integer constants, double constants, and
+ *  uninitialized locals.
+ */
+
+#define ASM_OUTPUT_INT(FILE,VALUE)				\
+( fprintf (FILE, "\t.double "),					\
+  output_addr_const (FILE, (VALUE)),				\
+  fprintf (FILE, "\n"))
+
+#define ASM_OUTPUT_LABELREF_AS_INT(STREAM, NAME)			\
+do {									\
+  fprintf (STREAM, "\t.double\t");					\
+  ASM_OUTPUT_LABELREF (STREAM, NAME);					\
+  fprintf (STREAM, "\n");						\
+} while (0)
+
+
+#define ASM_OUTPUT_DOUBLE(FILE,VALUE)				\
+ fprintf (FILE, "\t.long 0f%.20e\n", (VALUE))
+
+#define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED)		\
+( fputs ("\t.bss ", (FILE)),					\
+  assemble_name ((FILE), (NAME)),				\
+  fprintf ((FILE), ",%u,%u\n", (SIZE), (ROUNDED)))
+
+ /*
+  *  Encore assembler can't handle huge string constants like the one in
+  *  gcc.c.  If the default routine in varasm.c were more conservative, this
+  *  code could be eliminated.  It starts a new .ascii directive every 40
+  *  characters.
+  */
+
+#define ASM_OUTPUT_ASCII(file, p, size)			\
+{							\
+  for (i = 0; i < (size); i++)				\
+    {							\
+      register int c = (p)[i];				\
+      if ((i / 40) * 40 == i)				\
+      if (i == 0)					\
+        fprintf ((file), "\t.ascii \"");		\
+      else						\
+        fprintf ((file), "\"\n\t.ascii \"");		\
+      if (c == '\"' || c == '\\')			\
+        putc ('\\', (file));				\
+      if (c >= ' ' && c < 0177)				\
+        putc (c, (file));				\
+      else						\
+        {						\
+          fprintf ((file), "\\%o", c);			\
+          if (i < (size) - 1 				\
+              && (p)[i + 1] >= '0' && (p)[i + 1] <= '9')\
+          fprintf ((file), "\"\n\t.ascii \"");		\
+        }						\
+    }							\
+  fprintf ((file), "\"\n");				\
+}
+
+/* Modify syntax of jsr instructions.  */
+#define CALL_MEMREF_IMPLICIT
+
+#define NO_ABSOLUTE_PREFIX_IF_SYMBOLIC
+
+#define PRINT_OPERAND(FILE, X, CODE) print_operand(FILE, X, CODE)
+
+#define PRINT_OPERAND_ADDRESS(FILE, ADDR)  print_operand_address(FILE, ADDR)
+
+/* Change the way in which data is allocated and initialized on the
+   encore so that both private and shared data are supported.  Shared data
+   that is initialized must be contained in the ".shrdata" section
+   of the program.  This is accomplished by defining the SHARED_SECTION_ASM_OP
+   macro.  Share data that is simply allocated, and not initialized must
+   be prefixed with the ".shrcomm" or ".shrbss" pseudo op, for common or
+   local data respectively.  This is accomplished by redefining the
+   ASM_OUTPUT_COMMON and ASM_OUTPUT_LOCAL macros. */
+    
+/* Assembler pseudo-op for shared data segment. */
+
+#define SHARED_SECTION_ASM_OP ".shrdata"
+
+/* This says how to output an assembler line
+   to define a shared common symbol. */
+
+#define ASM_OUTPUT_SHARED_COMMON(FILE, NAME, SIZE, ROUNDED) \
+( fputs (".shrcomm ", (FILE)),			\
+  assemble_name ((FILE), (NAME)),		\
+  fprintf ((FILE), ",%d\n", (ROUNDED)))
+
+/* This says how to output an assembler line
+   to define a shared local symbol. */
+
+#define ASM_OUTPUT_SHARED_LOCAL(FILE, NAME, SIZE, ROUNDED) \
+( fputs ("\t.shrbss ", (FILE)),				\
+  assemble_name ((FILE), (NAME)),			\
+  fprintf ((FILE), ",%d,%d\n", (SIZE), (ROUNDED)))
+
+#define FUNCTION_PROFILER(FILE, LABELNO)  \
+   fprintf (FILE, "\taddr .LP%d,r0\n\tjsr mcount\n", (LABELNO))
+
+#define ENCORE_ASM

gnu/gcc/gcc-2.2.2/config/encrose.h

@@ -0,0 +1,283 @@
+/* Definitions of target machine for GNU compiler.  
+   Encore Multimax (OSF/1 with OSF/rose) version.
+   Copyright (C) 1991 Free Software Foundation, Inc.
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GNU CC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GNU CC; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+/* Output a '?' so the encore assembler won't complain about
+ * externals on branches it hasn't seen yet. */
+
+#define EXTERNAL_PREFIX '?'
+
+#include "encore.h"
+
+/* External variables defined in ns32k.c */
+
+extern int ns32k_num_files;
+
+
+#define OSF_OS
+#define NO_J_SWITCH
+
+/* MACHINE MACROS controlling the compilation driver, 'gcc' */
+
+#ifdef  CPP_SPEC  
+#undef  CPP_SPEC
+#endif
+#define CPP_SPEC       "%{.S:	-D__LANGUAGE_ASSEMBLY__			\
+				-D_LANGUAGE_ASSEMBLY			\
+				%{!ansi:-DLANGUAGE_ASSEMBLY}}		\
+			 %{!.S:	-D__LANGUAGE_C__			\
+				-D_LANGUAGE_C				\
+				%{!ansi:-DLANGUAGE_C}}"
+
+#ifdef  CC1_SPEC
+#undef  CC1_SPEC
+#endif
+#define CC1_SPEC       ""
+
+#ifndef NO_J_SWITCH
+#ifdef  ASM_SPEC
+#undef  ASM_SPEC
+#endif
+#define ASM_SPEC       "%{!j: -j}"
+#endif
+
+#ifdef NO_J_SWITCH
+#ifdef ASM_SPEC
+#undef ASM_SPEC
+#endif
+#define ASM_SPEC       ""
+#endif
+
+#ifdef  LINK_SPEC
+#undef  LINK_SPEC
+#endif
+#define LINK_SPEC      "%{nostdlib}"
+
+#ifdef  LIB_SPEC
+#undef  LIB_SPEC
+#endif
+#define LIB_SPEC       "%{p:-lprof1} -lc"
+
+#ifdef  LIBG_SPEC
+#undef  LIBG_SPEC
+#endif
+#define LIBG_SPEC      ""
+
+#ifdef  STARTFILE_SPEC  
+#undef  STARTFILE_SPEC
+#endif
+#define STARTFILE_SPEC "%{pg:gcrt0.o%s}%{!pg:%{p:mcrt0.o%s}%{!p:crt0.o%s}}"
+
+#ifdef  MACHINE_TYPE
+#undef  MACHINE_TYPE
+#endif
+#define MACHINE_TYPE   "Encore Multimax running OSF/1 with OSF/rose objects"
+
+#ifdef  ASM_VERSION
+#undef  ASM_VERSION
+#endif
+#define ASM_VERSION    "Encore syntax using GAS/stabs"
+
+#ifdef  MD_EXEC_PREFIX  
+#undef  MD_EXEC_PREFIX
+#endif
+#define MD_EXEC_PREFIX		"/usr/ccs/gcc/"
+
+#ifdef  MD_STARTFILE_PREFIX  
+#undef  MD_STARTFILE_PREFIX
+#endif
+#define MD_STARTFILE_PREFIX	"/usr/ccs/lib/"
+
+/* MACHINE MACROS controlling run-time target specification */
+
+#ifdef CPP_PREDEFINES
+#undef CPP_PREDEFINES
+#endif
+#define CPP_PREDEFINES "-Dns32000 -Dn16 -Dns16000 -Dns32332 -Dunix -Dmultimax -DMULTIMAX -DOSF -DOSF1"
+
+#ifdef  TARGET_DEFAULT
+#undef  TARGET_DEFAULT
+#endif
+#define TARGET_DEFAULT   33  /* 32081 and no (sb) register */
+
+/* MACHINE MACROS controlling the layout of C types */
+
+#ifdef SIZE_TYPE  
+#undef SIZE_TYPE
+#endif
+#define SIZE_TYPE	"long unsigned int"
+
+#ifdef  PTRDIFF_TYPE
+#undef  PTRDIFF_TYPE
+#endif
+#define PTRDIFF_TYPE	"int"
+
+#ifdef  WCHAR_TYPE
+#undef  WCHAR_TYPE
+#endif
+#define WCHAR_TYPE	"unsigned int"
+
+#ifdef WCHAR_TYPE_SIZE
+#undef WCHAR_TYPE_SIZE
+#endif
+#define WCHAR_TYPE_SIZE  BITS_PER_WORD
+
+#if 0
+#define WCHAR_TYPE	((TARGET_WC8)					\
+				? "unsigned char"			\
+				: ((TARGET_WC16)			\
+					? "short unsigned int"		\
+					: "long unsigned int"))
+#define MULTIBYTE_CHARS  1
+#endif
+
+/* MACHINE MACROS describing stack layout and calling conventions */
+
+
+#ifdef  FUNCTION_PROFILER
+#undef  FUNCTION_PROFILER
+#endif
+#define FUNCTION_PROFILER(FILE, LABELNO) fprintf (FILE, "\tjsr mcount\n")
+
+/* MACHINE MACROS describing the overall framework of an
+   assembly file */
+
+#ifdef PRINT_OPERAND
+#undef PRINT_OPERAND
+#endif
+
+#define PRINT_OPERAND(FILE, X, CODE)       print_operand(FILE, X, CODE)
+
+#ifdef PRINT_OPERAND_ADDRESS
+#undef PRINT_OPERAND_ADDRESS
+#endif
+
+#define PRINT_OPERAND_ADDRESS(FILE, ADDR)  print_operand_address(FILE, ADDR)
+
+#define STABS_DIRECTIVE	"\t.stabs"	/* align .stabs */
+#define STABN_DIRECTIVE	"\t.stabn"	/* align .stabn */
+#define STABD_DIRECTIVE	"\t.stabd"	/* align .stabd */
+
+/* How to tell the debugger about changes of source files.  */
+
+#ifdef ASM_OUTPUT_SOURCE_FILENAME
+#undef ASM_OUTPUT_SOURCE_FILENAME
+#endif
+
+/* Perhaps it is no longer necessary to redefine this, now that dbxout.c
+   uses another macro instead.  */
+#define ASM_OUTPUT_SOURCE_FILENAME(FILE, NAME)				\
+{									\
+  if (ns32k_num_files++ == 0)						\
+    fprintf (FILE, "\t.file \"%s\"\n", NAME);				\
+  else if (write_symbols == DBX_DEBUG)					\
+  {                                                                     \
+    char ltext_label_name[100];                                         \
+    ASM_GENERATE_INTERNAL_LABEL(ltext_label_name, "Ltext", 0);          \
+    fprintf (FILE, "%s \"%s\",%d,0,0,%s\n", STABS_DIRECTIVE,		\
+	     NAME, 0x84 /* N_SOL */, &ltext_label_name[1]);		\
+  }                                                                     \
+  else									\
+    fprintf (FILE, "\t#.file \"%s\"\n", NAME);				\
+}
+
+/* This is how to output a note the debugger telling it the line number
+   to which the following sequence of instructions corresponds.  */
+
+#ifdef ASM_OUTPUT_SOURCE_LINE
+#undef ASM_OUTPUT_SOURCE_LINE
+#endif
+#define ASM_OUTPUT_SOURCE_LINE(FILE, LINE)				\
+{									\
+  if (write_symbols != DBX_DEBUG)					\
+    fprintf (FILE, "\t.ln %d\n", LINE);					\
+  else									\
+    fprintf (file, "%s %d,0,%d\n", STABD_DIRECTIVE, 0x44 /* N_SLINE */,	\
+	     LINE);							\
+}
+
+#ifdef ASM_OUTPUT_INT
+#undef ASM_OUTPUT_INT
+#endif
+#ifndef COLLECT
+#define ASM_OUTPUT_INT(FILE,VALUE)				\
+( fprintf (FILE, "\t.double "),					\
+  output_addr_const (FILE, (VALUE)),				\
+  fprintf (FILE, "\n"))
+#else
+#define ASM_OUTPUT_INT(STREAM,VALUE)					\
+  fprintf (STREAM, "\t.double\t%d\n", VALUE)
+#endif
+
+/* MACHINE MACROS describing debugging information */
+
+/* We need to have the capability to generate either
+   .stabs or COFF style debug info. The file ns32k.h
+   define DBX_DEBUGGING_INFO. We disambiguate between
+   the two based on a combination of command line or
+   default behavior. */
+
+#ifndef SDB_DEBUGGING_INFO
+#define SDB_DEBUGGING_INFO  /* Generate COFF style debug info */
+#endif
+
+#ifndef DBX_DEBUGGING_INFO
+#define DBX_DEBUGGING_INFO  /* Generate .stabs style debug info */
+#endif
+
+/* If the user just types -g, we want to use stabs */
+
+#ifdef PREFERRED_DEBUGGING_TYPE
+#undef PREFERRED_DEBUGGING_TYPE
+#endif
+
+#define PREFERRED_DEBUGGING_TYPE      DBX_DEBUG
+
+/* Define the gdb extensions */
+
+#define DEFAULT_GDB_EXTENSIONS        1
+
+/* Tell collect that the object format is OSF/rose.  */
+#define OBJECT_FORMAT_ROSE
+
+/* Use atexit for static constructors/destructors, instead of defining
+   our own exit function.  */
+#define HAVE_ATEXIT
+
+/* Generate calls to memcpy, etc., not bcopy, etc.  */
+#define TARGET_MEM_FUNCTIONS
+
+/* A C statement to output assembler commands which will identify
+   the object file as having been compiled with GNU CC (or another
+   GNU compiler).
+
+   If you don't define this macro, the string `gcc2_compiled.:' is
+   output.  This string is calculated to define a symbol which, on
+   BSD systems, will never be defined for any other reason.  GDB
+   checks for the presence of this symbol when reading the symbol
+   table of an executable.
+
+   On non-BSD systems, you must arrange communication with GDB in
+   some other fashion.  If GDB is not used on your system, you can
+   define this macro with an empty body.
+
+   On OSF/1, gcc2_compiled. confuses the kernel debugger, so don't
+   put it out.  */
+
+#define ASM_IDENTIFY_GCC(STREAM)

gnu/gcc/gcc-2.2.2/config/fx2800.h

@@ -0,0 +1,337 @@
+/* Target definitions for GNU compiler for Alliant FX/2800
+   running Concentrix 2.2
+
+   Copyright (C) 1991 Free Software Foundation, Inc.
+
+   Written by Howard Chu (hyc@hanauma.jpl.nasa.gov).
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GNU CC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GNU CC; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+#define OUTPUT_TDESC
+
+#include "i860v4.h"
+
+/* The Alliant fx2800 running Concentrix 2.x is weird.  This is basically
+   a BSD 4.3 based operating system, but it uses svr4 ELF format object
+   files and it somehow puts BSD stabs records into the ELF files for
+   symbolic debug information.  The assembler is "mostly an SVR4 assembler
+   with some Alliant additions. We based it on the `Intel 80860 Assembly
+   Language Specification' from AT&T." */
+
+/* This file consists of three sections. The first section establishes
+   definitions unique to the Alliant FX/2800. The next section reconciles
+   differences between Alliant and i860v4.h, and the last overrides the
+   remaining differences with svr4.h */
+
+#undef TARGET_VERSION
+#define TARGET_VERSION fprintf (stderr, " (i860 Alliant)");
+
+/* atexit is not present prior to Concentrix 2.2. Uncomment the following
+   if you're on 2.1 or older. */
+ 
+/* #undef HAVE_ATEXIT */
+
+#define I860_STRICT_ABI_PROLOGUES
+
+/* Most of the Alliant-specific definitions here are to get stab info that
+   Alliant's dbx can understand. */
+
+#define DBX_DEBUGGING_INFO
+#define DEFAULT_GDB_EXTENSIONS 0
+#define DBX_NO_XREFS
+#define DBX_NO_EXTRA_TAGS
+
+/* Alliant dbx also needs to see the function stab before anything
+   else in the function. */
+
+#define DBX_FUNCTION_FIRST
+#define DBX_LBRAC_FIRST
+
+/* Alliant dbx also needs to see the end of a function somewhere. */
+
+#define DBX_OUTPUT_FUNCTION_END(file,decl)	\
+	fprintf (file, ".stab \"\",.,0x%x,0,0\n", N_EFUN)
+
+/* Alliant dbx has predefined types, so they must be emitted with the
+   proper type numbers. The defined types are:
+
+     Type #	C, Fortran, Pascal Types
+	--	------------------------
+	 1	char, integer*1
+	 2	short, 	integer*2
+	 3	int, long, integer*4, integer
+	 4	logical*1, byte
+	 5	logical*2
+	 6	logical*4, logical
+	 7	float, real*4, 	real
+	 8	double, real*8,	double
+	 9	single complex, complex*8, complex
+	10	double complex, doublecomplex
+	11	character
+	12	void
+	13	nil
+	14	boolean
+	15	unsigned char, ubyte
+	16	unsigned short, uword
+	17	unsigned, unsigned int, unsigned long, ulong
+	18	quad, logical*8
+	19	long long, integer*8
+	20	unsigned long long, uquad*8
+    21-100	reserved for future predefined types
+	100	long redefine same as 3
+	101	unsigned long same as 17
+	--	--------------------
+	102	First user program type
+
+   Since long and unsigned long are int references, they must be handled
+   as special cases. The Alliant compiler doesn't use types 18-20, so it
+   sets long & unsigned long in 18 & 19, not in 100 & 101 as shown above. */
+
+#define DBX_OUTPUT_STANDARD_TYPES(syms)	\
+{ char *dtyps[]={"", "char", "short int", "int", "logical*1",		\
+	"logical*2", "logical*4", "float", "double", "complex",		\
+	"doublecomplex", "character", "void", "nil", "boolean",		\
+	"unsigned char", "short unsigned int", "unsigned int",		\
+	"logical*8", "long long int", "long long unsigned int",""};	\
+									\
+  tree decl;								\
+  int i;								\
+									\
+  for (i=1;*dtyps[i];i++)						\
+    for (decl = syms; decl; decl = TREE_CHAIN(decl))			\
+	if ((TREE_CODE (decl) == TYPE_DECL) &&				\
+	    !strcmp(IDENTIFIER_POINTER(DECL_NAME(decl)), dtyps[i])) {	\
+		TYPE_SYMTAB_ADDRESS (TREE_TYPE (decl)) = i;		\
+		typevec[i] = TYPE_DEFINED;				\
+		dbxout_symbol (decl, 0);				\
+		break;							\
+	}								\
+									\
+  for (decl = syms; decl; decl = TREE_CHAIN(decl))			\
+    if ((TREE_CODE (decl) == TYPE_DECL) &&				\
+	!strcmp(IDENTIFIER_POINTER(DECL_NAME(decl)),"long int")) {	\
+      TYPE_SYMTAB_ADDRESS (TREE_TYPE (decl)) = i;			\
+      typevec[i] = TYPE_DEFINED;					\
+      fprintf(asmfile,".stab \"long int:t%d=3\",0,0x%x,0,0\n",		\
+		i++,N_LSYM);						\
+      TREE_ASM_WRITTEN (decl) = 1;					\
+      break;								\
+    }									\
+									\
+  for (decl = syms; decl; decl = TREE_CHAIN(decl))			\
+    if ((TREE_CODE (decl) == TYPE_DECL) && !strcmp(			\
+	IDENTIFIER_POINTER(DECL_NAME(decl)),"long unsigned int")) {	\
+      TYPE_SYMTAB_ADDRESS (TREE_TYPE (decl)) = i;			\
+      typevec[i] = TYPE_DEFINED;					\
+      fprintf(asmfile,".stab \"long unsigned int:t%d=17\",0,0x%x,0,0\n",\
+		i++,N_LSYM);						\
+      TREE_ASM_WRITTEN (decl) = 1;					\
+      break;								\
+    }									\
+  next_type_number = i; };
+
+/* Alliant dbx doesn't understand split names... */
+
+#define DBX_CONTIN_LENGTH 0
+
+/* The syntax for stabs records is also different; there is only a single
+   ".stab" directive instead of the 3 directives in BSD, and the order of
+   arguments is slightly changed. */
+
+#define ASM_STABS_OP	".stab"
+#define ASM_STABN_OP	".stab"
+#define ASM_STABD_OP	".stab"
+
+#define DBX_MEMPARM_STABS_LETTER 'k'
+#define DBX_REGPARM_STABS_LETTER 'r'
+
+#define ASM_OUTPUT_SOURCE_LINE(file,num)		\
+	fprintf (file, "\t.stab \"\",.,0x%x,0,%d\n",	\
+		N_SLINE,num)
+
+#if 0	/* Alliant dbx only reads first N_SO, so it
+	   ignores the filename if dir is present. */
+#define DBX_OUTPUT_MAIN_SOURCE_DIRECTORY(file,name)		\
+	fprintf (file, ".stab \"%s/\",.Ltext0,0x%x,0,0\n",	\
+		name, N_SO)
+#else
+#define DBX_OUTPUT_MAIN_SOURCE_DIRECTORY(file,name)
+#endif
+
+#define DBX_OUTPUT_MAIN_SOURCE_FILENAME(file,name)		\
+	fprintf (file, ".stab \"%s\",.Ltext0,0x%x,0,0\n",	\
+		name, N_SO);					\
+	text_section ();					\
+	ASM_OUTPUT_INTERNAL_LABEL (file, "Ltext", 0)
+
+#define DBX_OUTPUT_SOURCE_FILENAME(file,name)			\
+	fprintf (file, ".stab \"%s\",.Ltext0,0x%x,0,0\n",	\
+		name, N_SOL);
+
+#define DBX_OUTPUT_CONSTANT_SYMBOL(file,name,ival)		\
+	fprintf (file, ".stab \"%s:c=i%d\",0,0x%x,0,0\n",	\
+		name, ival, N_LSYM)
+
+#define DBX_FINISH_SYMBOL(decl)	\
+	int line = 0;						\
+	fprintf (asmfile, "\",");				\
+	if (current_sym_addr)					\
+	  output_addr_const (asmfile, current_sym_addr);	\
+	else							\
+	  fprintf (asmfile, "%d", current_sym_value);		\
+	if (decl != 0 && TREE_CODE(decl) == FUNCTION_DECL)	\
+	  line=DECL_SOURCE_LINE (decl);				\
+	fprintf (asmfile, ",0x%x,%d,%d\n", current_sym_code,	\
+	  line!=0?64:0,line)
+
+#define DBX_OUTPUT_CATCH(file,decl,name)		\
+  fprintf (file, ".stab \"%s:C1\",",			\
+	   IDENTIFIER_POINTER (DECL_NAME (decl)));	\
+  assemble_name (file, name);				\
+  fprintf (file, ",0x%x,0,0\n", N_CATCH)
+
+#define DBX_OUTPUT_LBRAC(file,name)	\
+  if (depth > 1) {			\
+    fprintf (file, ".stab \"\",");	\
+    assemble_name (file, name);		\
+    fprintf (file, ",0x%x,0,%d\n", N_LBRAC, depth); }
+
+#define DBX_OUTPUT_RBRAC(file,name)	\
+  if (depth > 1) {			\
+    fprintf (file, ".stab \"\",");	\
+    assemble_name (file, name);		\
+    fprintf (file, ",0x%x,0,%d\n", N_RBRAC, depth); }
+
+#define DBX_OUTPUT_ENUM(file,type)				\
+  fprintf (file, "e3");						\
+  CHARS(2);							\
+  for (tem = TYPE_VALUES (type); tem; tem = TREE_CHAIN (tem))	\
+    {								\
+      fprintf (asmfile, "%s:%d,",				\
+	       IDENTIFIER_POINTER (TREE_PURPOSE (tem)),		\
+	       TREE_INT_CST_LOW (TREE_VALUE (tem)));		\
+      CHARS (11 + IDENTIFIER_LENGTH (TREE_PURPOSE (tem)));	\
+      if (TREE_CHAIN (tem) != 0)				\
+	CONTIN;							\
+    }								\
+  putc (';', asmfile);						\
+  CHARS (1);
+
+/* Undefine some things defined in i860.h because the native C compiler
+   on the FX/2800 emits code to do these operations inline.  For GCC,
+   we will use the default implementation of these things... i.e.
+   generating calls to libgcc1 routines.  */
+
+#undef DIVSI3_LIBCALL
+#undef UDIVSI3_LIBCALL
+#undef REMSI3_LIBCALL
+#undef UREMSI3_LIBCALL
+
+/* The Alliant compiler's mod function gives the wrong result after a
+   shift operation. This bug typically hits in hash functions. */
+
+#define perform_umodsi3(a, b)	a %= b; if (a == b) a=0; return a
+#define perform_modsi3(a, b)	a %= b; if (a == b) a=0; return a
+
+/* Global pointer needs to be 8 byte aligned? Link error if not... */
+
+#define DATA_ALIGNMENT(dummy,align)	\
+	((TREE_PUBLIC (decl) &&	\
+	 (TREE_CODE (TREE_TYPE (decl))==POINTER_TYPE)) ? 64:align)
+
+#undef FUNCTION_PROFILER
+#define FUNCTION_PROFILER(FILE, LABELNO)	\
+	fprintf (FILE, "\tcall __mcount_\n\tnop\n")
+
+/* Overrides for i860v4.h begin here */
+
+/* Provide a set of pre-definitions and pre-assertions appropriate for
+   the i860 running Concentrix 2.x.  */
+
+#undef CPP_PREDEFINES 
+#define CPP_PREDEFINES "-Di860 -Dunix -DBSD4_3 -Dalliant -Asystem(unix) -Acpu(i860) -Amachine(i860)"
+
+#undef I860_REG_PREFIX
+#undef ASM_COMMENT_START
+#define ASM_COMMENT_START "//"
+
+/* Use definitions of ASM_OUTPUT_{DOUBLE,FLOAT} as given in i860.h */
+
+#undef ASM_OUTPUT_DOUBLE
+#define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
+  fprintf(FILE, "\t.double %.20e\n", (VALUE))
+#undef ASM_OUTPUT_FLOAT
+#define ASM_OUTPUT_FLOAT(FILE,VALUE) \
+  fprintf(FILE, "\t.float %.12e\n", (VALUE))
+
+#undef ASM_FILE_START
+#define ASM_FILE_START(FILE)
+#undef ASM_OUTPUT_FUNCTION_PREFIX
+#define ASM_OUTPUT_FUNCTION_PREFIX(FILE,NAME) \
+  fputs("\tnop\n", (FILE));			\
+  current_function_original_name = (NAME)
+#undef ASM_OUTPUT_PROLOGUE_SUFFIX
+
+/* Overrides for svr4.h begin here */
+
+#undef SVR4
+
+#undef SWITCH_TAKES_ARG
+#undef WORD_SWITCH_TAKES_ARG
+
+#undef ASM_SPEC
+#undef ASM_FINAL_SPEC
+#undef MD_STARTFILE_PREFIX
+#undef MD_EXEC_PREFIX
+
+/* Generate an error message if -p option is selected. Concentrix 2.x
+   does not support prof format profiling, only gprof is supported. */
+
+#define CPP_SPEC	"%{p:%e-p option not supported: use -pg instead}"
+
+/* Provide an appropriate LIB_SPEC. The crtend.o file provides part of the
+   support for getting C++ file-scope static objects constructed before
+   entering `main'. */
+
+#undef LIB_SPEC
+#define LIB_SPEC \
+	"%{g*:-lg} %{!pg:-lc}%{pg:-lc_p} crtend.o%s"
+
+/* Tell linker to strip local symbols, since assembler may not. */
+
+#undef LINK_SPEC
+#define LINK_SPEC	"-X"
+
+/* Get the correct startup file for regular or profiled code. Also
+   use the crtbegin.o file for C++ ... */
+
+#undef STARTFILE_SPEC
+#define STARTFILE_SPEC \
+	"%{!pg:crt0.o%s}%{pg:gcrt0.o%s} crtbegin.o%s"
+
+#undef SCCS_DIRECTIVE
+#undef NO_DOLLAR_IN_LABEL
+#undef TARGET_MEM_FUNCTIONS
+
+#undef DWARF_DEBUGGING_INFO
+
+#undef ASM_OUTPUT_LABELREF
+#define ASM_OUTPUT_LABELREF(FILE,NAME) fprintf (FILE, "_%s", NAME)
+#undef ASM_OUTPUT_EXTERNAL_LIBCALL
+
+#undef BSS_ASM_OP
+#define BSS_ASM_OP	"\t.lcomm"

gnu/gcc/gcc-2.2.2/config/fx80.c

@@ -0,0 +1,299 @@
+/* Subroutines for insn-output.c for Alliant FX computers.
+   Copyright (C) 1989,1991 Free Software Foundation, Inc.
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GNU CC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GNU CC; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+
+/* Some output-actions in alliant.md need these.  */
+#include <stdio.h>
+#include "config.h"
+#include "rtl.h"
+#include "regs.h"
+#include "hard-reg-set.h"
+#include "real.h"
+#include "insn-config.h"
+#include "conditions.h"
+#include "insn-flags.h"
+#include "output.h"
+#include "insn-attr.h"
+
+/* Index into this array by (register number >> 3) to find the
+   smallest class which contains that register.  */
+enum reg_class regno_reg_class[]
+  = { DATA_REGS, ADDR_REGS, FP_REGS };
+
+static rtx find_addr_reg ();
+
+char *
+output_btst (operands, countop, dataop, insn, signpos)
+     rtx *operands;
+     rtx countop, dataop;
+     rtx insn;
+     int signpos;
+{
+  operands[0] = countop;
+  operands[1] = dataop;
+
+  if (GET_CODE (countop) == CONST_INT)
+    {
+      register int count = INTVAL (countop);
+      /* If COUNT is bigger than size of storage unit in use,
+	 advance to the containing unit of same size.  */
+      if (count > signpos)
+	{
+	  int offset = (count & ~signpos) / 8;
+	  count = count & signpos;
+	  operands[1] = dataop = adj_offsettable_operand (dataop, offset);
+	}
+      if (count == signpos)
+	cc_status.flags = CC_NOT_POSITIVE | CC_Z_IN_NOT_N;
+      else
+	cc_status.flags = CC_NOT_NEGATIVE | CC_Z_IN_NOT_N;
+
+      /* These three statements used to use next_insns_test_no...
+	 but it appears that this should do the same job.  */
+      if (count == 31
+	  && next_insn_tests_no_inequality (insn))
+	return "tst%.l %1";
+      if (count == 15
+	  && next_insn_tests_no_inequality (insn))
+	return "tst%.w %1";
+      if (count == 7
+	  && next_insn_tests_no_inequality (insn))
+	return "tst%.b %1";
+
+      cc_status.flags = CC_NOT_NEGATIVE;
+    }
+  return "btst %0,%1";
+}
+
+/* Return the best assembler insn template
+   for moving operands[1] into operands[0] as a fullword.  */
+
+static char *
+singlemove_string (operands)
+     rtx *operands;
+{
+  if (operands[1] != const0_rtx)
+    return "mov%.l %1,%0";
+  if (! ADDRESS_REG_P (operands[0]))
+    return "clr%.l %0";
+  return "sub%.l %0,%0";
+}
+
+/* Output assembler code to perform a doubleword move insn
+   with operands OPERANDS.  */
+
+char *
+output_move_double (operands)
+     rtx *operands;
+{
+  enum { REGOP, OFFSOP, MEMOP, PUSHOP, POPOP, CNSTOP, RNDOP } optype0, optype1;
+  rtx latehalf[2];
+  rtx addreg0 = 0, addreg1 = 0;
+
+  /* First classify both operands.  */
+
+  if (REG_P (operands[0]))
+    optype0 = REGOP;
+  else if (offsettable_memref_p (operands[0]))
+    optype0 = OFFSOP;
+  else if (GET_CODE (XEXP (operands[0], 0)) == POST_INC)
+    optype0 = POPOP;
+  else if (GET_CODE (XEXP (operands[0], 0)) == PRE_DEC)
+    optype0 = PUSHOP;
+  else if (GET_CODE (operands[0]) == MEM)
+    optype0 = MEMOP;
+  else
+    optype0 = RNDOP;
+
+  if (REG_P (operands[1]))
+    optype1 = REGOP;
+  else if (CONSTANT_P (operands[1]))
+    optype1 = CNSTOP;
+  else if (offsettable_memref_p (operands[1]))
+    optype1 = OFFSOP;
+  else if (GET_CODE (XEXP (operands[1], 0)) == POST_INC)
+    optype1 = POPOP;
+  else if (GET_CODE (XEXP (operands[1], 0)) == PRE_DEC)
+    optype1 = PUSHOP;
+  else if (GET_CODE (operands[1]) == MEM)
+    optype1 = MEMOP;
+  else
+    optype1 = RNDOP;
+
+  /* Check for the cases that the operand constraints are not
+     supposed to allow to happen.  Abort if we get one,
+     because generating code for these cases is painful.  */
+
+  if (optype0 == RNDOP || optype1 == RNDOP)
+    abort ();
+
+  /* If one operand is decrementing and one is incrementing
+     decrement the former register explicitly
+     and change that operand into ordinary indexing.  */
+
+  if (optype0 == PUSHOP && optype1 == POPOP)
+    {
+      operands[0] = XEXP (XEXP (operands[0], 0), 0);
+      output_asm_insn ("subq%.l %#8,%0", operands);
+      operands[0] = gen_rtx (MEM, DImode, operands[0]);
+      optype0 = OFFSOP;
+    }
+  if (optype0 == POPOP && optype1 == PUSHOP)
+    {
+      operands[1] = XEXP (XEXP (operands[1], 0), 0);
+      output_asm_insn ("subq%.l %#8,%1", operands);
+      operands[1] = gen_rtx (MEM, DImode, operands[1]);
+      optype1 = OFFSOP;
+    }
+
+  /* If an operand is an unoffsettable memory ref, find a register
+     we can increment temporarily to make it refer to the second word.  */
+
+  if (optype0 == MEMOP)
+    addreg0 = find_addr_reg (XEXP (operands[0], 0));
+
+  if (optype1 == MEMOP)
+    addreg1 = find_addr_reg (XEXP (operands[1], 0));
+
+  /* Ok, we can do one word at a time.
+     Normally we do the low-numbered word first,
+     but if either operand is autodecrementing then we
+     do the high-numbered word first.
+
+     In either case, set up in LATEHALF the operands to use
+     for the high-numbered word and in some cases alter the
+     operands in OPERANDS to be suitable for the low-numbered word.  */
+
+  if (optype0 == REGOP)
+    latehalf[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1);
+  else if (optype0 == OFFSOP)
+    latehalf[0] = adj_offsettable_operand (operands[0], 4);
+  else
+    latehalf[0] = operands[0];
+
+  if (optype1 == REGOP)
+    latehalf[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1);
+  else if (optype1 == OFFSOP)
+    latehalf[1] = adj_offsettable_operand (operands[1], 4);
+  else if (optype1 == CNSTOP)
+    {
+      if (GET_CODE (operands[1]) == CONST_DOUBLE)
+	split_double (operands[1], &operands[1], &latehalf[1]);
+      else if (CONSTANT_P (operands[1]))
+	{
+	  latehalf[1] = operands[1];
+	  operands[1] = const0_rtx;
+	}
+    }
+  else
+    latehalf[1] = operands[1];
+
+  /* If insn is effectively movd N(sp),-(sp) then we will do the
+     high word first.  We should use the adjusted operand 1 (which is N+4(sp))
+     for the low word as well, to compensate for the first decrement of sp.  */
+  if (optype0 == PUSHOP
+      && REGNO (XEXP (XEXP (operands[0], 0), 0)) == STACK_POINTER_REGNUM
+      && reg_overlap_mentioned_p (stack_pointer_rtx, operands[1]))
+    operands[1] = latehalf[1];
+
+  /* If one or both operands autodecrementing,
+     do the two words, high-numbered first.  */
+
+  /* Likewise,  the first move would clobber the source of the second one,
+     do them in the other order.  This happens only for registers;
+     such overlap can't happen in memory unless the user explicitly
+     sets it up, and that is an undefined circumstance.  */
+
+  if (optype0 == PUSHOP || optype1 == PUSHOP
+      || (optype0 == REGOP && optype1 == REGOP
+	  && REGNO (operands[0]) == REGNO (latehalf[1])))
+    {
+      /* Make any unoffsettable addresses point at high-numbered word.  */
+      if (addreg0)
+	output_asm_insn ("addql %#4,%0", &addreg0);
+      if (addreg1)
+	output_asm_insn ("addql %#4,%0", &addreg1);
+
+      /* Do that word.  */
+      output_asm_insn (singlemove_string (latehalf), latehalf);
+
+      /* Undo the adds we just did.  */
+      if (addreg0)
+	output_asm_insn ("subql %#4,%0", &addreg0);
+      if (addreg1)
+	output_asm_insn ("subql %#4,%0", &addreg1);
+
+      /* Do low-numbered word.  */
+      return singlemove_string (operands);
+    }
+
+  /* Normal case: do the two words, low-numbered first.  */
+
+  output_asm_insn (singlemove_string (operands), operands);
+
+  /* Make any unoffsettable addresses point at high-numbered word.  */
+  if (addreg0)
+    output_asm_insn ("addql %#4,%0", &addreg0);
+  if (addreg1)
+    output_asm_insn ("addql %#4,%0", &addreg1);
+
+  /* Do that word.  */
+  output_asm_insn (singlemove_string (latehalf), latehalf);
+
+  /* Undo the adds we just did.  */
+  if (addreg0)
+    output_asm_insn ("subql %#4,%0", &addreg0);
+  if (addreg1)
+    output_asm_insn ("subql %#4,%0", &addreg1);
+
+  return "";
+}
+
+/* Return a REG that occurs in ADDR with coefficient 1.
+   ADDR can be effectively incremented by incrementing REG.  */
+
+static rtx
+find_addr_reg (addr)
+     rtx addr;
+{
+  while (GET_CODE (addr) == PLUS)
+    {
+      if (GET_CODE (XEXP (addr, 0)) == REG)
+	addr = XEXP (addr, 0);
+      else if (GET_CODE (XEXP (addr, 1)) == REG)
+	addr = XEXP (addr, 1);
+      else if (CONSTANT_P (XEXP (addr, 0)))
+	addr = XEXP (addr, 1);
+      else if (CONSTANT_P (XEXP (addr, 1)))
+	addr = XEXP (addr, 0);
+      else
+	abort ();
+    }
+  if (GET_CODE (addr) == REG)
+    return addr;
+  abort ();
+}
+
+int
+standard_SunFPA_constant_p (x)
+     rtx x;
+{
+  return( 0 );
+}
+

gnu/gcc/gcc-2.2.2/config/genix.h

@@ -0,0 +1,166 @@
+/* Definitions of target machine for GNU compiler.  Genix ns32000 version.
+   Copyright (C) 1987, 1988 Free Software Foundation, Inc.
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GNU CC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GNU CC; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+#include "encore.h"
+
+/* We don't want the one Encore needs.  */
+#undef ASM_SPEC
+
+/* The following defines override ones in ns32k.h and prevent any attempts
+   to explicitly or implicitly make references to the SB register in the GCC
+   generated code.  It is necessary to avoid such references under Genix V.3.1
+   because this OS doesn't even save/restore the SB on context switches!  */
+
+#define IS_OK_REG_FOR_BASE_P(X)						\
+  ( (GET_CODE (X) == REG) && REG_OK_FOR_BASE_P (X) )
+
+#undef INDIRECTABLE_1_ADDRESS_P
+#define INDIRECTABLE_1_ADDRESS_P(X)					\
+  (CONSTANT_ADDRESS_NO_LABEL_P (X)					\
+   || IS_OK_REG_FOR_BASE_P (X)						\
+   || (GET_CODE (X) == PLUS						\
+       && IS_OK_REG_FOR_BASE_P (XEXP (X, 0))				\
+       && CONSTANT_ADDRESS_P (XEXP (X, 1))  )  )
+
+/* Note that for double indirects, only FP, SP, and SB are allowed
+   as the inner-most base register.  But we are avoiding use of SB.  */
+
+#undef MEM_REG
+#define MEM_REG(X)							\
+  ( (GET_CODE (X) == REG)						\
+  && ( (REGNO (X) == FRAME_POINTER_REGNUM)				\
+    || (REGNO (X) == STACK_POINTER_REGNUM) ) )
+
+#undef INDIRECTABLE_2_ADDRESS_P
+#define INDIRECTABLE_2_ADDRESS_P(X)					\
+  (GET_CODE (X) == MEM							\
+   && (((xfoo0 = XEXP (X, 0), MEM_REG (xfoo0))				\
+       || (GET_CODE (xfoo0) == PLUS					\
+	   && MEM_REG (XEXP (xfoo0, 0))					\
+	   && CONSTANT_ADDRESS_NO_LABEL_P (XEXP (xfoo0, 1))))		\
+       || CONSTANT_ADDRESS_NO_LABEL_P (xfoo0)))
+
+/* Go to ADDR if X is a valid address not using indexing.
+   (This much is the easy part.)  */
+#undef GO_IF_NONINDEXED_ADDRESS
+#define GO_IF_NONINDEXED_ADDRESS(X, ADDR)				\
+{ register rtx xfoob = (X);						\
+  if (GET_CODE (xfoob) == REG) goto ADDR;				\
+  if (INDIRECTABLE_1_ADDRESS_P(X)) goto ADDR;				\
+  if (CONSTANT_P(X)) goto ADDR;						\
+  if (INDIRECTABLE_2_ADDRESS_P (X)) goto ADDR;				\
+  if (GET_CODE (X) == PLUS)						\
+    if (CONSTANT_ADDRESS_NO_LABEL_P (XEXP (X, 1)))			\
+      if (INDIRECTABLE_2_ADDRESS_P (XEXP (X, 0)))			\
+	goto ADDR;							\
+}
+
+/* A bug in the GNX 3.X assembler causes references to external symbols to
+   be mishandled if the symbol is also used as the name of a function-local
+   variable or as the name of a struct or union field.  The problem only
+   appears when you are also using the -g option so that SDB debugging
+   directives are also being produced by GCC.  In such cases, the assembler
+   gets the external entity confused with the local entity and addressing
+   havoc ensues.  The solution is to get GCC to produce .global directives
+   for all external entities which are actually referenced within the current
+   source file.  The following macro does this.  */
+
+#define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME)				\
+    ASM_GLOBALIZE_LABEL(FILE,NAME);
+
+/* Genix wants 0l instead of 0f.  */
+
+#undef ASM_OUTPUT_DOUBLE
+#define ASM_OUTPUT_DOUBLE(FILE,VALUE)				\
+ fprintf (FILE, "\t.long 0l%.20e\n", (VALUE))
+
+/*  A bug in the GNX 3.X linker prevents symbol-table entries with a storage-
+    class field of C_EFCN (-1) from being accepted. */
+
+#ifdef PUT_SDB_EPILOGUE_END
+#undef PUT_SDB_EPILOGUE_END
+#endif
+#define PUT_SDB_EPILOGUE_END(NAME)
+
+#undef TARGET_VERSION
+#define TARGET_VERSION fprintf (stderr, " (32000, National syntax)");
+
+/* Same as the encore definition except
+   * Different syntax for double constants.
+   * Don't output `?' before external regs.
+   * Output `(sb)' in certain indirect refs.  */
+
+#error this has not been updated since version 1.
+#error it is certainly wrong.
+
+#undef PRINT_OPERAND
+#define PRINT_OPERAND(FILE, X, CODE)					\
+{ if (CODE == '$') putc ('$', FILE);					\
+  else if (CODE == '?');						\
+  else if (GET_CODE (X) == REG)						\
+    fprintf (FILE, "%s", reg_names[REGNO (X)]);				\
+  else if (GET_CODE (X) == MEM)						\
+    {									\
+      rtx xfoo;								\
+      xfoo = XEXP (X, 0);						\
+      switch (GET_CODE (xfoo))						\
+	{								\
+	case MEM:							\
+	  if (GET_CODE (XEXP (xfoo, 0)) == REG)				\
+	    if (REGNO (XEXP (xfoo, 0)) == STACK_POINTER_REGNUM)		\
+	      fprintf (FILE, "0(0(sp))");				\
+	    else fprintf (FILE, "0(0(%s))",				\
+			  reg_names[REGNO (XEXP (xfoo, 0))]);		\
+	  else								\
+	    {								\
+	      extern int paren_base_reg_printed;			\
+	      fprintf (FILE, "0(");					\
+	      paren_base_reg_printed = 0;				\
+	      output_address (xfoo);					\
+	      if (!paren_base_reg_printed)				\
+		fprintf (FILE, "(sb)");					\
+	      putc (')', FILE);						\
+	    }								\
+	  break;							\
+	case REG:							\
+	  fprintf (FILE, "0(%s)", reg_names[REGNO (xfoo)]);		\
+	  break;							\
+	case PRE_DEC:							\
+	case POST_INC:							\
+	  fprintf (FILE, "tos");					\
+	  break;							\
+	case CONST_INT:							\
+	  fprintf (FILE, "@%d", INTVAL (xfoo));				\
+	  break;							\
+	default:							\
+	  output_address (xfoo);					\
+	  break;							\
+	}								\
+    }									\
+  else if (GET_CODE (X) == CONST_DOUBLE && GET_MODE (X) != DImode)	\
+    if (GET_MODE (X) == DFmode)						\
+      { union { double d; int i[2]; } u;				\
+        u.i[0] = CONST_DOUBLE_LOW (X); u.i[1] = CONST_DOUBLE_HIGH (X);	\
+	fprintf (FILE, "$0l%.20e", u.d); }				\
+    else { union { double d; int i[2]; } u;				\
+	   u.i[0] = CONST_DOUBLE_LOW (X); u.i[1] = CONST_DOUBLE_HIGH (X); \
+	   fprintf (FILE, "$0f%.20e", u.d); }				\
+  else if (GET_CODE (X) == CONST)					\
+    output_addr_const (FILE, X);					\
+  else { putc ('$', FILE); output_addr_const (FILE, X); }}

gnu/gcc/gcc-2.2.2/config/gmicro.c

@@ -0,0 +1,983 @@
+/* Subroutines for insn-output.c for the Gmicro.
+   Ported by Masanobu Yuhara, Fujitsu Laboratories LTD.
+   (yuhara@flab.fujitsu.co.jp)
+
+   Copyright (C) 1990, 1991 Free Software Foundation, Inc.
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GNU CC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+Among other things, the copyright
+notice and this notice must be preserved on all copies.
+
+You should have received a copy of the GNU General Public License
+along with GNU CC; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+
+#include <stdio.h>
+#include "config.h"
+#include "rtl.h"
+#include "regs.h"
+#include "hard-reg-set.h"
+#include "real.h"
+#include "insn-config.h"
+#include "conditions.h"
+#include "insn-flags.h"
+#include "output.h"
+#include "insn-attr.h"
+
+extern char *rtx_name[];
+
+mypr (s, a1, a2, a3, a4, a5)
+     char *s;
+     int a1, a2, a3, a4, a5;
+{
+  fprintf (stderr, s, a1, a2, a3, a4, a5);
+}
+
+myprcode (i)
+     int i;
+{
+  if (i < 0 || i > 90)
+    fprintf (stderr, "code = %d\n", i);
+  else
+    fprintf (stderr, "code = %s\n", rtx_name[i]);
+}
+
+myabort (i)
+     int i;
+{
+  fprintf (stderr, "myabort");
+  myprcode (i);
+}
+
+
+/* This is how to output an ascii string.  */
+/* See ASM_OUTPUT_ASCII in gmicro.h.  */
+output_ascii (file, p, size)
+     FILE *file;
+     char *p;
+     int size;
+{
+  int i;
+  int in_quote = 0;
+  register int c;
+
+  fprintf (file, "\t.sdata ");
+
+  for (i = 0; i < size; i++) 
+    {
+      c = p[i];
+      if (c >= ' ' && c < 0x7f) 
+	{
+	  if (!in_quote) 
+	    {
+	      putc ('"', file);
+	      in_quote = 1;
+	    }
+	  putc (c, file);
+	}
+      else 
+	{
+	  if (in_quote) 
+	    {
+	      putc ('"', file);
+	      in_quote = 0;
+	    }
+	  fprintf (file, "<%d>", c);
+	}
+    }
+  if (in_quote)
+    putc ('"', file);
+  putc ('\n', file);
+}
+
+
+/* call this when GET_CODE (index) is MULT. */
+print_scaled_index (file, index)
+     FILE *file;
+     register rtx index;
+{
+  register rtx ireg;
+  int scale;
+
+  if (GET_CODE (XEXP (index, 0)) == REG) 
+    {
+      ireg = XEXP (index, 0);
+      scale = INTVAL (XEXP (index, 1));
+    }
+  else 
+    {
+      ireg = XEXP (index, 1);
+      scale = INTVAL (XEXP (index, 0));
+    }
+  if (scale == 1)
+    fprintf (file, "%s", reg_names[REGNO (ireg)]);
+  else
+    fprintf (file, "%s*%d", reg_names[REGNO (ireg)], scale);
+}
+    
+
+print_operand_address (file, addr)
+     FILE *file;
+     register rtx addr;
+{
+  register rtx xtmp0, xtmp1, breg, ixreg;
+  int scale;
+  int needcomma = 0;
+  rtx offset;
+
+  fprintf (file, "@");
+ retry:
+  switch (GET_CODE (addr)) 
+    {
+    case MEM:
+      fprintf (file, "@");
+      addr = XEXP (addr, 0);
+      goto retry;
+
+    case REG:
+      fprintf (file, "%s", reg_names[REGNO (addr)]);
+      break;
+
+    case MULT:
+      print_scaled_index (file, addr);
+      break;
+
+    case PRE_DEC:
+      fprintf (file, "-%s", reg_names[REGNO (XEXP (addr, 0))]);
+      break;
+
+    case POST_INC:
+      fprintf (file, "%s+", reg_names[REGNO (XEXP (addr, 0))]);
+      break;
+
+    case PLUS:
+      xtmp0 = XEXP (addr, 0);
+      xtmp1 = XEXP (addr, 1);
+      ixreg = 0;	breg = 0;
+      offset = 0;
+      if (CONSTANT_ADDRESS_P (xtmp0)) 
+	{
+	  offset = xtmp0;
+	  breg = xtmp1;
+	}
+      else if (CONSTANT_ADDRESS_P (xtmp1)) 
+	{
+	  offset = xtmp1;
+	  breg = xtmp0;
+	}
+      else 
+	{
+	  goto NOT_DISP;
+	}
+
+      if (REG_CODE_BASE_P (breg))
+	goto PRINT_MEM;
+
+      if (GET_CODE (breg) == MULT) 
+	{
+	  if (REG_CODE_INDEX_P (XEXP (breg, 0))) 
+	    {
+	      ixreg = XEXP (breg, 0);
+	      scale = INTVAL (XEXP (breg, 1));
+	      breg = 0;
+	    }
+	  else 
+	    {
+	      ixreg = XEXP (breg, 1);
+	      scale = INTVAL (XEXP (breg, 0));
+	      breg = 0;
+	    }
+	  goto PRINT_MEM;
+	}
+
+      /* GET_CODE (breg) must be PLUS here. */
+      xtmp0 = XEXP (breg, 0);
+      xtmp1 = XEXP (breg, 1);
+      if (REG_CODE_BASE_P (xtmp0)) 
+	{
+	  breg = xtmp0;
+	  xtmp0 = xtmp1;
+	}
+      else 
+	{
+	  breg = xtmp1;
+	  /* xtmp0 = xtmp0; */
+	}
+
+      if (GET_CODE (xtmp0) == MULT) 
+	{
+	  if (REG_CODE_INDEX_P (XEXP (xtmp0, 0))) 
+	    {
+	      ixreg = XEXP (xtmp0, 0);
+	      scale = INTVAL (XEXP (xtmp0, 1));
+	    }
+	  else 
+	    {
+	      ixreg = XEXP (xtmp0, 1);
+	      scale = INTVAL (XEXP (xtmp0, 0));
+	    }
+	}
+      else 
+	{
+	  ixreg = xtmp0;
+	  scale = 1;
+	}
+      goto PRINT_MEM;
+
+    NOT_DISP:
+      if (REG_CODE_BASE_P (xtmp0)) 
+	{
+	  breg = xtmp0;
+	  xtmp0 = xtmp1;
+	}
+      else if (REG_CODE_BASE_P (xtmp1)) 
+	{
+	  breg = xtmp1;
+	  /* xtmp0 = xtmp0; */
+	}
+      else
+	goto NOT_BASE;
+    
+      if (REG_CODE_INDEX_P (xtmp0)) 
+	{
+	  ixreg = xtmp0;
+	  scale = 1;
+	  goto PRINT_MEM;
+	}
+      else if (CONSTANT_ADDRESS_P (xtmp0)) 
+	{
+	  offset = xtmp0;
+	  goto PRINT_MEM;
+	}
+      else if (GET_CODE (xtmp0) == MULT) 
+	{
+	  if (REG_CODE_INDEX_P (XEXP (xtmp0, 0))) 
+	    {
+	      ixreg = XEXP (xtmp0, 0);
+	      scale = INTVAL (XEXP (xtmp0, 1));
+	    }
+	  else 
+	    {
+	      ixreg = XEXP (xtmp0, 1);
+	      scale = INTVAL (XEXP (xtmp0, 0));
+	    }
+	  goto PRINT_MEM;
+	}
+
+      /* GET_CODE (xtmp0) must be PLUS. */
+      xtmp1 = XEXP (xtmp0, 1);
+      xtmp0 = XEXP (xtmp0, 0);
+
+      if (CONSTANT_ADDRESS_P (xtmp0)) 
+	{
+	  offset = xtmp0;
+	  xtmp0 = xtmp1;
+	}
+      else 
+	{
+	  offset = xtmp1;
+	  /* xtmp0 = xtmp0; */
+	}
+
+      if (REG_CODE_INDEX_P (xtmp0)) 
+	{
+	  ixreg = xtmp0;
+	}
+      else 
+	{			/* GET_CODE (xtmp0) must be MULT. */
+	  if (REG_CODE_INDEX_P (XEXP (xtmp0, 0))) 
+	    {
+	      ixreg = XEXP (xtmp0, 0);
+	      scale = INTVAL (XEXP (xtmp0, 1));
+	    }
+	  else 
+	    {
+	      ixreg = XEXP (xtmp0, 1);
+	      scale = INTVAL (XEXP (xtmp0, 0));
+	    }
+	}
+      goto PRINT_MEM;
+
+    NOT_BASE:
+      if (GET_CODE (xtmp0) == PLUS) 
+	{
+	  ixreg = xtmp1;
+	  /* xtmp0 = xtmp0; */
+	}
+      else 
+	{
+	  ixreg = xtmp0;
+	  xtmp0 = xtmp1;
+	}
+
+      if (REG_CODE_INDEX_P (ixreg)) 
+	{
+	  scale = 1;
+	}
+      else if (REG_CODE_INDEX_P (XEXP (ixreg, 0))) 
+	{
+	  scale = INTVAL (XEXP (ixreg, 1));
+	  ixreg = XEXP (ixreg, 0);
+	}
+      else 
+	{			/* was else if with no condition. OK ??? */
+	  scale = INTVAL (XEXP (ixreg, 0));
+	  ixreg = XEXP (ixreg, 1);
+	}
+
+      if (REG_CODE_BASE_P (XEXP (xtmp0, 0))) 
+	{
+	  breg = XEXP (xtmp0, 0);
+	  offset = XEXP (xtmp0, 1);
+	}
+      else 
+	{
+	  breg = XEXP (xtmp0, 1);
+	  offset = XEXP (xtmp0, 0);
+	}
+
+    PRINT_MEM:
+      if (breg == 0 && ixreg == 0) 
+	{
+	  output_address (offset);
+	  break;
+	}
+      else if (ixreg == 0 && offset == 0) 
+	{
+	  fprintf (file, "%s", reg_names[REGNO (breg)]);
+	  break;
+	}
+      else 
+	{
+	  fprintf (file, "(");
+	  if (offset != 0) 
+	    {
+	      output_addr_const (file, offset);
+	      needcomma = 1;
+	    }
+	  if (breg != 0) 
+	    {
+	      if (needcomma)
+		fprintf (file, ",");
+	      fprintf (file, "%s", reg_names[REGNO (breg)]);
+	      needcomma = 1;
+	    }
+	  if (ixreg != 0) 
+	    {
+	      if (needcomma)
+		fprintf (file, ",");
+	      fprintf (file, "%s", reg_names[REGNO (ixreg)]);
+	      if (scale != 1)
+		fprintf (file,"*%d", scale);
+	    }
+	  fprintf (file, ")");
+
+	  break;
+	}
+
+    default:
+      output_addr_const (file, addr);
+    }
+}
+
+
+
+/* Return a REG that occurs in ADDR with coefficient 1.
+   ADDR can be effectively incremented by incrementing REG.  */
+
+static rtx
+find_addr_reg (addr)
+     rtx addr;
+{
+  while (GET_CODE (addr) == PLUS)
+    {
+      if (GET_CODE (XEXP (addr, 0)) == REG)
+	addr = XEXP (addr, 0);
+      else if (GET_CODE (XEXP (addr, 1)) == REG)
+	addr = XEXP (addr, 1);
+      else if (GET_CODE (XEXP (addr, 0)) == PLUS)
+	addr = XEXP (addr, 0);
+      else if (GET_CODE (XEXP (addr, 1)) == PLUS)
+	addr = XEXP (addr, 1);
+    }
+  if (GET_CODE (addr) == REG)
+    return addr;
+  return 0;
+}
+
+
+    /* Return the best assembler insn template
+    for moving operands[1] into operands[0] as a fullword.  */
+
+static char *
+singlemove_string (operands)
+     rtx *operands;
+{
+  if (FPU_REG_P (operands[0]) || FPU_REG_P (operands[1])) 
+    {
+      if (GREG_P (operands[0]) || GREG_P (operands[1])) 
+	{
+	  myabort (101);	/* Not Supported yet !! */
+	}
+      else 
+	{
+	  return "fmov.s %1,%0";
+	}
+    }
+  return "mov.w %1,%0";
+}
+
+
+/* Output assembler code to perform a doubleword move insn
+   with operands OPERANDS.  */
+
+char *
+output_move_double (operands)
+     rtx *operands;
+{
+  enum 
+    { REGOP, OFFSOP, MEMOP, PUSHOP, POPOP, CNSTOP, RNDOP }
+  optype0, optype1;
+  rtx latehalf[2];
+  rtx addreg0 = 0, addreg1 = 0;
+
+  /* First classify both operands.  */
+
+  if (REG_P (operands[0]))
+    optype0 = REGOP;
+  else if (offsettable_memref_p (operands[0]))
+    optype0 = OFFSOP;
+  else if (GET_CODE (XEXP (operands[0], 0)) == POST_INC)
+    optype0 = POPOP;
+  else if (GET_CODE (XEXP (operands[0], 0)) == PRE_DEC)
+    optype0 = PUSHOP;
+  else if (GET_CODE (operands[0]) == MEM)
+    optype0 = MEMOP;
+  else
+    optype0 = RNDOP;
+
+  if (REG_P (operands[1]))
+    optype1 = REGOP;
+  else if (CONSTANT_P (operands[1]))
+    optype1 = CNSTOP;
+  else if (offsettable_memref_p (operands[1]))
+    optype1 = OFFSOP;
+  else if (GET_CODE (XEXP (operands[1], 0)) == POST_INC)
+    optype1 = POPOP;
+  else if (GET_CODE (XEXP (operands[1], 0)) == PRE_DEC)
+    optype1 = PUSHOP;
+  else if (GET_CODE (operands[1]) == MEM)
+    optype1 = MEMOP;
+  else
+    optype1 = RNDOP;
+
+  /* Check for the cases that the operand constraints are not
+     supposed to allow to happen.  Abort if we get one,
+     because generating code for these cases is painful.  */
+
+  if (optype0 == RNDOP || optype1 == RNDOP)
+    myabort (102);
+
+  /* If one operand is decrementing and one is incrementing
+     decrement the former register explicitly
+     and change that operand into ordinary indexing.  */
+
+  if (optype0 == PUSHOP && optype1 == POPOP)
+    {
+      operands[0] = XEXP (XEXP (operands[0], 0), 0);
+      output_asm_insn ("sub.w %#8,%0", operands);
+      operands[0] = gen_rtx (MEM, DImode, operands[0]);
+      optype0 = OFFSOP;
+    }
+  if (optype0 == POPOP && optype1 == PUSHOP)
+    {
+      operands[1] = XEXP (XEXP (operands[1], 0), 0);
+      output_asm_insn ("sub.w %#8,%1", operands);
+      operands[1] = gen_rtx (MEM, DImode, operands[1]);
+      optype1 = OFFSOP;
+    }
+
+  /* If an operand is an unoffsettable memory ref, find a register
+     we can increment temporarily to make it refer to the second word.  */
+
+  if (optype0 == MEMOP)
+    addreg0 = find_addr_reg (operands[0]);
+
+  if (optype1 == MEMOP)
+    addreg1 = find_addr_reg (operands[1]);
+
+  /* Ok, we can do one word at a time.
+     Normally we do the low-numbered word first,
+     but if either operand is autodecrementing then we
+     do the high-numbered word first.
+     
+     In either case, set up in LATEHALF the operands to use
+     for the high-numbered word and in some cases alter the
+     operands in OPERANDS to be suitable for the low-numbered word.  */
+
+  if (optype0 == REGOP)
+    latehalf[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1);
+  else if (optype0 == OFFSOP)
+    latehalf[0] = adj_offsettable_operand (operands[0], 4);
+  else
+    latehalf[0] = operands[0];
+
+  if (optype1 == REGOP)
+    latehalf[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1);
+  else if (optype1 == OFFSOP)
+    latehalf[1] = adj_offsettable_operand (operands[1], 4);
+  else if (optype1 == CNSTOP)
+    {
+      if (GET_CODE (operands[1]) == CONST_DOUBLE)
+	split_double (operands[1], &operands[1], &latehalf[1]);
+      else if (CONSTANT_P (operands[1]))
+	latehalf[1] = const0_rtx;
+    }
+  else
+    latehalf[1] = operands[1];
+
+  /* If insn is effectively movd N(sp),-(sp) then we will do the
+     high word first.  We should use the adjusted operand 1 (which is N+4(sp))
+     for the low word as well, to compensate for the first decrement of sp.  */
+  if (optype0 == PUSHOP
+      && REGNO (XEXP (XEXP (operands[0], 0), 0)) == STACK_POINTER_REGNUM
+      && reg_overlap_mentioned_p (stack_pointer_rtx, operands[1]))
+    operands[1] = latehalf[1];
+
+  /* If one or both operands autodecrementing,
+     do the two words, high-numbered first.  */
+
+  /* Likewise,  the first move would clobber the source of the second one,
+     do them in the other order.  This happens only for registers;
+     such overlap can't happen in memory unless the user explicitly
+     sets it up, and that is an undefined circumstance.  */
+
+  if (optype0 == PUSHOP || optype1 == PUSHOP
+      || (optype0 == REGOP && optype1 == REGOP
+	  && REGNO (operands[0]) == REGNO (latehalf[1])))
+    {
+      /* Make any unoffsettable addresses point at high-numbered word.  */
+      if (addreg0)
+	output_asm_insn ("add.w %#4,%0", &addreg0);
+      if (addreg1)
+	output_asm_insn ("add.w %#4,%0", &addreg1);
+
+      /* Do that word.  */
+      output_asm_insn (singlemove_string (latehalf), latehalf);
+
+      /* Undo the adds we just did.  */
+      if (addreg0)
+	output_asm_insn ("sub.w %#4,%0", &addreg0);
+      if (addreg1)
+	output_asm_insn ("sub.w %#4,%0", &addreg1);
+
+      /* Do low-numbered word.  */
+      return singlemove_string (operands);
+    }
+
+  /* Normal case: do the two words, low-numbered first.  */
+
+  output_asm_insn (singlemove_string (operands), operands);
+
+  /* Make any unoffsettable addresses point at high-numbered word.  */
+  if (addreg0)
+    output_asm_insn ("add.w %#4,%0", &addreg0);
+  if (addreg1)
+    output_asm_insn ("add.w %#4,%0", &addreg1);
+
+  /* Do that word.  */
+  output_asm_insn (singlemove_string (latehalf), latehalf);
+
+  /* Undo the adds we just did.  */
+  if (addreg0)
+    output_asm_insn ("sub.w %#4,%0", &addreg0);
+  if (addreg1)
+    output_asm_insn ("sub.w %#4,%0", &addreg1);
+
+  return "";
+}
+
+/* Move const_double to floating point register (DF) */
+char *
+output_move_const_double (operands)
+     rtx *operands;
+{
+  int code = standard_fpu_constant_p (operands[1]);
+
+  if (FPU_REG_P (operands[0])) 
+    {
+      if (code != 0)
+	{
+	  static char buf[40];
+
+	  sprintf (buf, "fmvr from%d,%%0.d", code);
+	  return buf;
+	}
+      else 
+	{
+	  return "fmov %1,%0.d";
+	}
+    }
+  else if (GREG_P (operands[0])) 
+    {
+      rtx xoperands[2];
+      xoperands[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1);
+      xoperands[1] = gen_rtx (CONST_INT, VOIDmode,
+			      CONST_DOUBLE_HIGH (operands[1]));
+      output_asm_insn ("mov.w %1,%0", xoperands);
+      operands[1] = gen_rtx (CONST_INT, VOIDmode,
+			     CONST_DOUBLE_LOW (operands[1]));
+      return "mov.w %1,%0";
+    }
+  else 
+    {
+      return output_move_double (operands); /* ?????? */
+    }
+}
+
+char *
+output_move_const_single (operands)
+     rtx *operands;
+{
+  int code = standard_fpu_constant_p (operands[1]);
+  static char buf[40];
+
+  if (FPU_REG_P (operands[0])) 
+    {
+      if (code != 0)
+	{
+	  sprintf (buf, "fmvr from%d,%%0.s", code);
+	  return buf;
+	}
+      return "fmov.s %f1,%0";
+    }
+  else 
+    return "mov.w %f1,%0";
+}
+
+
+/* Return nonzero if X, a CONST_DOUBLE, has a value that we can get
+   from the "fmvr" instruction of the Gmicro FPU.
+   The value, anded with 0xff, gives the code to use in fmovecr
+   to get the desired constant.  */
+
+  u.i[0] = CONST_DOUBLE_LOW (x);
+  u.i[1] = CONST_DOUBLE_HIGH (x);
+  d = u.d;
+
+  if (d == 0.0)			/* +0.0 */
+    return 0x0;
+  /* Note: there are various other constants available
+     but it is a nuisance to put in their values here.  */
+  if (d == 1.0)			/* +1.0 */
+    return 0x1;
+
+  /*
+   * Stuff that looks different if it's single or double
+   */
+  if (GET_MODE (x) == SFmode)
+    {
+      if (d == S_PI)
+	return 0x2;
+      if (d == (S_PI / 2.0))
+	return 0x3;
+      if (d == S_E)
+	return 0x4;
+      if (d == S_LOGEof2)
+	return 0x5;
+      if (d == S_LOGEof10)
+	return 0x6;
+      if (d == S_LOG10of2)
+	return 0x7;
+      if (d == S_LOG10ofE)
+	return 0x8;
+      if (d == S_LOG2ofE)
+	return 0x9;
+    }
+  else
+    {
+      if (d == D_PI)
+	return 0x2;
+      if (d == (D_PI / 2.0))
+	return 0x3;
+      if (d == D_E)
+	return 0x4;
+      if (d == D_LOGEof2)
+	return 0x5;
+      if (d == D_LOGEof10)
+	return 0x6;
+      if (d == D_LOG10of2)
+	return 0x7;
+      if (d == D_LOG10ofE)
+	return 0x8;
+      if (d == D_LOG2ofE)
+	return 0x9;
+    }
+
+  return 0;
+}
+
+#undef S_PI
+#undef D_PI
+#undef S_E
+#undef D_E
+#undef S_LOGEof2
+#undef D_LOGEof2
+#undef S_LOGEof10
+#undef D_LOGEof10
+#undef S_LOG10of2
+#undef D_LOG10of2
+#undef S_LOG10ofE
+#undef D_LOG10ofE
+#undef S_LOG2ofE
+#undef D_LOG2ofE
+
+/* dest should be operand 0 */
+/* imm should be operand 1 */
+
+extern char *sub_imm_word ();
+
+char *
+add_imm_word (imm, dest, immp)
+     int imm;
+     rtx dest, *immp;
+{
+  int is_reg, short_ok;
+
+
+  if (imm < 0) 
+    {
+      *immp = gen_rtx (CONST_INT, VOIDmode, -imm);
+      return sub_imm_word (-imm, dest);
+    }
+    
+  if (imm == 0)
+    return "mov:l.w #0,%0";
+    
+  short_ok = short_format_ok (dest);
+
+  if (short_ok && imm <= 8)
+    return "add:q %1,%0.w";
+
+  if (imm < 128)
+    return "add:e %1,%0.w";
+
+  is_reg = (GET_CODE (dest) == REG);
+
+  if (is_reg)
+    return "add:l %1,%0.w";
+    
+  if (short_ok)
+    return "add:i %1,%0.w";
+    
+  return "add %1,%0.w";
+}
+
+char *
+sub_imm_word (imm, dest, immp)
+     int imm;
+     rtx dest, *immp;
+{
+  int is_reg, short_ok;
+
+  if (imm < 0 &&  imm != 0x80000000) 
+    {
+      *immp = gen_rtx (CONST_INT, VOIDmode, -imm);
+      return add_imm_word (-imm, dest);
+    }
+    
+  if (imm == 0)
+    return "mov:z.w #0,%0";
+    
+  short_ok = short_format_ok (dest);
+
+  if (short_ok && imm <= 8)
+    return "sub:q %1,%0.w";
+
+  if (imm < 128)
+    return "sub:e %1,%0.w";
+
+  is_reg = (GET_CODE (dest) == REG);
+
+  if (is_reg)
+    return "sub:l %1,%0.w";
+    
+  if (short_ok)
+    return "sub:i %1,%0.w";
+    
+  return "sub %1,%0.w";
+}
+
+int
+short_format_ok (x)
+     rtx x;
+{
+  rtx x0, x1;
+
+  if (GET_CODE (x) == REG)
+    return 1;
+
+  if (GET_CODE (x) == MEM 
+      && GET_CODE (XEXP (x, 0)) == PLUS) 
+    {
+      x0 = XEXP (XEXP (x, 0), 0);
+      x1 = XEXP (XEXP (x, 0), 1);
+      return ((GET_CODE (x0) == REG
+	       && CONSTANT_P (x1)
+	       && ((unsigned) (INTVAL (x1) + 0x8000)  < 0x10000))
+	      ||
+	      (GET_CODE (x1) == REG
+	       && CONSTANT_P (x0)
+	       && ((unsigned) (INTVAL (x0) + 0x8000)  < 0x10000)));
+    }
+
+  return 0;
+}
+
+myoutput_sp_adjust (file, op, fsize)
+     FILE *file;
+     char *op;
+     int fsize;
+{
+  if (fsize == 0)
+    ;
+  else if (fsize < 8)
+    fprintf (file, "\t%s:q #%d,sp.w\n", op, fsize);
+  else if (fsize < 128)
+    fprintf (file, "\t%s:e #%d,sp.w\n", op, fsize);
+  else
+    fprintf (file, "\t%s:l #%d,sp.w\n", op, fsize);
+}
+
+
+char *
+mov_imm_word (imm, dest)
+     int imm;
+     rtx dest;
+{
+  int is_reg, short_ok;
+
+  if (imm == 0)
+    return "mov:z.w #0,%0";
+    
+  short_ok = short_format_ok (dest);
+
+  if (short_ok && imm > 0 && imm <= 8)
+    return "mov:q %1,%0.w";
+
+  if (-128 <= imm && imm < 128)
+    return "mov:e %1,%0.w";
+
+  is_reg = (GET_CODE (dest) == REG);
+
+  if (is_reg)
+    return "mov:l %1,%0.w";
+    
+  if (short_ok)
+    return "mov:i %1,%0.w";
+    
+  return "mov %1,%0.w";
+}
+
+char *
+cmp_imm_word (imm, dest)
+     int imm;
+     rtx dest;
+{
+  int is_reg, short_ok;
+
+  if (imm == 0)
+    return "cmp:z.w #0,%0";
+    
+  short_ok = short_format_ok (dest);
+
+  if (short_ok && imm >0 && imm <= 8)
+    return "cmp:q %1,%0.w";
+
+  if (-128 <= imm && imm < 128)
+    return "cmp:e %1,%0.w";
+
+  is_reg = (GET_CODE (dest) == REG);
+
+  if (is_reg)
+    return "cmp:l %1,%0.w";
+    
+  if (short_ok)
+    return "cmp:i %1,%0.w";
+    
+  return "cmp %1,%0.w";
+}
+
+char *
+push_imm_word (imm)
+     int imm;
+{
+  if (imm == 0)
+    return "mov:z.w #0,%-";
+    
+  if (imm > 0 && imm <= 8)
+    return "mov:q %1,%-.w";
+
+  if (-128 <= imm && imm < 128)
+    return "mov:e %1,%-.w";
+
+  return "mov:g %1,%-.w";
+    
+  /* In some cases, g-format may be better than I format.??
+     return "mov %1,%0.w";
+     */
+}
+
+my_signed_comp (insn)
+     rtx insn;
+{
+  rtx my_insn;
+
+  my_insn = NEXT_INSN (insn);
+  if (GET_CODE (my_insn) != JUMP_INSN) 
+    {
+      fprintf (stderr, "my_signed_comp: Not Jump_insn ");
+      myabort (GET_CODE (my_insn));
+    }
+  my_insn = PATTERN (my_insn);
+  if (GET_CODE (my_insn) != SET) 
+    {
+      fprintf (stderr, "my_signed_comp: Not Set ");
+      myabort (GET_CODE (my_insn));
+    }
+  my_insn = SET_SRC (my_insn);
+  if (GET_CODE (my_insn) != IF_THEN_ELSE) 
+    {
+      fprintf (stderr, "my_signed_comp: Not if_then_else ");
+      myabort (GET_CODE (my_insn));
+    }
+  switch (GET_CODE (XEXP (my_insn, 0)))
+    {
+    case NE:
+    case EQ:
+    case GE:
+    case GT:
+    case LE:
+    case LT:
+      return 1;
+    case GEU:
+    case GTU:
+    case LEU:
+    case LTU:
+      return 0;
+    }
+  fprintf (stderr, "my_signed_comp: Not cccc ");
+  myabort (GET_CODE (XEXP (my_insn, 0)));
+}

gnu/gcc/gcc-2.2.2/config/harris.h

@@ -0,0 +1,86 @@
+/* Definitions of target machine for GNU compiler.  Harris tahoe version.
+   Copyright (C) 1989 Free Software Foundation, Inc.
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GNU CC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GNU CC; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+
+#include "tahoe.h"
+
+#undef CPP_PREDEFINES
+#define CPP_PREDEFINES "-Dtahoe -Dunix -Dhcx"
+
+#undef DBX_DEBUGGING_INFO
+#define SDB_DEBUGGING_INFO
+
+#undef LIB_SPEC
+
+#undef TARGET_DEFAULT
+#define TARGET_DEFAULT 1
+
+/* urem and udiv don't exist on this system.  */
+#undef UDIVSI3_LIBCALL
+#undef UMODSI3_LIBCALL
+
+/* Operand of .align is not logarithmic.  */
+#undef ASM_OUTPUT_ALIGN
+#define ASM_OUTPUT_ALIGN(FILE,LOG)  \
+  LOG ? fprintf (FILE, "\t.align %d\n", 1 << (LOG)) : 0
+
+/* For the same reason, we need .align 2 after casesi.  */
+#undef PRINT_OPERAND
+#define PRINT_OPERAND(FILE, X, CODE)  \
+{ if (CODE == '@')							\
+    putc ('2', FILE);							\
+  else if (GET_CODE (X) == REG)						\
+    fprintf (FILE, "%s", reg_names[REGNO (X)]);				\
+  else if (GET_CODE (X) == MEM)						\
+    output_address (XEXP (X, 0));					\
+  else { putc ('$', FILE); output_addr_const (FILE, X); }}
+
+#undef ASM_OUTPUT_LOCAL
+#define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED)  \
+( fputs (".bss ", (FILE)),			\
+  assemble_name ((FILE), (NAME)),		\
+  fprintf ((FILE), ",%u,4\n", (ROUNDED)))
+
+/* Output at beginning of assembler file.  */
+/* The .file command should always begin the output.  */
+
+#undef ASM_FILE_START
+#define ASM_FILE_START(FILE)			\
+  output_file_directive ((FILE), main_input_filename);
+
+#define ASM_OUTPUT_ASCII(FILE, PTR, SIZE)		\
+{							\
+  unsigned char *_p = (PTR);				\
+  int _thissize = (SIZE);				\
+  fprintf ((FILE), "\t.ascii \"");			\
+  for (i = 0; i < _thissize; i++)			\
+    {							\
+      register int c = _p[i];				\
+      if (c >= ' ' && c < 0177 && c != '\"' && c != '\\') \
+	putc (c, (FILE));				\
+      else						\
+	{						\
+	  fprintf ((FILE), "\\%o", c);			\
+	  if (i < _thissize - 1				\
+	      && _p[i + 1] >= '0' && _p[i + 1] <= '9')	\
+	    fprintf ((FILE), "\"\n\t.ascii \"");	\
+	}						\
+    }							\
+  fprintf ((FILE), "\"\n");				\
+}

gnu/gcc/gcc-2.2.2/config/hp2bsd.h

@@ -0,0 +1,69 @@
+/* Definitions of target machine for GNU compiler.  HP 9000/200 68000 version.
+   Copyright (C) 1987, 1991 Free Software Foundation, Inc.
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GNU CC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GNU CC; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+#include "m68k.h"
+
+/* See m68k.h.  0 means 68000 with no 68881.  */
+
+#define TARGET_DEFAULT -0102
+
+/* Define __HAVE_68881 in preprocessor only if -m68881 is specified.
+   This will control the use of inline 68881 insns in certain macros.
+   Also inform the program which CPU this is for.  */
+
+#define CPP_SPEC "%{m68881:-D__HAVE_68881__} \
+%{!ansi:%{m68020:-Dmc68020}%{mc68020:-Dmc68020}%{!mc68020:%{!m68020:-Dmc68010}}}"
+
+/* -m68020 requires special flags to the assembler.  */
+
+#define ASM_SPEC \
+ "%{m68020:-mc68020}%{mc68020:-mc68020}%{!mc68020:%{!m68020:-mc68010}}"
+
+/* Names to predefine in the preprocessor for this target machine.  */
+
+#define CPP_PREDEFINES "-Dmc68000 -Dmc68010 -Dhp200 -Dunix"
+
+/* Link with libg.a when debugging, for dbx's sake.  */
+
+#define LIB_SPEC "%{g:-lg} %{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p} "
+
+/* Alignment of field after `int : 0' in a structure.  */
+
+#undef EMPTY_FIELD_BOUNDARY
+#define EMPTY_FIELD_BOUNDARY 16
+
+/* Every structure or union's size must be a multiple of 2 bytes.  */
+
+#define STRUCTURE_SIZE_BOUNDARY 16
+
+/* This is BSD, so it wants DBX format.  */
+
+#define DBX_DEBUGGING_INFO
+
+/* Define subroutines to call to handle multiply, divide, and remainder.
+   These routines are built into the c-library on the hp200.
+   XXX What other routines from the c-library could we use?
+   The `*' prevents an underscore from being prepended by the compiler.  */
+
+#define DIVSI3_LIBCALL "*ldiv"
+#define UDIVSI3_LIBCALL "*uldiv"
+#define MODSI3_LIBCALL "*lrem"
+#define UMODSI3_LIBCALL "*ulrem"
+#define MULSI3_LIBCALL "*lmul"
+#define UMULSI3_LIBCALL "*ulmul"

gnu/gcc/gcc-2.2.2/config/hp310.h

@@ -0,0 +1,32 @@
+/* Definitions of target machine for GNU compiler.  HP-UX 68010 version.  */
+
+/* See m68k.h.  0 means 68000 without 68881 and no bitfields.   */
+#define	TARGET_DEFAULT 0
+
+#include "hp320.h"
+
+#undef CPP_SPEC
+#undef ASM_SPEC
+
+/* HP does not support a 68020 without a 68881 or a 68010 with a 68881.
+   However, -m68020 does not imply -m68881.  You must specify both
+   if you want both.  */
+
+#ifdef HPUX_ASM
+
+#define CPP_SPEC "-D__HPUX_ASM__ %{m68881: -D__HAVE_68881__}\
+%{m68020: -Dmc68020}%{mc68020: -Dmc68020}\
+%{!traditional:-D_INCLUDE__STDC__}"
+
+#define ASM_SPEC "%{!m68020:%{!mc68020:+X}}"
+
+#else	/* not HPUX_ASM */
+
+#define CPP_SPEC "%{m68881: -D__HAVE_68881__}\
+%{m68020: -Dmc68020}%{mc68020: -Dmc68020}\
+%{!traditional:-D_INCLUDE__STDC__}"
+
+#define ASM_SPEC \
+ "%{m68000:-mc68000}%{mc68000:-mc68000}%{!mc68000:%{!m68000:-mc68020}}"
+
+#endif	/* not HPUX_ASM */

gnu/gcc/gcc-2.2.2/config/hp310g.h

@@ -0,0 +1,12 @@
+/* Definitions of target machine for GNU compiler.  HP-UX 68010 version.
+   Use this file if GCC is supposed to work with the GNU assembler,
+   GNU linker and GNU debugger using DBX debugging information.
+   (In other words, much of HPUX has been cast aside.)  */
+
+/* This wants DBX format.  */
+
+#define DBX_DEBUGGING_INFO
+
+#define USE_GAS
+
+#include "hp310.h"

gnu/gcc/gcc-2.2.2/config/hp320.h

@@ -0,0 +1,617 @@
+/* Definitions of target machine for GNU compiler.  HP-UX 68000/68020 version.
+   Copyright (C) 1987, 1988 Free Software Foundation, Inc.
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GNU CC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GNU CC; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+/* Define USE_GAS if GCC is supposed to work with the GNU assembler,
+   GNU linker and GNU debugger using DBX debugging information.
+   (In other words, much of HPUX has been cast aside.)
+   Undefine USE_GAS if you want GCC to feed the HP assembler.  */
+
+/* #define USE_GAS */  /* Use hp320g.h if you want this.  */
+
+/* Control assembler-syntax conditionals in m68k.md.  */
+
+#ifndef USE_GAS
+#define MOTOROLA		/* Use Motorola syntax rather than "MIT" */
+#define SGS			/* Uses SGS assembler */
+#define SGS_CMP_ORDER		/* Takes cmp operands in reverse order */
+#define HPUX_ASM
+
+/* gcc.c should find libgcc.a itself rather than expecting linker to.  */
+#define LINK_LIBGCC_SPECIAL
+/* The arguments of -L must be a separate argv element.  */
+#define SPACE_AFTER_L_OPTION
+/* HP/UX doesn't have libg.a.  */
+#define LIB_SPEC "%{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p}"
+#endif
+
+/* Be compatible with system stddef.h.  */
+#define SIZE_TYPE "unsigned int"
+
+/* Use atexit for static constructors/destructors, instead of defining
+   our own exit function.  */
+#define HAVE_ATEXIT
+
+#include "m68k.h"
+
+/* See m68k.h.  7 means 68020 with 68881.  */
+
+#ifndef TARGET_DEFAULT
+#define	TARGET_DEFAULT 7
+#endif
+
+/* Define __HAVE_68881__ in preprocessor, unless -msoft-float is specified.
+   This will control the use of inline 68881 insns in certain macros.  */
+
+#ifdef HPUX_ASM
+
+#define ASM_SPEC "%{m68000:+X}%{mc68000:+X}"
+
+#if TARGET_DEFAULT & 02  /* -m68881 is the default */
+
+/* These definitions differ from those used for GAS by defining __HPUX_ASM__.
+   This is needed because some programs, particularly GDB, need to
+   know which assembler is being used so that the correct `asm'
+   instructions can be used. */
+
+#define CPP_SPEC \
+"%{!msoft-float:-D__HAVE_68881__ }\
+%{!ansi:%{!mc68000:%{!m68000:-Dmc68020}} -D_HPUX_SOURCE} -D__HPUX_ASM__"
+
+#else /* default is -msoft-float */
+
+#define CPP_SPEC \
+"%{m68881:-D__HAVE_68881__ }\
+%{!ansi:%{!mc68000:%{!m68000:-Dmc68020}} -D_HPUX_SOURCE} -D__HPUX_ASM__"
+
+#endif /* default is -msoft-float */
+
+#else /* not HPUX_ASM */
+
+#if TARGET_DEFAULT & 02  /* -m68881 is the default */
+
+#define CPP_SPEC \
+"%{!msoft-float:-D__HAVE_68881__ }\
+%{!ansi:%{!mc68000:%{!m68000:-Dmc68020}} -D_HPUX_SOURCE}"
+
+#else /* default is -msoft-float */
+
+#define CPP_SPEC \
+"%{m68881:-D__HAVE_68881__ }\
+%{!ansi:%{!mc68000:%{!m68000:-Dmc68020}} -D_HPUX_SOURCE}"
+
+#endif /* default is -msoft-float */
+
+
+/* -m68000 requires special flags to the assembler.  */
+#define ASM_SPEC \
+ "%{m68000:-mc68000}%{mc68000:-mc68000}%{!mc68000:%{!m68000:-mc68020}}"
+
+/* Tell GCC to put a space after -L when generating such options.  */
+#define SPACE_AFTER_L_OPTION
+
+#endif /* Not HPUX_ASM */
+
+/* Names to predefine in the preprocessor for this target machine
+   (for non-strict-ANSI programs only).  */
+/* These are the ones defined by HPUX cc, plus mc68000 for uniformity with
+   GCC on other 68000 systems.  */
+
+#define CPP_PREDEFINES "-Dhp9000s200 -Dhp9000s300 -DPWB -Dhpux -Dunix -D__hp9000s300 -D__hp9000s200 -D__PWB -D__hpux -D__unix"
+
+/* Every structure or union's size must be a multiple of 2 bytes.  */
+
+#define STRUCTURE_SIZE_BOUNDARY 16
+
+/* hpux doesn't use static area for struct returns. */
+#undef PCC_STATIC_STRUCT_RETURN
+
+/* Generate calls to memcpy, memcmp and memset.  */
+#define TARGET_MEM_FUNCTIONS
+
+#if 0  /* No longer correct in HPUX version 6.5.  */
+/* Function calls don't save any fp registers on hpux.  */
+#undef CALL_USED_REGISTERS
+#define CALL_USED_REGISTERS						\
+ {1, 1, 0, 0, 0, 0, 0, 0,						\
+  1, 1, 0, 0, 0, 0, 0, 1,						\
+  1, 1, 1, 1, 1, 1, 1, 1}
+#endif /* 0 */
+
+#ifdef HPUX_ASM
+
+/* Override parts of m68k.h to fit the HPUX assembler.  */
+
+#undef TARGET_VERSION
+#undef REGISTER_NAMES
+#undef FUNCTION_PROLOGUE
+#undef FUNCTION_EPILOGUE
+#undef ASM_OUTPUT_REG_PUSH
+#undef ASM_OUTPUT_REG_POP
+#undef ASM_FILE_START
+#undef ASM_APP_ON
+#undef ASM_APP_OFF
+#undef TEXT_SECTION_ASM_OP
+#undef DATA_SECTION_ASM_OP
+#undef ASM_OUTPUT_DOUBLE
+#undef ASM_OUTPUT_FLOAT
+#undef ASM_OUTPUT_INT
+#undef ASM_OUTPUT_SHORT
+#undef ASM_OUTPUT_CHAR
+#undef ASM_OUTPUT_BYTE
+#undef ASM_OUTPUT_ADDR_VEC_ELT
+#undef ASM_OUTPUT_ADDR_DIFF_ELT
+#undef ASM_OUTPUT_ALIGN
+#undef ASM_OUTPUT_SKIP
+#undef ASM_OUTPUT_COMMON
+#undef ASM_OUTPUT_LOCAL
+#undef ASM_FORMAT_PRIVATE_NAME
+#undef PRINT_OPERAND
+#undef PRINT_OPERAND_ADDRESS
+#undef FUNCTION_PROFILER
+#undef ASM_OUTPUT_INTERNAL_LABEL
+#undef GLOBAL_ASM_OP
+
+#define TARGET_VERSION fprintf (stderr, " (68k, SGS/hpux syntax)");
+
+#define REGISTER_NAMES \
+{"%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7",	\
+ "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%fp", "%sp",	\
+ "%fp0", "%fp1", "%fp2", "%fp3", "%fp4", "%fp5", "%fp6", "%fp7"}
+
+#define FUNCTION_PROLOGUE(FILE, SIZE)     \
+{ register int regno;						\
+  register int mask = 0;					\
+  extern char call_used_regs[];					\
+  int fsize = (SIZE);						\
+  if (frame_pointer_needed)					\
+    { if (fsize < 0x8000)					\
+        fprintf (FILE, "\tlink.w %%a6,&%d\n", -fsize);		\
+      else if (TARGET_68020)					\
+        fprintf (FILE, "\tlink.l %%a6,&%d\n", -fsize);		\
+      else							\
+	fprintf (FILE, "\tlink.w %%a6,&0\n\tsub.l &%d,%%sp\n", fsize); }  \
+  for (regno = 16; regno < FIRST_PSEUDO_REGISTER; regno++)	\
+    if (regs_ever_live[regno] && ! call_used_regs[regno])	\
+       mask |= 1 << (regno - 16);				\
+  if (mask != 0)						\
+    fprintf (FILE, "\tfmovem &0x%x,-(%%sp)\n", mask & 0xff);       \
+  mask = 0;							\
+  for (regno = 0; regno < 16; regno++)				\
+    if (regs_ever_live[regno] && ! call_used_regs[regno])	\
+       mask |= 1 << (15 - regno);				\
+  if (frame_pointer_needed)					\
+    mask &= ~ (1 << (15-FRAME_POINTER_REGNUM));			\
+  if (exact_log2 (mask) >= 0)					\
+    fprintf (FILE, "\tmov.l %s,-(%%sp)\n", reg_names[15 - exact_log2 (mask)]);  \
+  else if (mask) fprintf (FILE, "\tmovm.l &0x%x,-(%%sp)\n", mask); }
+
+#define FUNCTION_PROFILER(FILE, LABEL_NO) \
+   fprintf (FILE, "\tmov.l &LP%d,%%a0\n\tjsr mcount\n", (LABEL_NO));
+
+#define FUNCTION_EPILOGUE(FILE, SIZE) \
+{ register int regno;						\
+  register int mask, fmask;					\
+  register int nregs;						\
+  int offset, foffset;						\
+  extern char call_used_regs[];					\
+  int fsize = (SIZE);						\
+  int big = 0;							\
+  nregs = 0;  fmask = 0;					\
+  for (regno = 16; regno < FIRST_PSEUDO_REGISTER; regno++)	\
+    if (regs_ever_live[regno] && ! call_used_regs[regno])	\
+      { nregs++; fmask |= 1 << (23 - regno); }			\
+  foffset = nregs * 12;						\
+  nregs = 0;  mask = 0;						\
+  if (frame_pointer_needed) regs_ever_live[FRAME_POINTER_REGNUM] = 0; \
+  for (regno = 0; regno < 16; regno++)				\
+    if (regs_ever_live[regno] && ! call_used_regs[regno])	\
+      { nregs++; mask |= 1 << regno; }				\
+  offset = foffset + nregs * 4;					\
+  if (offset + fsize >= 0x8000 && frame_pointer_needed)		\
+    { fprintf (FILE, "\tmov.l &%d,%%a0\n", -fsize);		\
+      fsize = 0, big = 1; }					\
+  if (exact_log2 (mask) >= 0) {					\
+    if (big)							\
+      fprintf (FILE, "\tmov.l -%d(%%a6,%%a0.l),%s\n",		\
+	       offset + fsize, reg_names[exact_log2 (mask)]);	\
+    else if (! frame_pointer_needed)				\
+      fprintf (FILE, "\tmov.l (%%sp)+,%s\n",			\
+	       reg_names[exact_log2 (mask)]);			\
+    else							\
+      fprintf (FILE, "\tmov.l -%d(%%a6),%s\n",			\
+	       offset + fsize, reg_names[exact_log2 (mask)]); }	\
+  else if (mask) {						\
+    if (big)							\
+      fprintf (FILE, "\tmovm.l -%d(%%a6,%%a0.l),&0x%x\n",	\
+	       offset + fsize, mask);				\
+    else if (! frame_pointer_needed)				\
+      fprintf (FILE, "\tmovm.l (%%sp)+,&0x%x\n", mask);		\
+    else							\
+      fprintf (FILE, "\tmovm.l -%d(%%a6),&0x%x\n",		\
+	       offset + fsize, mask); }				\
+  if (fmask) {							\
+    if (big)							\
+      fprintf (FILE, "\tfmovem -%d(%%a6,%%a0.l),&0x%x\n",	\
+	       foffset + fsize, fmask);				\
+    else if (! frame_pointer_needed)				\
+      fprintf (FILE, "\tfmovem (%%sp)+,&0x%x\n", fmask);	\
+    else							\
+      fprintf (FILE, "\tfmovem -%d(%%a6),&0x%x\n",		\
+	       foffset + fsize, fmask); }			\
+  if (frame_pointer_needed)					\
+    fprintf (FILE, "\tunlk %%a6\n");				\
+  if (current_function_pops_args)				\
+    fprintf (FILE, "\trtd &%d\n", current_function_pops_args);	\
+  else fprintf (FILE, "\trts\n"); }
+
+/* This is how to output an insn to push a register on the stack.
+   It need not be very fast code.  */
+
+#define ASM_OUTPUT_REG_PUSH(FILE,REGNO)  \
+  fprintf (FILE, "\tmov.l %s,-(%%sp)\n", reg_names[REGNO])
+
+/* This is how to output an insn to pop a register from the stack.
+   It need not be very fast code.  */
+
+#define ASM_OUTPUT_REG_POP(FILE,REGNO)  \
+  fprintf (FILE, "\tmov.l (%%sp)+,%s\n", reg_names[REGNO])
+
+/* For HPUX versions before 6.5, define this macro as empty.  */
+#define ASM_FILE_START(FILE)						\
+  if (TARGET_68020)							\
+    {									\
+      if (TARGET_68881)							\
+	 fprintf (FILE, "\tversion 3\n"); /* 68020 fp regs saved */	\
+      else								\
+	 fprintf (FILE, "\tversion 2\n"); /* 68020 no fp regs saved */	\
+    }									\
+  else									\
+    fprintf (FILE, "\tversion 1\n");	/* 68010 */
+
+#define ASM_APP_ON ""
+
+#define ASM_APP_OFF ""
+
+#define TEXT_SECTION_ASM_OP "text"
+
+#define DATA_SECTION_ASM_OP "data"
+
+#define	ASCII_DATA_ASM_OP "byte"
+ 
+/* This is the command to make the user-level label named NAME
+   defined for reference from other files.  */
+
+#define GLOBAL_ASM_OP "global"
+
+/* This says how to output an assembler line
+   to define a global common symbol.  */
+
+#define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED)  \
+( fputs ("\tcomm ", (FILE)),			\
+  assemble_name ((FILE), (NAME)),		\
+  fprintf ((FILE), ",%u\n", (ROUNDED)))
+
+/* This says how to output an assembler line
+   to define a local common symbol.  */
+
+#define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED)  \
+( fputs ("\tlcomm ", (FILE)),			\
+  assemble_name ((FILE), (NAME)),		\
+  fprintf ((FILE), ",%u,2\n", (ROUNDED)))
+
+/* Store in OUTPUT a string (made with alloca) containing
+   an assembler-name for a local static variable named NAME.
+   LABELNO is an integer which is different for each call.  */
+
+#define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO)	\
+( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 12),	\
+  sprintf ((OUTPUT), "%s___%d", (NAME), (LABELNO)))
+
+#define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM)	\
+do{  if (PREFIX[0] == 'L' && PREFIX[1] == 'I')		\
+    fprintf(FILE, "\tset %s%d,.+2\n", PREFIX, NUM);	\
+  else							\
+    fprintf (FILE, "%s%d:\n", PREFIX, NUM);		\
+} while(0)
+
+#define ASM_OUTPUT_DOUBLE(FILE, VALUE)					\
+  fprintf (FILE, "\tdouble 0f%.20g\n", (VALUE))
+
+#define ASM_OUTPUT_FLOAT(FILE, VALUE)					\
+  fprintf (FILE, "\tfloat 0f%.9g\n", (VALUE))
+
+/* This is how to output an assembler line defining an `int' constant.  */
+
+#define ASM_OUTPUT_INT(FILE,VALUE)  \
+( fprintf (FILE, "\tlong "),			\
+  output_addr_const (FILE, (VALUE)),		\
+  fprintf (FILE, "\n"))
+
+/* Likewise for `char' and `short' constants.  */
+
+#define ASM_OUTPUT_SHORT(FILE,VALUE)  \
+( fprintf (FILE, "\tshort "),			\
+  output_addr_const (FILE, (VALUE)),		\
+  fprintf (FILE, "\n"))
+
+#define ASM_OUTPUT_CHAR(FILE,VALUE)  \
+( fprintf (FILE, "\tbyte "),			\
+  output_addr_const (FILE, (VALUE)),		\
+  fprintf (FILE, "\n"))
+
+/* This is how to output an assembler line for a numeric constant byte.  */
+
+#define ASM_OUTPUT_BYTE(FILE,VALUE)  \
+  fprintf (FILE, "\tbyte 0x%x\n", (VALUE))
+
+#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE)  \
+  fprintf (FILE, "\tlong L%d\n", VALUE)
+
+#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL)  \
+  fprintf (FILE, "\tshort L%d-L%d\n", VALUE, REL)
+
+#define ASM_OUTPUT_ALIGN(FILE,LOG)	\
+  if ((LOG) == 1)			\
+    fprintf (FILE, "\tlalign 2\n");	\
+  else if ((LOG) != 0)			\
+    abort ();
+
+#define ASM_OUTPUT_SKIP(FILE,SIZE)  \
+  fprintf (FILE, "\tspace %u\n", (SIZE))
+
+#define ASM_OUTPUT_SOURCE_FILENAME(FILE, FILENAME)
+#define ASM_OUTPUT_SOURCE_LINE(FILE, LINENO)
+
+#define PRINT_OPERAND(FILE, X, CODE)  \
+{ if (CODE == '.') fprintf (FILE, ".");					\
+  else if (CODE == '#') fprintf (FILE, "&");				\
+  else if (CODE == '-') fprintf (FILE, "-(%%sp)");			\
+  else if (CODE == '+') fprintf (FILE, "(%%sp)+");			\
+  else if (CODE == '@') fprintf (FILE, "(%%sp)");			\
+  else if (CODE == '!') fprintf (FILE, "%%fpcr");			\
+  else if (CODE == '$') { if (TARGET_68040_ONLY) fprintf (FILE, "s"); } \
+  else if (CODE == '&') { if (TARGET_68040_ONLY) fprintf (FILE, "d"); } \
+  else if (GET_CODE (X) == REG)						\
+    fprintf (FILE, "%s", reg_names[REGNO (X)]);				\
+  else if (GET_CODE (X) == MEM)						\
+    output_address (XEXP (X, 0));					\
+  else if (GET_CODE (X) == CONST_DOUBLE && GET_MODE (X) == SFmode)	\
+    { union { double d; int i[2]; } u;					\
+      union { float f; int i; } u1;					\
+      u.i[0] = CONST_DOUBLE_LOW (X); u.i[1] = CONST_DOUBLE_HIGH (X);	\
+      u1.f = u.d;							\
+      if (CODE == 'f')							\
+        fprintf (FILE, "&0f%.9g", u1.f);				\
+      else								\
+        fprintf (FILE, "&0x%x", u1.i); }				\
+  else if (GET_CODE (X) == CONST_DOUBLE && GET_MODE (X) == DFmode)	\
+    { union { double d; int i[2]; } u;					\
+      u.i[0] = CONST_DOUBLE_LOW (X); u.i[1] = CONST_DOUBLE_HIGH (X);	\
+      fprintf (FILE, "&0f%.20g", u.d); }				\
+  else { putc ('&', FILE); output_addr_const (FILE, X); }}
+
+#define PRINT_OPERAND_ADDRESS(FILE, ADDR)  \
+{ register rtx reg1, reg2, breg, ireg;					\
+  register rtx addr = ADDR;						\
+  rtx offset;								\
+  switch (GET_CODE (addr))						\
+    {									\
+    case REG:								\
+      fprintf (FILE, "(%s)", reg_names[REGNO (addr)]);			\
+      break;								\
+    case PRE_DEC:							\
+      fprintf (FILE, "-(%s)", reg_names[REGNO (XEXP (addr, 0))]);	\
+      break;								\
+    case POST_INC:							\
+      fprintf (FILE, "(%s)+", reg_names[REGNO (XEXP (addr, 0))]);	\
+      break;								\
+    case PLUS:								\
+      reg1 = 0;	reg2 = 0;						\
+      ireg = 0;	breg = 0;						\
+      offset = 0;							\
+      if (CONSTANT_ADDRESS_P (XEXP (addr, 0)))				\
+	{								\
+	  offset = XEXP (addr, 0);					\
+	  addr = XEXP (addr, 1);					\
+	}								\
+      else if (CONSTANT_ADDRESS_P (XEXP (addr, 1)))			\
+	{								\
+	  offset = XEXP (addr, 1);					\
+	  addr = XEXP (addr, 0);					\
+	}								\
+      if (GET_CODE (addr) != PLUS) ;					\
+      else if (GET_CODE (XEXP (addr, 0)) == SIGN_EXTEND)		\
+	{								\
+	  reg1 = XEXP (addr, 0);					\
+	  addr = XEXP (addr, 1);					\
+	}								\
+      else if (GET_CODE (XEXP (addr, 1)) == SIGN_EXTEND)		\
+	{								\
+	  reg1 = XEXP (addr, 1);					\
+	  addr = XEXP (addr, 0);					\
+	}								\
+      else if (GET_CODE (XEXP (addr, 0)) == MULT)			\
+	{								\
+	  reg1 = XEXP (addr, 0);					\
+	  addr = XEXP (addr, 1);					\
+	}								\
+      else if (GET_CODE (XEXP (addr, 1)) == MULT)			\
+	{								\
+	  reg1 = XEXP (addr, 1);					\
+	  addr = XEXP (addr, 0);					\
+	}								\
+      else if (GET_CODE (XEXP (addr, 0)) == REG)			\
+	{								\
+	  reg1 = XEXP (addr, 0);					\
+	  addr = XEXP (addr, 1);					\
+	}								\
+      else if (GET_CODE (XEXP (addr, 1)) == REG)			\
+	{								\
+	  reg1 = XEXP (addr, 1);					\
+	  addr = XEXP (addr, 0);					\
+	}								\
+      if (GET_CODE (addr) == REG || GET_CODE (addr) == MULT		\
+	  || GET_CODE (addr) == SIGN_EXTEND)				\
+	{ if (reg1 == 0) reg1 = addr; else reg2 = addr; addr = 0; }	\
+/*  for OLD_INDEXING							\
+      else if (GET_CODE (addr) == PLUS)					\
+	{								\
+	  if (GET_CODE (XEXP (addr, 0)) == REG)				\
+	    {								\
+	      reg2 = XEXP (addr, 0);					\
+	      addr = XEXP (addr, 1);					\
+	    }								\
+	  else if (GET_CODE (XEXP (addr, 1)) == REG)			\
+	    {								\
+	      reg2 = XEXP (addr, 1);					\
+	      addr = XEXP (addr, 0);					\
+	    }								\
+	}								\
+  */									\
+      if (offset != 0) { if (addr != 0) abort (); addr = offset; }	\
+      if ((reg1 && (GET_CODE (reg1) == SIGN_EXTEND			\
+		    || GET_CODE (reg1) == MULT))			\
+	  || (reg2 != 0 && REGNO_OK_FOR_BASE_P (REGNO (reg2))))		\
+	{ breg = reg2; ireg = reg1; }					\
+      else if (reg1 != 0 && REGNO_OK_FOR_BASE_P (REGNO (reg1)))		\
+	{ breg = reg1; ireg = reg2; }					\
+      if (ireg != 0 && breg == 0 && GET_CODE (addr) == LABEL_REF)	\
+        { int scale = 1;						\
+	  if (GET_CODE (ireg) == MULT)					\
+	    { scale = INTVAL (XEXP (ireg, 1));				\
+	      ireg = XEXP (ireg, 0); }					\
+	  if (GET_CODE (ireg) == SIGN_EXTEND)				\
+	    fprintf (FILE, "L%d-LI%d(%%pc,%s.w",			\
+		     CODE_LABEL_NUMBER (XEXP (addr, 0)),		\
+		     CODE_LABEL_NUMBER (XEXP (addr, 0)),		\
+		     reg_names[REGNO (XEXP (ireg, 0))]); 		\
+	  else								\
+	    fprintf (FILE, "L%d-LI%d(%%pc,%s.l",			\
+		     CODE_LABEL_NUMBER (XEXP (addr, 0)),		\
+		     CODE_LABEL_NUMBER (XEXP (addr, 0)),		\
+		     reg_names[REGNO (ireg)]);				\
+	  if (scale != 1) fprintf (FILE, "*%d", scale);			\
+	  putc (')', FILE);						\
+	  break; }							\
+      if (ireg != 0 || breg != 0)					\
+	{ int scale = 1;						\
+	  if (breg == 0)						\
+	    abort ();							\
+	  if (addr != 0)						\
+	    output_addr_const (FILE, addr);				\
+	  fprintf (FILE, "(%s", reg_names[REGNO (breg)]);		\
+	  if (ireg != 0)						\
+	    putc (',', FILE);						\
+	  if (ireg != 0 && GET_CODE (ireg) == MULT)			\
+	    { scale = INTVAL (XEXP (ireg, 1));				\
+	      ireg = XEXP (ireg, 0); }					\
+	  if (ireg != 0 && GET_CODE (ireg) == SIGN_EXTEND)		\
+	    fprintf (FILE, "%s.w", reg_names[REGNO (XEXP (ireg, 0))]);	\
+	  else if (ireg != 0)						\
+	    fprintf (FILE, "%s.l", reg_names[REGNO (ireg)]);		\
+	  if (scale != 1) fprintf (FILE, "*%d", scale);			\
+	  putc (')', FILE);						\
+	  break;							\
+	}								\
+      else if (reg1 != 0 && GET_CODE (addr) == LABEL_REF)		\
+	{ fprintf (FILE, "L%d-LI%d(%%pc,%s.w)",				\
+		   CODE_LABEL_NUMBER (XEXP (addr, 0)),			\
+		   CODE_LABEL_NUMBER (XEXP (addr, 0)),			\
+		   reg_names[REGNO (reg1)]);				\
+	  break; }							\
+    default:								\
+      if (GET_CODE (addr) == CONST_INT					\
+	  && INTVAL (addr) < 0x8000					\
+	  && INTVAL (addr) >= -0x8000)					\
+	fprintf (FILE, "%d.w", INTVAL (addr));				\
+      else								\
+        output_addr_const (FILE, addr);					\
+    }}
+
+#define	ASM_OUTPUT_ASCII(f, p, size)	\
+{ register int i;			\
+  int inside;				\
+  inside = FALSE;			\
+  for (i = 0; i < (size); i++) {	\
+    if (i % 8 == 0) {			\
+      if (i != 0) {			\
+	if (inside)			\
+	  putc('"', (f));		\
+	putc('\n', (f));		\
+	inside = FALSE;			\
+      }					\
+      fprintf((f), "\t%s ", ASCII_DATA_ASM_OP);	\
+    }					\
+    if ((p)[i] < 32 || (p)[i] == '\\' || (p)[i] == '"' || (p)[i] == 127) {	\
+      if (inside) {			\
+	putc('"', (f));			\
+	inside = FALSE;			\
+      }					\
+      if (i % 8 != 0)			\
+	putc(',', (f));			\
+      fprintf((f), "%d", (p)[i]);	\
+    } else {				\
+      if (!inside) {			\
+	if (i % 8 != 0)			\
+	  putc(',', (f));		\
+	putc('"', (f));			\
+	inside = TRUE;			\
+      }					\
+      putc((p)[i], (f));		\
+    }					\
+  }					\
+  if (inside)				\
+    putc('"', (f));			\
+  putc('\n', (f));			\
+}
+
+/* Translate Motorola opcodes such as `jbeq'
+   into SGS opcodes such as `beq.w'.
+   Delete the `e' in `move...' and `fmove'.
+   Change `ftst' to `ftest'.  */
+
+#define ASM_OUTPUT_OPCODE(FILE, PTR)			\
+{ if ((PTR)[0] == 'j' && (PTR)[1] == 'b')		\
+    { ++(PTR);						\
+      while (*(PTR) != ' ')				\
+	{ putc (*(PTR), (FILE)); ++(PTR); }		\
+      fprintf ((FILE), ".w"); }				\
+  else if ((PTR)[0] == 'f')				\
+    {							\
+      if (!strncmp ((PTR), "fmove", 5))			\
+	{ fprintf ((FILE), "fmov"); (PTR) += 5; }	\
+      else if (!strncmp ((PTR), "ftst", 4))		\
+	{ fprintf ((FILE), "ftest"); (PTR) += 4; }	\
+    }							\
+  else if ((PTR)[0] == 'm' && (PTR)[1] == 'o'		\
+	   && (PTR)[2] == 'v' && (PTR)[3] == 'e')	\
+    { fprintf ((FILE), "mov"); (PTR) += 4; }		\
+}
+
+/* Prevent output of `gcc_compiled.:'.  */
+
+#define ASM_IDENTIFY_GCC(FILE)
+
+#else /* not HPUX_ASM */
+
+#undef FUNCTION_PROFILER
+#define FUNCTION_PROFILER(FILE, LABELNO)  \
+   fprintf (FILE, "\tmovl #LP%d,d0\n\tjsr mcount\n", (LABELNO));
+
+#endif /* not HPUX_ASM */

gnu/gcc/gcc-2.2.2/config/hp320g.h

@@ -0,0 +1,12 @@
+/* Definitions of target machine for GNU compiler.  HP-UX 68000/68020 version.
+   Use this file if GCC is supposed to work with the GNU assembler,
+   GNU linker and GNU debugger using DBX debugging information.
+   (In other words, much of HPUX has been cast aside.)  */
+
+/* This wants DBX format.  */
+
+#define DBX_DEBUGGING_INFO
+
+#define USE_GAS
+
+#include "hp320.h"

gnu/gcc/gcc-2.2.2/config/hp3bsd.h

@@ -0,0 +1,40 @@
+#include "m68k.h"
+
+/* See m68k.h.  7 means 68020 with 68881.  */
+
+#define TARGET_DEFAULT 7
+
+/* Define __HAVE_68881__ in preprocessor, unless -msoft-float is specified.
+   This will control the use of inline 68881 insns in certain macros.  */
+
+#define CPP_SPEC "%{!msoft-float:-D__HAVE_68881__ -D__HAVE_FPU__}"
+
+/* Names to predefine in the preprocessor for this target machine.  */
+
+#define CPP_PREDEFINES "-Dmc68000 -Dmc68020 -Dhp300 -Dhp9000 -Dunix"
+
+/* Link with libg.a when debugging, for dbx's sake.  */
+
+#define LIB_SPEC "%{g:-lg} %{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p} "
+
+/* Every structure or union's size must be a multiple of 2 bytes.  */
+
+#define STRUCTURE_SIZE_BOUNDARY 16
+
+/* This is BSD, so it wants DBX format.  */
+
+#define DBX_DEBUGGING_INFO
+
+/* Do not break .stabs pseudos into continuations.  */
+
+#define DBX_CONTIN_LENGTH 0
+
+/* This is the char to use for continuation (in case we need to turn
+   continuation back on).  */
+
+#define DBX_CONTIN_CHAR '?'
+
+/* Don't use the `xsfoo;' construct in DBX output; this system
+   doesn't support it.  */
+
+#define DBX_NO_XREFS

gnu/gcc/gcc-2.2.2/config/i386bsd.h

@@ -0,0 +1,8 @@
+/* Configuration for an i386 running 386BSD as the target machine.  */
+#include "i386mach.h"
+
+#undef CPP_PREDEFINES
+#define CPP_PREDEFINES "-Dunix -Di386"
+
+/* Specify extra dir to search for include files.  */
+#undef SYSTEM_INCLUDE_DIR

gnu/gcc/gcc-2.2.2/config/i386gas.h

@@ -0,0 +1,151 @@
+/* Definitions for Intel 386 running system V with gnu tools
+   Copyright (C) 1988 Free Software Foundation, Inc.
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GNU CC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GNU CC; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+/* Note that seq386gas.h is a GAS configuration that does not use this
+   file. */
+
+#include "i386.h"
+/* Use the bsd assembler syntax.  */
+/* we need to do this because gas is really a bsd style assembler,
+ * and so doesn't work well this these att-isms:
+ *
+ *  ASM_OUTPUT_SKIP is .set .,.+N, which isn't implemented in gas
+ *  ASM_OUTPUT_LOCAL is done with .set .,.+N, but that can't be
+ *   used to define bss static space
+ *
+ * Next is the question of whether to uses underscores.  RMS didn't
+ * like this idea at first, but since it is now obvious that we
+ * need this separate tm file for use with gas, at least to get
+ * dbx debugging info, I think we should also switch to underscores.
+ * We can keep i386v for real att style output, and the few
+ * people who want both form will have to compile twice.
+ */
+
+#include "bsd386.h"
+
+/* these come from bsd386.h, but are specific to sequent */
+#undef DBX_NO_XREFS
+#undef DBX_CONTIN_LENGTH
+
+/* By default, target has a 80387.  */
+
+#define TARGET_DEFAULT 1
+
+/* Specify predefined symbols in preprocessor.  */
+
+#define CPP_PREDEFINES "-Dunix -Di386"
+
+/* Allow #sccs in preprocessor.  */
+
+#define SCCS_DIRECTIVE
+
+/* Output #ident as a .ident.  */
+
+#define ASM_OUTPUT_IDENT(FILE, NAME) fprintf (FILE, "\t.ident \"%s\"\n", NAME);
+
+/* We do not want to output SDB debugging information.  */
+
+#undef SDB_DEBUGGING_INFO
+
+/* We want to output DBX debugging information.  */
+
+#define DBX_DEBUGGING_INFO
+
+/* Implicit library calls should use memcpy, not bcopy, etc.  */
+
+#define TARGET_MEM_FUNCTIONS
+
+#if 0  /* People say gas uses the log as the arg to .align.  */
+/* When using gas, .align N aligns to an N-byte boundary.  */
+
+#undef ASM_OUTPUT_ALIGN
+#define ASM_OUTPUT_ALIGN(FILE,LOG)	\
+     if ((LOG)!=0) fprintf ((FILE), "\t.align %d\n", 1<<(LOG))
+#endif
+
+/* Align labels, etc. at 4-byte boundaries.
+   For the 486, align to 16-byte boundary for sake of cache.  */
+
+#undef ASM_OUTPUT_ALIGN_CODE
+#define ASM_OUTPUT_ALIGN_CODE(FILE)			\
+     fprintf ((FILE), "\t.align %d,0x90\n",		\
+	      TARGET_486 ? 4 : 2);  /* Use log of 16 or log of 4 as arg.  */
+
+/* Align start of loop at 4-byte boundary.  */
+
+#undef ASM_OUTPUT_LOOP_ALIGN
+#define ASM_OUTPUT_LOOP_ALIGN(FILE) \
+     fprintf ((FILE), "\t.align 2,0x90\n");  /* Use log of 4 as arg.  */
+
+/* Machines that use the AT&T assembler syntax
+   also return floating point values in an FP register.  */
+/* Define how to find the value returned by a function.
+   VALTYPE is the data type of the value (as a tree).
+   If the precise function being called is known, FUNC is its FUNCTION_DECL;
+   otherwise, FUNC is 0.  */
+
+#define VALUE_REGNO(MODE) \
+  (((MODE)==SFmode || (MODE)==DFmode) ? FIRST_FLOAT_REG : 0)
+
+/* 1 if N is a possible register number for a function value. */
+
+#define FUNCTION_VALUE_REGNO_P(N) ((N) == 0 || (N)== FIRST_FLOAT_REG)
+
+#undef ASM_FILE_START
+#define ASM_FILE_START(FILE) \
+  fprintf (FILE, "\t.file\t\"%s\"\n", dump_base_name);
+
+/* A C statement or statements which output an assembler instruction
+   opcode to the stdio stream STREAM.  The macro-operand PTR is a
+   variable of type `char *' which points to the opcode name in its
+   "internal" form--the form that is written in the machine description.
+
+   GAS version 1.38.1 doesn't understand the `repz' opcode mnemonic.
+   So use `repe' instead.  */
+
+#define ASM_OUTPUT_OPCODE(STREAM, PTR)	\
+{									\
+  if ((PTR)[0] == 'r'							\
+      && (PTR)[1] == 'e'						\
+      && (PTR)[2] == 'p')						\
+    {									\
+      if ((PTR)[3] == 'z')						\
+	{								\
+	  fprintf (STREAM, "repe");					\
+	  (PTR) += 4;							\
+	}								\
+      else if ((PTR)[3] == 'n' && (PTR)[4] == 'z')			\
+	{								\
+	  fprintf (STREAM, "repne");					\
+	  (PTR) += 5;							\
+	}								\
+    }									\
+}
+
+/* Define macro used to output shift-double opcodes when the shift
+   count is in %cl.  Some assemblers require %cl as an argument;
+   some don't.
+
+   GAS requires the %cl argument, so override unx386.h. */
+
+#undef AS3_SHIFT_DOUBLE
+#define AS3_SHIFT_DOUBLE(a,b,c,d) AS3 (a,b,c,d)
+
+/* Print opcodes the way that GAS expects them. */
+#define GAS_MNEMONICS 1

gnu/gcc/gcc-2.2.2/config/i386isc.h

@@ -0,0 +1,40 @@
+/* Definitions for Intel 386 running Interactive Unix System V.
+   Specifically, this is for recent versions that support POSIX;
+   for version 2.0.2, use configuration option i386-sysv instead.  */
+
+/* Mostly it's like AT&T Unix System V. */
+
+#include "i386v.h"
+
+/* Use crt1.o, not crt0.o, as a startup file, and crtn.o as a closing file. */
+#undef STARTFILE_SPEC
+#define STARTFILE_SPEC \
+  "%{!shlib:%{posix:%{pg:mcrtp1.o%s}%{!pg:%{p:mcrtp1.o%s}%{!p:crtp1.o%s}}}\
+   %{!posix:%{pg:mcrt1.o%s}%{!pg:%{p:mcrt1.o%s}%{!p:crt1.o%s}}\
+   %{p:-L/lib/libp} %{pg:-L/lib/libp}}}\
+   %{shlib:%{posix:crtp1.o%s}%{!posix:crt1.o%s}} crtbegin.o%s"
+  
+#define ENDFILE_SPEC "crtend.o%s crtn.o%s"
+
+/* Library spec */
+#undef LIB_SPEC
+#define LIB_SPEC "%{posix:-lcposix} %{shlib:-lc_s} -lc -lg"
+
+#if 0
+/* This is apparently not true: ISC versions up to 3.0,at least, use
+   the standard calling sequence in which the called function pops the
+   extra arg.  */
+/* caller has to pop the extra argument passed to functions that return
+   structures. */
+
+#undef RETURN_POPS_ARGS
+#define RETURN_POPS_ARGS(FUNTYPE,SIZE)   \
+  (TREE_CODE (FUNTYPE) == IDENTIFIER_NODE ? 0			\
+   : (TARGET_RTD						\
+      && (TYPE_ARG_TYPES (FUNTYPE) == 0				\
+	  || (TREE_VALUE (tree_last (TYPE_ARG_TYPES (FUNTYPE)))	\
+	      == void_type_node))) ? (SIZE)			\
+   : 0)
+/* On other 386 systems, the last line looks like this:
+   : (aggregate_value_p (FUNTYPE)) ? GET_MODE_SIZE (Pmode) : 0)  */
+#endif

gnu/gcc/gcc-2.2.2/config/i386mach.h

@@ -0,0 +1,76 @@
+/* Configuration for an i386 running Mach as the target machine.  */
+#include "i386gas.h"
+
+#undef CPP_PREDEFINES
+#define CPP_PREDEFINES "-Dunix -Di386 -DMACH"
+
+/* Specify extra dir to search for include files.  */
+#define SYSTEM_INCLUDE_DIR "/usr/mach/include"
+
+/* Defines to be able to build libgcc.a with GCC.  */
+
+/* It might seem that these are not important, since gcc 2 will never
+   call libgcc for these functions.  But programs might be linked with
+   code compiled by gcc 1, and then these will be used.  */
+
+#define perform_udivsi3(a,b)						\
+{									\
+  register int dx asm("dx");						\
+  register int ax asm("ax");						\
+									\
+  dx = 0;								\
+  ax = a;								\
+  asm ("divl %3" : "=a" (ax), "=d" (dx) : "a" (ax), "g" (b), "d" (dx));	\
+  return ax;								\
+}
+
+#define perform_divsi3(a,b)						\
+{									\
+  register int dx asm("dx");						\
+  register int ax asm("ax");						\
+									\
+  ax = a;								\
+  asm ("cltd\n\tidivl %3" : "=a" (ax), "=d" (dx) : "a" (ax), "g" (b));	\
+  return ax;								\
+}
+
+#define perform_umodsi3(a,b)						\
+{									\
+  register int dx asm("dx");						\
+  register int ax asm("ax");						\
+									\
+  dx = 0;								\
+  ax = a;								\
+  asm ("divl %3" : "=a" (ax), "=d" (dx) : "a" (ax), "g" (b), "d" (dx));	\
+  return dx;								\
+}
+
+#define perform_modsi3(a,b)						\
+{									\
+  register int dx asm("dx");						\
+  register int ax asm("ax");						\
+									\
+  ax = a;								\
+  asm ("cltd\n\tidivl %3" : "=a" (ax), "=d" (dx) : "a" (ax), "g" (b));	\
+  return dx;								\
+}
+
+#define perform_fixdfsi(a)						\
+{									\
+  auto unsigned short ostatus;						\
+  auto unsigned short nstatus;						\
+  auto int ret;								\
+									\
+  &ostatus;			/* guarantee these land in memory */	\
+  &nstatus;								\
+  &ret;									\
+									\
+  asm volatile ("fnstcw %0" : "=m" (ostatus));				\
+  nstatus = ostatus | 0x0c00;						\
+  asm volatile ("fldcw %0" : /* no outputs */ : "m" (nstatus));		\
+  asm volatile ("fldl %0" : /* no outputs */ : "m" (a));		\
+  asm volatile ("fistpl %0" : "=m" (ret));				\
+  asm volatile ("fldcw %0" : /* no outputs */ : "m" (ostatus));		\
+									\
+  return ret;								\
+}

gnu/gcc/gcc-2.2.2/config/i386rose.h

@@ -0,0 +1,359 @@
+/* Definitions of target machine for GNU compiler.
+   Encore Multimax (OSF/1 with OSF/rose) version.
+   Copyright (C) 1991 Free Software Foundation, Inc.
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GNU CC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GNU CC; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+#include "halfpic.h"
+#include "i386gas.h"
+
+#define OSF_OS
+
+/* Use a more friendly abort which prints internal compiler error,
+   rather than just dumping core.  */
+
+#ifndef abort
+#define abort fancy_abort
+#endif
+
+#define MASK_HALF_PIC     0x00000100  /* Mask for half-pic code */
+#define TARGET_HALF_PIC   (target_flags & MASK_HALF_PIC)
+
+#ifdef SUBTARGET_SWITCHES
+#undef SUBTARGET_SWITCHES
+#endif
+#define SUBTARGET_SWITCHES \
+     { "half-pic",     MASK_HALF_PIC},    \
+     { "no-half-pic", -MASK_HALF_PIC},
+ 
+/* Prefix that appears before all global/static identifiers, except for
+   temporary labels.  */
+
+#define IDENTIFIER_PREFIX "_"
+
+/* Suffix that appears after all global/static identifiers, except for
+   temporary labels.  */
+
+#define IDENTIFIER_SUFFIX ""
+
+/* Change default predefines.  */
+#ifdef CPP_PREDEFINES
+#undef CPP_PREDEFINES
+#endif
+#define CPP_PREDEFINES "-DOSF -DOSF1 -Dunix -Di386"
+
+#ifdef  CPP_SPEC
+#undef  CPP_SPEC
+#endif
+#define CPP_SPEC "\
+%{.S:	-D__LANGUAGE_ASSEMBLY %{!ansi:-DLANGUAGE_ASSEMBLY}} \
+%{.cc:	-D__LANGUAGE_C_PLUS_PLUS} \
+%{.cxx:	-D__LANGUAGE_C_PLUS_PLUS} \
+%{.C:	-D__LANGUAGE_C_PLUS_PLUS} \
+%{.m:	-D__LANGUAGE_OBJECTIVE_C} \
+%{!.S:	-D__LANGUAGE_C %{!ansi:-DLANGUAGE_C}}"
+
+#ifdef  CC1_SPEC
+#undef  CC1_SPEC
+#endif
+#define CC1_SPEC                 \
+  "%{pic-none:    -mno-half-pic} \
+   %{pic-lib:     -mhalf-pic}    \
+   %{pic-extern:  -mhalf-pic}    \
+   %{pic-calls:   -mhalf-pic}"
+
+#ifdef ASM_SPEC
+#undef ASM_SPEC
+#endif
+#define ASM_SPEC       ""
+
+#ifdef  LINK_SPEC
+#undef  LINK_SPEC
+#endif
+#define LINK_SPEC      "%{v*: -v}                           \
+	               %{!noshrlib: %{pic-none: -noshrlib} %{!pic-none: -warn_nopic}} \
+	               %{nostdlib} %{noshrlib} %{glue}"
+
+#ifdef  LIB_SPEC
+#undef  LIB_SPEC
+#endif
+
+#define LIB_SPEC "-lc"
+
+#ifdef  LIBG_SPEC
+#undef  LIBG_SPEC
+#endif
+#define LIBG_SPEC      ""
+
+#ifdef  STARTFILE_SPEC
+#undef  STARTFILE_SPEC
+#endif
+#define STARTFILE_SPEC "%{pg:gcrt0.o%s}%{!pg:%{p:mcrt0.o%s}%{!p:crt0.o%s}}"
+
+#ifdef  MACHINE_TYPE
+#undef  MACHINE_TYPE
+#endif
+
+#define MACHINE_TYPE   ((!TARGET_486) ? "80386 running OSF/1 with OSF/rose objects" :  \
+                                        "80486 running OSF/1 with OSF/rose objects")
+
+#ifdef  MD_EXEC_PREFIX
+#undef  MD_EXEC_PREFIX
+#endif
+#define MD_EXEC_PREFIX		"/usr/ccs/gcc/"
+
+#ifdef  MD_STARTFILE_PREFIX
+#undef  MD_STARTFILE_PREFIX
+#endif
+#define MD_STARTFILE_PREFIX	"/usr/ccs/lib/"
+
+/* Tell final.c we don't need a label passed to mcount.  */
+#define NO_PROFILE_DATA
+
+#undef  FUNCTION_PROFILER
+#define FUNCTION_PROFILER(FILE, LABELNO) fprintf (FILE, "\tcall _mcount\n")
+
+/* Some machines may desire to change what optimizations are
+   performed for various optimization levels.   This macro, if
+   defined, is executed once just after the optimization level is
+   determined and before the remainder of the command options have
+   been parsed.  Values set in this macro are used as the default
+   values for the other command line options.
+
+   LEVEL is the optimization level specified; 2 if -O2 is
+   specified, 1 if -O is specified, and 0 if neither is specified.  */
+
+#define OPTIMIZATION_OPTIONS(LEVEL)					\
+{									\
+  flag_gnu_linker			= FALSE;			\
+									\
+  if (LEVEL)								\
+    {									\
+      flag_omit_frame_pointer		= TRUE;				\
+      flag_thread_jumps			= TRUE;				\
+    }									\
+									\
+  if (LEVEL >= 2)							\
+    {									\
+      flag_strength_reduce		= TRUE;				\
+      flag_cse_follow_jumps		= TRUE;				\
+      flag_expensive_optimizations	= TRUE;				\
+      flag_rerun_cse_after_loop		= TRUE;				\
+    }									\
+									\
+  if (LEVEL >= 3)							\
+    {									\
+      flag_inline_functions		= TRUE;				\
+    }									\
+}
+
+/* A C expression that is 1 if the RTX X is a constant which is a
+   valid address.  On most machines, this can be defined as
+   `CONSTANT_P (X)', but a few machines are more restrictive in
+   which constant addresses are supported.
+
+   `CONSTANT_P' accepts integer-values expressions whose values are
+   not explicitly known, such as `symbol_ref', `label_ref', and
+   `high' expressions and `const' arithmetic expressions, in
+   addition to `const_int' and `const_double' expressions.  */
+
+#ifdef CONSTANT_ADDRESS_P
+#undef CONSTANT_ADDRESS_P
+#endif
+#define CONSTANT_ADDRESS_P(X)                                           \
+  (CONSTANT_P (X) && (!HALF_PIC_P () || !HALF_PIC_ADDRESS_P (X)))
+
+/* Define this macro if references to a symbol must be treated
+   differently depending on something about the variable or
+   function named by the symbol (such as what section it is in).
+
+   The macro definition, if any, is executed immediately after the
+   rtl for DECL has been created and stored in `DECL_RTL (DECL)'. 
+   The value of the rtl will be a `mem' whose address is a
+   `symbol_ref'.
+
+   The usual thing for this macro to do is to a flag in the
+   `symbol_ref' (such as `SYMBOL_REF_FLAG') or to store a modified
+   name string in the `symbol_ref' (if one bit is not enough
+   information).
+
+   The best way to modify the name string is by adding text to the
+   beginning, with suitable punctuation to prevent any ambiguity. 
+   Allocate the new name in `saveable_obstack'.  You will have to
+   modify `ASM_OUTPUT_LABELREF' to remove and decode the added text
+   and output the name accordingly.
+
+   You can also check the information stored in the `symbol_ref' in
+   the definition of `GO_IF_LEGITIMATE_ADDRESS' or
+   `PRINT_OPERAND_ADDRESS'. */
+
+#ifdef ENCODE_SECTION_INFO
+#undef ENCODE_SECTION_INFO
+#endif
+#define ENCODE_SECTION_INFO(DECL)					\
+do									\
+  {									\
+   if (HALF_PIC_P ())						        \
+      HALF_PIC_ENCODE (DECL);						\
+  }									\
+while (0)
+
+
+/* A C statement (sans semicolon) to output to the stdio stream
+   STREAM any text necessary for declaring the name NAME of an
+   initialized variable which is being defined.  This macro must
+   output the label definition (perhaps using `ASM_OUTPUT_LABEL'). 
+   The argument DECL is the `VAR_DECL' tree node representing the
+   variable.
+
+   If this macro is not defined, then the variable name is defined
+   in the usual manner as a label (by means of `ASM_OUTPUT_LABEL').  */
+
+#ifdef ASM_DECLARE_OBJECT_NAME
+#undef ASM_DECLARE_OBJECT_NAME
+#endif
+#define ASM_DECLARE_OBJECT_NAME(STREAM, NAME, DECL)			\
+do									\
+ {									\
+   ASM_OUTPUT_LABEL(STREAM,NAME);                                       \
+   HALF_PIC_DECLARE (NAME);						\
+ }									\
+while (0)
+
+/* This is how to declare a function name. */
+
+#define ASM_DECLARE_FUNCTION_NAME(STREAM,NAME,DECL)			\
+do									\
+ {									\
+   ASM_OUTPUT_LABEL(STREAM,NAME);                                       \
+   HALF_PIC_DECLARE (NAME);						\
+ }									\
+while (0)
+
+/* Tell collect that the object format is OSF/rose.  */
+#define OBJECT_FORMAT_ROSE
+
+/* Use atexit for static constructors/destructors, instead of defining
+   our own exit function.  */
+#define HAVE_ATEXIT
+
+/* Define this macro meaning that gcc should find the library 'libgcc.a'
+   by hand, rather than passing the argument '-lgcc' to tell the linker
+   to do the search */
+#define LINK_LIBGCC_SPECIAL
+
+/* A C statement to output assembler commands which will identify the object
+  file as having been compile with GNU CC. We don't need or want this for
+  OSF1. GDB doesn't need it and kdb doesn't like it */
+#define ASM_IDENTIFY_GCC(FILE)
+
+/* This is how to output an assembler line defining a `double' constant.
+   Use "word" pseudos to avoid printing NaNs, infinity, etc.  */
+
+/* This is how to output an assembler line defining a `double' constant.  */
+
+#ifdef ASM_OUTPUT_DOUBLE
+#undef ASM_OUTPUT_DOUBLE
+#endif
+#define ASM_OUTPUT_DOUBLE(STREAM,VALUE)					\
+{									\
+  union { double d; long l[2]; } u2;					\
+  u2.d = VALUE;								\
+  fprintf (STREAM, "\t.long\t0x%08lx\t\t# %.20g\n\t.long\t0x%08lx\n",	\
+	   u2.l[0], u2.d, u2.l[1]);					\
+}
+
+/* This is how to output an assembler line defining a `float' constant.  */
+
+#ifdef ASM_OUTPUT_FLOAT
+#undef ASM_OUTPUT_FLOAT
+#endif
+#define ASM_OUTPUT_FLOAT(STREAM,VALUE)					\
+{									\
+  union { float f; long l; } u2;					\
+  u2.f = VALUE;								\
+  fprintf (STREAM, "\t.long\t0x%08lx\t\t# %.12g\n", u2.l, u2.f);	\
+}
+
+/* Generate calls to memcpy, etc., not bcopy, etc. */
+#define TARGET_MEM_FUNCTIONS
+
+
+
+/* Defines to be able to build libgcc.a with GCC.  */
+
+#define perform_udivsi3(a,b)						\
+{									\
+  register int dx asm("dx");						\
+  register int ax asm("ax");						\
+									\
+  dx = 0;								\
+  ax = a;								\
+  asm ("divl %3" : "=a" (ax), "=d" (dx) : "a" (ax), "g" (b), "d" (dx));	\
+  return ax;								\
+}
+
+#define perform_divsi3(a,b)						\
+{									\
+  register int dx asm("dx");						\
+  register int ax asm("ax");						\
+									\
+  ax = a;								\
+  asm ("cltd\n\tidivl %3" : "=a" (ax), "=d" (dx) : "a" (ax), "g" (b));	\
+  return ax;								\
+}
+
+#define perform_umodsi3(a,b)						\
+{									\
+  register int dx asm("dx");						\
+  register int ax asm("ax");						\
+									\
+  dx = 0;								\
+  ax = a;								\
+  asm ("divl %3" : "=a" (ax), "=d" (dx) : "a" (ax), "g" (b), "d" (dx));	\
+  return dx;								\
+}
+
+#define perform_modsi3(a,b)						\
+{									\
+  register int dx asm("dx");						\
+  register int ax asm("ax");						\
+									\
+  ax = a;								\
+  asm ("cltd\n\tidivl %3" : "=a" (ax), "=d" (dx) : "a" (ax), "g" (b));	\
+  return dx;								\
+}
+
+#define perform_fixdfsi(a)						\
+{									\
+  auto unsigned short ostatus;						\
+  auto unsigned short nstatus;						\
+  auto int ret;								\
+									\
+  &ostatus;			/* guarantee these land in memory */	\
+  &nstatus;								\
+  &ret;									\
+									\
+  asm volatile ("fnstcw %0" : "=m" (ostatus));				\
+  nstatus = ostatus | 0x0c00;						\
+  asm volatile ("fldcw %0" : /* no outputs */ : "m" (nstatus));		\
+  asm volatile ("fldl %0" : /* no outputs */ : "m" (a));		\
+  asm volatile ("fistpl %0" : "=m" (ret));				\
+  asm volatile ("fldcw %0" : /* no outputs */ : "m" (ostatus));		\
+									\
+  return ret;								\
+}

gnu/gcc/gcc-2.2.2/config/i386sco.h

@@ -0,0 +1,66 @@
+/* Definitions for Intel 386 running SCO Unix System V.  */
+
+
+/* Mostly it's like AT&T Unix System V. */
+
+#include "i386v.h"
+
+/* Use crt1.o as a startup file and crtn.o as a closing file.  */
+
+#undef STARTFILE_SPEC
+#define STARTFILE_SPEC  "%{pg:gcrt1.o%s}%{!pg:%{p:mcrt1.o%s}%{!p:crt1.o%s}} crtbegin.o%s"
+
+#define ENDFILE_SPEC "crtend.o%s crtn.o%s"
+
+/* Library spec, including SCO international language support. */
+
+#undef LIB_SPEC
+#define LIB_SPEC \
+ "%{p:-L/usr/lib/libp}%{pg:-L/usr/lib/libp} %{scointl:libintl.a%s} -lc"
+
+/* Specify predefined symbols in preprocessor.  */
+
+#undef CPP_PREDEFINES
+#define CPP_PREDEFINES "-Dunix -Di386 -DM_UNIX -DM_I386 -DM_COFF -DM_WORDSWAP"
+
+#undef CPP_SPEC
+#define CPP_SPEC "%{scointl:-DM_INTERNAT}"
+
+/* Use atexit for static destructors, instead of defining
+   our own exit function.  */
+#define HAVE_ATEXIT
+
+/* Specify the size_t type.  */
+#define SIZE_TYPE "unsigned int"
+
+#if 0 /* Not yet certain whether this is needed.  */
+/* If no 387, use the general regs to return floating values,
+   since this system does not emulate the 80387.  */
+
+#define VALUE_REGNO(MODE) \
+  ((TARGET_80387 && ((MODE) == SFmode || (MODE) == DFmode))
+   ? FIRST_FLOAT_REG : 0)
+
+#define HARD_REGNO_MODE_OK(REGNO, MODE) \
+  ((REGNO) < 2 ? 1							\
+   : (REGNO) < 4 ? 1							\
+   : (REGNO) >= 8 ? ((GET_MODE_CLASS (MODE) == MODE_FLOAT		\
+		      || GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT)	\
+		     && TARGET_80387					\
+		     && GET_MODE_UNIT_SIZE (MODE) <= 8)			\
+   : (MODE) != QImode)
+#endif
+
+/* caller has to pop the extra argument passed to functions that return
+   structures. */
+
+#undef RETURN_POPS_ARGS
+#define RETURN_POPS_ARGS(FUNTYPE,SIZE)   \
+  (TREE_CODE (FUNTYPE) == IDENTIFIER_NODE ? 0			\
+   : (TARGET_RTD						\
+      && (TYPE_ARG_TYPES (FUNTYPE) == 0				\
+	  || (TREE_VALUE (tree_last (TYPE_ARG_TYPES (FUNTYPE)))	\
+	      == void_type_node))) ? (SIZE)			\
+   : 0)
+/* On other 386 systems, the last line looks like this:
+   : (aggregate_value_p (FUNTYPE)) ? GET_MODE_SIZE (Pmode) : 0)  */

gnu/gcc/gcc-2.2.2/config/i386sco4.h

@@ -0,0 +1,80 @@
+/* Definitions for Intel 386 running SCO Unix System V 3.2 Version 4.
+   Written by Chip Salzenberg.
+   Copyright (C) 1992 Free Software Foundation, Inc.
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GNU CC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GNU CC; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+
+/* Mostly it's like earlier SCO UNIX.  */
+
+#include "i386sco.h"
+
+/* Use crt1.o as a startup file and crtn.o as a closing file.  */
+
+#undef STARTFILE_SPEC
+#define STARTFILE_SPEC \
+ "%{scoxpg3:%{p:mcrt1X.o%s}%{!p:crt1X.o%s}} \
+  %{!scoxpg3:\
+   %{posix:%{p:mcrt1P.o%s}%{!p:crt1P.o%s}} \
+   %{!posix:\
+    %{ansi:%{p:mcrt1A.o%s}%{!p:crt1A.o%s}} \
+    %{!ansi:%{pg:gcrt1.o%s}%{!pg:%{p:mcrt1.o%s}%{!p:crt1.o%s}}}}} \
+  crtbegin.o%s"
+
+#undef ENDFILE_SPEC
+#define ENDFILE_SPEC \
+ "crtend.o%s \
+  %{scoxpg3:crtnX.o%s} \
+  %{!scoxpg3:\
+   %{posix:crtnP.o%s} \
+   %{!posix:\
+    %{ansi:crtnA.o%s} \
+    %{!ansi:crtn.o%s}}}"
+
+/* Library spec.  */
+
+#undef LIB_SPEC
+#define LIB_SPEC \
+ "%{p:-L/usr/lib/libp}%{pg:-L/usr/lib/libp} \
+ %{scoxpg3:-lcX -lcP -lcA} \
+ %{!scoxpg3:\
+  %{posix:-lcP -lcA} \
+  %{!posix:\
+   %{ansi:-lcA} \
+   %{!ansi:%{scointl:-lintl} -lc}}}"
+
+/* Macros, macros everywhere:
+   Specify predefined symbols in preprocessor.  */
+
+#undef CPP_PREDEFINES
+#define CPP_PREDEFINES ""
+
+#undef CPP_SPEC
+#define CPP_SPEC \
+ "-D__i386 -D_M_I386 -D_M_I86 -D_M_I86SM -D_M_SDATA -D_M_STEXT \
+  -D__unix -D_M_UNIX -D_M_XENIX \
+  -D_M_SYS5 -D_M_SYSV -D_M_SYSV -D_M_SYS3 -D_M_SYSIII \
+  -D_M_COFF -D_M_BITFIELDS -D_M_WORDSWAP \
+  %{scoxpg3:-D_XOPEN_SOURCE -D_STRICT_NAMES} \
+  %{!scoxpg3:%{posix:-D_POSIX_SOURCE -D_STRICT_NAMES}} \
+  %{!scoxpg3:%{!posix:\
+  %{ansi:-D_STRICT_NAMES}%{!ansi:\
+  -Di386 -DM_I386 -DM_I86 -DM_I86SM -DM_SDATA -DM_STEXT \
+  -Dunix -DM_UNIX -DM_XENIX \
+  -DM_SYS5 -DM_SYSV -D_M_SYSV -DM_SYS3 -DM_SYSIII \
+  -DM_COFF -DM_BITFIELDS -DM_WORDSWAP \
+  %{scointl:-D_M_INTERNAT -DM_INTERNAT}}}}"

gnu/gcc/gcc-2.2.2/config/i386sun.h

@@ -0,0 +1,97 @@
+/* Definitions for Intel 386 running SunOS 4.0.
+   Copyright (C) 1988 Free Software Foundation, Inc.
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GNU CC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GNU CC; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+
+#include "i386.h"
+
+/* Use the Sun assembler syntax.  */
+
+#include "sun386.h"
+
+/* By default, target has a 80387.  */
+
+#define TARGET_DEFAULT 1
+
+/* Use crt0.o as a startup file.  */
+
+#define STARTFILE_SPEC  \
+  "%{pg:gcrt0.o%s}%{!pg:%{p:mcrt0.o%s}%{!p:crt0.o%s}}"
+
+#define LIB_SPEC "%{g:-lg} %{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p} \
+%{g:-lg} %{sun386:}"
+/* That last item is just to prevent a spurious error.  */
+
+#undef LINK_SPEC
+#define LINK_SPEC "%{!e*:-e _start} -dc -dp %{static:-Bstatic}"
+
+/* Extra switches to give the assembler.  */
+
+#define ASM_SPEC "-i386"
+
+/* Specify predefined symbols in preprocessor.  */
+
+#define CPP_PREDEFINES "-Dunix -Di386 -Dsun386 -Dsun"
+
+/* Allow #sccs in preprocessor.  */
+
+#define SCCS_DIRECTIVE
+
+/* Output #ident as a .ident.  */
+
+#define ASM_OUTPUT_IDENT(FILE, NAME) fprintf (FILE, "\t.ident \"%s\"\n", NAME);
+
+/* We don't want to output SDB debugging information.  */
+
+#undef SDB_DEBUGGING_INFO
+
+/* We want to output DBX debugging information.  */
+
+#define DBX_DEBUGGING_INFO
+
+/* Implicit library calls should use memcpy, not bcopy, etc.  */
+
+#define TARGET_MEM_FUNCTIONS
+
+/* Force structure alignment to the type used for a bitfield.  */
+
+#define PCC_BITFIELD_TYPE_MATTERS 1
+
+/* Define how to find the value returned by a function.
+   VALTYPE is the data type of the value (as a tree).
+   If the precise function being called is known, FUNC is its FUNCTION_DECL;
+   otherwise, FUNC is 0.  */
+
+#define VALUE_REGNO(MODE) \
+  (((MODE)==SFmode || (MODE)==DFmode) ? FIRST_FLOAT_REG : 0)
+
+/* 1 if N is a possible register number for a function value. */
+
+#define FUNCTION_VALUE_REGNO_P(N) ((N) == 0 || (N)== FIRST_FLOAT_REG)
+
+/* This is partly guess.  */
+
+#undef DBX_REGISTER_NUMBER
+#define DBX_REGISTER_NUMBER(n) \
+  ((n) == 0 ? 11 : (n)  == 1 ? 9 : (n) == 2 ? 10 : (n) == 3 ? 8	\
+   : (n) == 4 ? 5 : (n) == 5 ? 4 : (n) == 6 ? 6 : (n))
+
+/* Every debugger symbol must be in the text section.
+   Otherwise the assembler or the linker screws up.  */
+
+#define DEBUG_SYMS_TEXT

gnu/gcc/gcc-2.2.2/config/i386v.h

@@ -0,0 +1,141 @@
+/* Definitions for Intel 386 running system V.
+   Copyright (C) 1988 Free Software Foundation, Inc.
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GNU CC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GNU CC; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+
+#include "i386.h"
+
+/* Use default settings for system V.3.  */
+
+#include "svr3.h"
+
+/* Use the ATT assembler syntax.
+   This overrides at least one macro (ASM_OUTPUT_LABELREF) from svr3.h.  */
+
+#include "att386.h"
+
+/* By default, target has a 80387.  */
+
+#define TARGET_DEFAULT 1
+
+/* Use crt1.o as a startup file and crtn.o as a closing file.  */
+
+#define STARTFILE_SPEC  \
+  "%{pg:gcrt1.o%s}%{!pg:%{posix:%{p:mcrtp1.o%s}%{!p:crtp1.o%s}}%{!posix:%{p:mcrt1.o%s}%{!p:crt1.o%s}}} crtbegin.o%s\
+   %{p:-L/usr/lib/libp}%{pg:-L/usr/lib/libp}"
+
+/* ??? There is a suggestion that -lg is needed here.
+   Does anyone know whether this is right?  */
+#define LIB_SPEC "%{posix:-lcposix} %{shlib:-lc_s} -lc crtend.o%s crtn.o%s"
+
+/* Specify predefined symbols in preprocessor.  */
+
+#define CPP_PREDEFINES "-Dunix -Di386"
+
+#define CPP_SPEC "%{posix:-D_POSIX_SOURCE}"
+
+/* Writing `int' for a bitfield forces int alignment for the structure.  */
+
+#define PCC_BITFIELD_TYPE_MATTERS 1
+
+/* Don't write a `.optim' pseudo; this assembler doesn't handle them.  */
+
+#undef ASM_FILE_START_1
+#define ASM_FILE_START_1(FILE)
+
+/* Machines that use the AT&T assembler syntax
+   also return floating point values in an FP register.  */
+/* Define how to find the value returned by a function.
+   VALTYPE is the data type of the value (as a tree).
+   If the precise function being called is known, FUNC is its FUNCTION_DECL;
+   otherwise, FUNC is 0.  */
+
+#define VALUE_REGNO(MODE) \
+  (((MODE) == SFmode || (MODE) == DFmode) ? FIRST_FLOAT_REG : 0)
+
+/* 1 if N is a possible register number for a function value. */
+
+#define FUNCTION_VALUE_REGNO_P(N) ((N) == 0 || (N)== FIRST_FLOAT_REG)
+
+#if 0 /* This symbol is expected to exist only on BSD,
+	 and besides, it describes the host rather than the target.
+	 It certainly does not belong here.  */
+#ifndef MAXPATHLEN
+#define MAXPATHLEN 1024
+#endif
+#endif
+
+/* longjmp may fail to restore the registers if called from the same
+   function that called setjmp.  To compensate, the compiler avoids
+   putting variables in registers in functions that use both setjmp
+   and longjmp.  */
+
+#define NON_SAVING_SETJMP \
+  (current_function_calls_setjmp && current_function_calls_longjmp)
+
+/* longjmp may fail to restore the stack pointer if the saved frame
+   pointer is the same as the caller's frame pointer.  Requiring a frame
+   pointer in any function that calls setjmp or longjmp avoids this
+   problem, unless setjmp and longjmp are called from the same function.
+   Since a frame pointer will be required in such a function, it is OK
+   that the stack pointer is not restored.  */
+
+#undef FRAME_POINTER_REQUIRED
+#define FRAME_POINTER_REQUIRED \
+  (current_function_calls_setjmp || current_function_calls_longjmp)
+
+/* Modify ASM_OUTPUT_LOCAL slightly to test -msvr3-shlib.  */
+#undef ASM_OUTPUT_LOCAL
+#define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED)	\
+  do {							\
+    int align = exact_log2 (ROUNDED);			\
+    if (align > 2) align = 2;				\
+    if (TARGET_SVR3_SHLIB)				\
+      data_section ();					\
+    else						\
+      bss_section ();					\
+    ASM_OUTPUT_ALIGN ((FILE), align == -1 ? 2 : align);	\
+    ASM_OUTPUT_LABEL ((FILE), (NAME));			\
+    fprintf ((FILE), "\t.set .,.+%u\n", (ROUNDED));	\
+  } while (0)
+
+/* Define a few machine-specific details of the implementation of
+   constructors.
+
+   The __CTORS_LIST__ goes in the .init section.  Define CTOR_LIST_BEGIN
+   and CTOR_LIST_END to contribute to the .init section an instruction to
+   push a word containing 0 (or some equivalent of that).
+
+   ASM_OUTPUT_CONSTRUCTOR should be defined to push the address of the
+   constructor.  */
+
+#undef INIT_SECTION_ASM_OP
+#define INIT_SECTION_ASM_OP     ".section .init,\"x\""
+
+#define CTOR_LIST_BEGIN				\
+  asm (INIT_SECTION_ASM_OP);			\
+  asm ("pushl $0")
+#define CTOR_LIST_END CTOR_LIST_BEGIN
+
+#define ASM_OUTPUT_CONSTRUCTOR(FILE,NAME)	\
+  do {						\
+    init_section ();				\
+    fprintf (FILE, "\tpushl $");		\
+    assemble_name (FILE, NAME);			\
+    fprintf (FILE, "\n");			\
+  } while (0)

gnu/gcc/gcc-2.2.2/config/i386v4.h

@@ -0,0 +1,284 @@
+/* Target definitions for GNU compiler for Intel 80386 running System V.4
+   Copyright (C) 1991 Free Software Foundation, Inc.
+
+   Written by Ron Guilmette (rfg@ncd.com).
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GNU CC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GNU CC; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+#include "i386.h"	/* Base i386 target machine definitions */
+#include "att386.h"	/* Use the i386 AT&T assembler syntax */
+#include "svr4.h"	/* Definitions common to all SVR4 targets */
+#include "real.h"
+
+#undef TARGET_VERSION
+#define TARGET_VERSION fprintf (stderr, " (i386 System V Release 4)");
+
+/* By default, target has a 80387.  */
+
+#define TARGET_DEFAULT 1
+
+/* Machines that use the AT&T assembler syntax
+   also return floating point values in an FP register.  */
+/* Define how to find the value returned by a function.
+   VALTYPE is the data type of the value (as a tree).
+   If the precise function being called is known, FUNC is its FUNCTION_DECL;
+   otherwise, FUNC is 0.  */
+
+#define VALUE_REGNO(MODE) \
+  (((MODE) == SFmode || (MODE) == DFmode) ? FIRST_FLOAT_REG : 0)
+
+/* 1 if N is a possible register number for a function value. */
+
+#define FUNCTION_VALUE_REGNO_P(N) ((N) == 0 || (N)== FIRST_FLOAT_REG)
+
+/* The svr4 ABI for the i386 says that records and unions are returned
+   in memory.  */
+
+#undef RETURN_IN_MEMORY
+#define RETURN_IN_MEMORY(TYPE) \
+  (TREE_CODE (TYPE) == RECORD_TYPE || TREE_CODE(TYPE) == UNION_TYPE)
+
+/* Define which macros to predefine.  __svr4__ is our extension.  */
+/* This used to define X86, but james@bigtex.cactus.org says that
+   is supposed to be defined optionally by user programs--not by default.  */
+#define CPP_PREDEFINES \
+  "-Di386 -Dunix -D__svr4__ -Asystem(unix) -Acpu(i386) -Amachine(i386)"
+
+/* If the host and target formats match, output the floats as hex.  */
+#if HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
+#if defined (HOST_WORDS_BIG_ENDIAN) == WORDS_BIG_ENDIAN
+/* This is how to output assembly code to define a `float' constant.
+   We always have to use a .long pseudo-op to do this because the native
+   SVR4 ELF assembler is buggy and it generates incorrect values when we
+   try to use the .float pseudo-op instead.  */
+
+#undef ASM_OUTPUT_FLOAT
+#define ASM_OUTPUT_FLOAT(FILE,VALUE)					\
+do { long value;							\
+     REAL_VALUE_TO_TARGET_SINGLE ((VALUE), value);			\
+     fprintf((FILE), "%s\t0x%x\n", ASM_LONG, value);			\
+   } while (0)
+
+/* This is how to output assembly code to define a `double' constant.
+   We always have to use a pair of .long pseudo-ops to do this because
+   the native SVR4 ELF assembler is buggy and it generates incorrect
+   values when we try to use the the .double pseudo-op instead.  */
+
+#undef ASM_OUTPUT_DOUBLE
+#define ASM_OUTPUT_DOUBLE(FILE,VALUE)					\
+do { long value[2];							\
+     REAL_VALUE_TO_TARGET_DOUBLE ((VALUE), value);			\
+     fprintf((FILE), "%s\t0x%x\n", ASM_LONG, value[0]);			\
+     fprintf((FILE), "%s\t0x%x\n", ASM_LONG, value[1]);			\
+   } while (0)
+#endif /* word order matches */
+#endif /* HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT */
+
+/* Output at beginning of assembler file.  */
+/* The .file command should always begin the output.  */
+
+#undef ASM_FILE_START
+#define ASM_FILE_START(FILE)						\
+  do {									\
+	output_file_directive (FILE, main_input_filename);		\
+	fprintf (FILE, "\t.version\t\"01.01\"\n");			\
+  } while (0)
+
+/* Define the register numbers to be used in Dwarf debugging information.
+   The SVR4 reference port C compiler uses the following register numbers
+   in its Dwarf output code:
+
+	0 for %eax (gnu regno = 0)
+	1 for %ecx (gnu regno = 2)
+	2 for %edx (gnu regno = 1)
+	3 for %ebx (gnu regno = 3)
+	4 for %esp (gnu regno = 7)
+	5 for %ebp (gnu regno = 6)
+	6 for %esi (gnu regno = 4)
+	7 for %edi (gnu regno = 5)
+
+   The following three DWARF register numbers are never generated by
+   the SVR4 C compiler or by the GNU compilers, but SDB on x86/svr4
+   believes these numbers have these meanings.
+
+	8  for %eip    (no gnu equivalent)
+	9  for %eflags (no gnu equivalent)
+	10 for %trapno (no gnu equivalent)
+
+   It is not at all clear how we should number the FP stack registers
+   for the x86 architecture.  If the version of SDB on x86/svr4 were
+   a bit less brain dead with respect to floating-point then we would
+   have a precedent to follow with respect to DWARF register numbers
+   for x86 FP registers, but the SDB on x86/svr4 is so completely
+   broken with respect to FP registers that it is hardly worth thinking
+   of it as something to strive for compatability with.
+
+   The verison of x86/svr4 SDB I have at the moment does (partially)
+   seem to believe that DWARF register number 11 is associated with
+   the x86 register %st(0), but that's about all.  Higher DWARF
+   register numbers don't seem to be associated with anything in
+   particular, and even for DWARF regno 11, SDB only seems to under-
+   stand that it should say that a variable lives in %st(0) (when
+   asked via an `=' command) if we said it was in DWARF regno 11,
+   but SDB still prints garbage when asked for the value of the
+   variable in question (via a `/' command).
+
+   (Also note that the labels SDB prints for various FP stack regs
+   when doing an `x' command are all wrong.)
+
+   Note that these problems generally don't affect the native SVR4
+   C compiler because it doesn't allow the use of -O with -g and
+   because when it is *not* optimizing, it allocates a memory
+   location for each floating-point variable, and the memory
+   location is what gets described in the DWARF AT_location
+   attribute for the variable in question.
+
+   Regardless of the severe mental illness of the x86/svr4 SDB, we
+   do something sensible here and we use the following DWARF
+   register numbers.  Note that these are all stack-top-relative
+   numbers.
+
+	11 for %st(0) (gnu regno = 8)
+	12 for %st(1) (gnu regno = 9)
+	13 for %st(2) (gnu regno = 10)
+	14 for %st(3) (gnu regno = 11)
+	15 for %st(4) (gnu regno = 12)
+	16 for %st(5) (gnu regno = 13)
+	17 for %st(6) (gnu regno = 14)
+	18 for %st(7) (gnu regno = 15)
+*/
+
+#undef DBX_REGISTER_NUMBER
+#define DBX_REGISTER_NUMBER(n) \
+((n) == 0 ? 0 \
+ : (n) == 1 ? 2 \
+ : (n) == 2 ? 1 \
+ : (n) == 3 ? 3 \
+ : (n) == 4 ? 6 \
+ : (n) == 5 ? 7 \
+ : (n) == 6 ? 5 \
+ : (n) == 7 ? 4 \
+ : ((n) >= FIRST_STACK_REG && (n) <= LAST_STACK_REG) ? (n)+3 \
+ : (abort (), 0))
+
+/* The routine used to output sequences of byte values.  We use a special
+   version of this for most svr4 targets because doing so makes the
+   generated assembly code more compact (and thus faster to assemble)
+   as well as more readable.  Note that if we find subparts of the
+   character sequence which end with NUL (and which are shorter than
+   STRING_LIMIT) we output those using ASM_OUTPUT_LIMITED_STRING.  */
+
+#undef ASM_OUTPUT_ASCII
+#define ASM_OUTPUT_ASCII(FILE, STR, LENGTH)				\
+  do									\
+    {									\
+      register unsigned char *_ascii_bytes = (unsigned char *) (STR);	\
+      register unsigned char *limit = _ascii_bytes + (LENGTH);		\
+      register unsigned bytes_in_chunk = 0;				\
+      for (; _ascii_bytes < limit; _ascii_bytes++)			\
+        {								\
+	  register unsigned char *p;					\
+	  if (bytes_in_chunk >= 64)					\
+	    {								\
+	      fputc ('\n', (FILE));					\
+	      bytes_in_chunk = 0;					\
+	    }								\
+	  for (p = _ascii_bytes; p < limit && *p != '\0'; p++)		\
+	    continue;							\
+	  if (p < limit && (p - _ascii_bytes) <= STRING_LIMIT)		\
+	    {								\
+	      if (bytes_in_chunk > 0)					\
+		{							\
+		  fputc ('\n', (FILE));					\
+		  bytes_in_chunk = 0;					\
+		}							\
+	      ASM_OUTPUT_LIMITED_STRING ((FILE), _ascii_bytes);		\
+	      _ascii_bytes = p;						\
+	    }								\
+	  else								\
+	    {								\
+	      if (bytes_in_chunk == 0)					\
+		fprintf ((FILE), "\t.byte\t");				\
+	      else							\
+		fputc (',', (FILE));					\
+	      fprintf ((FILE), "0x%02x", *_ascii_bytes);		\
+	      bytes_in_chunk += 5;					\
+	    }								\
+	}								\
+      if (bytes_in_chunk > 0)						\
+        fprintf ((FILE), "\n");						\
+    }									\
+  while (0)
+
+/* This is how to output an element of a case-vector that is relative.
+   This is only used for PIC code.  See comments by the `casesi' insn in
+   i386.md for an explanation of the expression this outputs. */
+
+#undef ASM_OUTPUT_ADDR_DIFF_ELT
+#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
+  fprintf (FILE, "\t.long _GLOBAL_OFFSET_TABLE_+[.-%s%d]\n", LPREFIX, VALUE)
+
+/* Indicate that jump tables go in the text section.  This is
+   necessary when compiling PIC code.  */
+
+#define JUMP_TABLES_IN_TEXT_SECTION
+
+/* Biggest alignment that any structure field can require on this
+   machine, in bits.  If packing is in effect, this can be smaller than
+   normal.  */
+
+#define BIGGEST_FIELD_ALIGNMENT \
+  (maximum_field_alignment ? maximum_field_alignment : 32)
+
+extern int maximum_field_alignment;
+
+/* If bit field type is int, don't let it cross an int,
+   and give entire struct the alignment of an int.  */
+/* Required on the 386 since it doesn't have bitfield insns.  */
+/* If packing is in effect, then the type doesn't matter.  */
+
+#undef PCC_BITFIELD_TYPE_MATTERS
+#define PCC_BITFIELD_TYPE_MATTERS (maximum_field_alignment == 0)
+
+/* Code to handle #pragma directives.  The interface is a bit messy,
+   but there's no simpler way to do this while still using yylex.  */
+#define HANDLE_PRAGMA(FILE)					\
+  do {								\
+    while (c == ' ' || c == '\t')				\
+      c = getc (FILE);						\
+    if (c == '\n' || c == EOF)					\
+      {								\
+	handle_pragma_token (0, 0);				\
+	return c;						\
+      }								\
+    ungetc (c, FILE);						\
+    switch (yylex ())						\
+      {								\
+      case IDENTIFIER:						\
+      case TYPENAME:						\
+      case STRING:						\
+      case CONSTANT:						\
+	handle_pragma_token (token_buffer, yylval.ttype);	\
+	break;							\
+      default:							\
+	handle_pragma_token (token_buffer, 0);			\
+      }								\
+    if (nextchar >= 0)						\
+      c = nextchar, nextchar = -1;				\
+    else							\
+      c = getc (FILE);						\
+  } while (1)

gnu/gcc/gcc-2.2.2/config/i386vgas.h

@@ -0,0 +1,127 @@
+/* Definitions for Intel 386 running system V with gnu tools
+   Except that that really seems to use i386gas.h.  So it's
+   not clear what, if anything, this file is good for.
+   Copyright (C) 1988 Free Software Foundation, Inc.
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GNU CC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GNU CC; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+
+#include "i386.h"
+/* Use the bsd assembler syntax.  */
+/* we need to do this because gas is really a bsd style assembler,
+ * and so doesn't work well this these att-isms:
+ *
+ *  ASM_OUTPUT_SKIP is .set .,.+N, which isn't implemented in gas
+ *  ASM_OUTPUT_LOCAL is done with .set .,.+N, but that can't be
+ *   used to define bss static space
+ *
+ * Next is the question of whether to uses underscores.  RMS didn't
+ * like this idea at first, but since it is now obvious that we
+ * need this separate tm file for use with gas, at least to get
+ * dbx debugging info.  */
+
+#include "bsd386.h"
+
+/* these come from bsd386.h, but are specific to sequent */
+#undef DBX_NO_XREFS
+#undef DBX_CONTIN_LENGTH
+
+/* By default, target has a 80387.  */
+
+#define TARGET_DEFAULT 1
+
+#if 0 /* These aren't right for GNU ld.  */
+/* Use crt1.o as a startup file and crtn.o as a closing file.  */
+
+#define STARTFILE_SPEC  \
+  "%{pg:gcrt1.o%s}%{!pg:%{p:mcrt1.o%s}%{!p:crt1.o%s}}"
+
+#define LIB_SPEC "%{p:-L/usr/lib/libp}%{pg:-L/usr/lib/libp} -lc crtn.o%s"
+#endif
+
+/* Specify predefined symbols in preprocessor.  */
+
+#define CPP_PREDEFINES "-Dunix -Di386"
+
+/* Allow #sccs in preprocessor.  */
+
+#define SCCS_DIRECTIVE
+
+/* Output #ident as a .ident.  */
+
+#define ASM_OUTPUT_IDENT(FILE, NAME) fprintf (FILE, "\t.ident \"%s\"\n", NAME);
+
+/* We do not want to output SDB debugging information.  */
+
+#undef SDB_DEBUGGING_INFO
+
+/* We want to output DBX debugging information.  */
+
+#define DBX_DEBUGGING_INFO
+
+/* Implicit library calls should use memcpy, not bcopy, etc.  */
+
+#define TARGET_MEM_FUNCTIONS
+
+/* Writing `int' for a bitfield forces int alignment for the structure.  */
+
+#define PCC_BITFIELD_TYPE_MATTERS 1
+
+#undef ASM_FILE_START
+#define ASM_FILE_START(FILE) \
+  fprintf (FILE, "\t.file\t\"%s\"\n", dump_base_name);
+
+/* This is how to output a reference to a user-level label named NAME.  */
+#undef ASM_OUTPUT_LABELREF
+#define ASM_OUTPUT_LABELREF(FILE,NAME)	\
+  fprintf (FILE, "_%s", NAME)
+
+#if 0  /* People say gas uses the log as the arg to .align.  */
+/* When using gas, .align N aligns to an N-byte boundary.  */
+
+#undef ASM_OUTPUT_ALIGN
+#define ASM_OUTPUT_ALIGN(FILE,LOG)	\
+     if ((LOG)!=0) fprintf ((FILE), "\t.align %d\n", 1<<(LOG))
+#endif
+
+/* Align labels, etc. at 4-byte boundaries.  */
+
+#undef ASM_OUTPUT_ALIGN_CODE
+#define ASM_OUTPUT_ALIGN_CODE(FILE) \
+     fprintf ((FILE), "\t.align 2,0x90\n");  /* Use log of 4 as arg.  */
+
+/* Machines that use the AT&T assembler syntax
+   also return floating point values in an FP register.  */
+/* Define how to find the value returned by a function.
+   VALTYPE is the data type of the value (as a tree).
+   If the precise function being called is known, FUNC is its FUNCTION_DECL;
+   otherwise, FUNC is 0.  */
+
+#define VALUE_REGNO(MODE) \
+  (((MODE)==SFmode || (MODE)==DFmode) ? FIRST_FLOAT_REG : 0)
+
+/* 1 if N is a possible register number for a function value. */
+
+#define FUNCTION_VALUE_REGNO_P(N) ((N) == 0 || (N)== FIRST_FLOAT_REG)
+
+#if 0 /* This symbol is expected to exist only on BSD,
+	 and besides, it describes the host rather than the target.
+	 It certainly does not belong here.  */
+#ifndef MAXPATHLEN
+#define MAXPATHLEN 1024
+#endif
+#endif

gnu/gcc/gcc-2.2.2/config/i486v4.h

@@ -0,0 +1,7 @@
+/* tm.h for 486 running system V.4.  */
+
+#include "i386v4.h"
+
+/* By default, optimize code for the 486.  */
+#undef TARGET_DEFAULT
+#define TARGET_DEFAULT	(1|2)

gnu/gcc/gcc-2.2.2/config/i860b.h

@@ -0,0 +1,43 @@
+#include "i860.h"
+
+/* BSD UN*X systems use BSD STABS debugging info.  */
+
+#define DBX_DEBUGGING_INFO
+
+#define ASCII_DATA_ASM_OP ".byte"
+#define	ASM_OUTPUT_ASCII(f, p, size)	\
+{ register unsigned i;			\
+  int inside;				\
+  inside = FALSE;			\
+  for (i = 0; i < (size); i++) {	\
+    if (i % 64 == 0) {			\
+      if (i != 0) {			\
+	if (inside)			\
+	  putc('"', (f));		\
+	putc('\n', (f));		\
+	inside = FALSE;			\
+      }					\
+      fprintf((f), "\t%s ", ASCII_DATA_ASM_OP);	\
+    }					\
+    if ((p)[i] < 32 || (p)[i] == '\\' || (p)[i] == '"' || (p)[i] >= 127) {	\
+      if (inside) {			\
+	putc('"', (f));			\
+	inside = FALSE;			\
+      }					\
+      if (i % 64 != 0)			\
+	putc(',', (f));			\
+      fprintf((f), "%d", (p)[i]);	\
+    } else {				\
+      if (!inside) {			\
+	if (i % 64 != 0)		\
+	  putc(',', (f));		\
+	putc('"', (f));			\
+	inside = TRUE;			\
+      }					\
+      putc((p)[i], (f));		\
+    }					\
+  }					\
+  if (inside)				\
+    putc('"', (f));			\
+  putc('\n', (f));			\
+}

gnu/gcc/gcc-2.2.2/config/i860bg.h

@@ -0,0 +1,4 @@
+#include "i860b.h"
+
+#undef ASCII_DATA_ASM_OP
+#define ASCII_DATA_ASM_OP ".ascii"

gnu/gcc/gcc-2.2.2/config/i860g3.h

@@ -0,0 +1,4 @@
+#include "i860v3.h"
+
+#undef ASCII_DATA_ASM_OP
+#define ASCII_DATA_ASM_OP ".ascii"

gnu/gcc/gcc-2.2.2/config/i860v3.h

@@ -0,0 +1,159 @@
+/* Target definitions for GNU compiler for Intel 80860 running System V.3
+   Copyright (C) 1991 Free Software Foundation, Inc.
+
+   Written by Ron Guilmette (rfg@ncd.com).
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GNU CC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GNU CC; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+#include "i860.h"
+#include "svr3.h"
+
+/* Provide a set of pre-definitions and pre-assertions appropriate for
+   the i860 running svr3.  */
+#define CPP_PREDEFINES "-Di860 -Dunix -DSVR3"
+
+/* Use crt1.o as a startup file and crtn.o as a closing file.  */
+
+#define STARTFILE_SPEC  \
+  "%{pg:gcrt1.o%s}%{!pg:%{p:mcrt1.o%s}%{!p:crt1.o%s}}"
+
+#define LIB_SPEC "%{p:-L/usr/lib/libp}%{pg:-L/usr/lib/libp} -lc crtn.o%s"
+
+/* Special flags for the linker.  I don't know what they do.  */
+
+#define LINK_SPEC "%{T*} %{z:-lm}"
+
+/* The prefix to be used in assembler output for all names of registers.
+   None is needed in V.3.  */
+
+#define I860_REG_PREFIX	""
+
+/* Delimiter that starts comments in the assembler code.  */
+
+#define ASM_COMMENT_START "//"
+
+/* Don't renumber the regusters for debugger output.  */
+
+#define DBX_REGISTER_NUMBER(REGNO) (REGNO)
+
+/* Output the special word the System V SDB wants to see just before
+   the first word of each function's prologue code.  */
+
+extern char *current_function_original_name;
+
+/* This special macro is used to output a magic word just before the
+   first word of each function.  On some versions of UNIX running on
+   the i860, this word can be any word that looks like a NOP, however
+   under svr4, this neds to be an `shr r0,r0,r0' instruction in which
+   the normally unused low-order bits contain the length of the function
+   prologue code (in bytes).  This is needed to make the System V SDB
+   debugger happy.  */
+
+#undef ASM_OUTPUT_FUNCTION_PREFIX
+#define ASM_OUTPUT_FUNCTION_PREFIX(FILE, FNNAME)			\
+  do {	ASM_OUTPUT_ALIGN (FILE, 2);					\
+  	fprintf ((FILE), "\t.long\t.ep.");				\
+	assemble_name (FILE, FNNAME);					\
+	fprintf (FILE, "-");						\
+	assemble_name (FILE, FNNAME);					\
+	fprintf (FILE, "+0xc8000000\n");				\
+	current_function_original_name = (FNNAME);			\
+  } while (0)
+
+/* Output the special label that must go just after each function's
+   prologue code to support svr4 SDB.  */
+
+#define ASM_OUTPUT_PROLOGUE_SUFFIX(FILE)				\
+  do {	fprintf (FILE, ".ep.");						\
+	assemble_name (FILE, current_function_original_name);		\
+	fprintf (FILE, ":\n");						\
+  } while (0)
+
+/* The routine used to output string literals.
+
+#define ASCII_DATA_ASM_OP	".byte"
+
+#define ASM_OUTPUT_ASCII(FILE, STR, LENGTH)				\
+  do									\
+    {									\
+      register unsigned char *str = (unsigned char *) (STR);		\
+      register unsigned char *limit = str + (LENGTH);			\
+      register unsigned bytes_in_chunk = 0;				\
+      for (; str < limit; str++)					\
+        {								\
+          register unsigned ch = *str;					\
+          if (ch < 32 || ch == '\\' || ch == '"' || ch >= 127)		\
+	    {								\
+	      if (bytes_in_chunk > 0)					\
+	        {							\
+	          fprintf ((FILE), "\"\n");				\
+	          bytes_in_chunk = 0;					\
+	        }							\
+	      fprintf ((FILE), "\t%s\t%d\n", ASM_BYTE_OP, ch);		\
+	    }								\
+          else								\
+	    {								\
+	      if (bytes_in_chunk >= 60)					\
+	        {							\
+	          fprintf ((FILE), "\"\n");				\
+	          bytes_in_chunk = 0;					\
+	        }							\
+	      if (bytes_in_chunk == 0)					\
+	        fprintf ((FILE), "\t%s\t\"", ASCII_DATA_ASM_OP);	\
+	      putc (ch, (FILE));					\
+	      bytes_in_chunk++;						\
+	    }								\
+        }								\
+      if (bytes_in_chunk > 0)						\
+        fprintf ((FILE), "\"\n");					\
+    }									\
+  while (0)
+
+
+#undef CTORS_SECTION_ASM_OP
+#define CTORS_SECTION_ASM_OP	".section\t.ctors,\"x\""
+#undef DTORS_SECTION_ASM_OP
+#define DTORS_SECTION_ASM_OP	".section\t.dtors,\"x\""
+
+/* Add definitions to support the .tdesc section as specified in the svr4
+   ABI for the i860.  */
+
+#define TDESC_SECTION_ASM_OP    ".section\t.tdesc"
+
+#undef EXTRA_SECTIONS
+#define EXTRA_SECTIONS in_const, in_ctors, in_dtors, in_tdesc
+
+#undef EXTRA_SECTION_FUNCTIONS
+#define EXTRA_SECTION_FUNCTIONS						\
+  CONST_SECTION_FUNCTION						\
+  CTORS_SECTION_FUNCTION						\
+  DTORS_SECTION_FUNCTION						\
+  TDESC_SECTION_FUNCTION
+
+#define TDESC_SECTION_FUNCTION						\
+void									\
+tdesc_section ()							\
+{									\
+  if (in_section != in_tdesc)						\
+    {									\
+      fprintf (asm_out_file, "%s\n", TDESC_SECTION_ASM_OP);		\
+      in_section = in_tdesc;						\
+    }									\
+}
+
+/* Enable the `const' section that svr3.h defines how to use.  */
+#define USE_CONST_SECTION	1

gnu/gcc/gcc-2.2.2/config/i860v4.h

@@ -0,0 +1,196 @@
+/* Target definitions for GNU compiler for Intel 80860 running System V.4
+   Copyright (C) 1991 Free Software Foundation, Inc.
+
+   Written by Ron Guilmette (rfg@ncd.com).
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GNU CC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GNU CC; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+#include "i860.h"
+#include "svr4.h"
+
+#undef TARGET_VERSION
+#define TARGET_VERSION fprintf (stderr, " (i860 System V Release 4)");
+
+/* Provide a set of pre-definitions and pre-assertions appropriate for
+   the i860 running svr4.  Note that the symbol `__SVR4__' MUST BE
+   DEFINED!  It is needed so that the va_list struct in va-i860.h
+   will get correctly defined for the svr4 (ABI compliant) case rather
+   than for the previous (svr3, svr2, ...) case.  It also needs to be
+   defined so that the correct (svr4) version of __builtin_saveregs
+   will be selected when we are building gnulib2.c.
+   __svr4__ is our extension.  */
+
+#define CPP_PREDEFINES \
+  "-Di860 -Dunix -DSVR4 -D__svr4__ -Asystem(unix) -Acpu(i860) -Amachine(i860)"
+
+/* The prefix to be used in assembler output for all names of registers.
+   This string gets prepended to all i860 register names (svr4 only).  */
+
+#define I860_REG_PREFIX	"%"
+
+#define ASM_COMMENT_START "#"
+
+#undef TYPE_OPERAND_FMT
+#define TYPE_OPERAND_FMT      "\"%s\""
+
+#define DBX_REGISTER_NUMBER(REGNO) (REGNO)
+
+/* The following macro definition overrides the one in i860.h
+   because the svr4 i860 assembler requires a different syntax
+   for getting parts of constant/relocatable values.  */
+
+#undef PRINT_OPERAND_PART
+#define PRINT_OPERAND_PART(FILE, X, PART_CODE)				\
+  do { fprintf (FILE, "[");						\
+	output_address (X);						\
+	fprintf (FILE, "]@%s", PART_CODE);				\
+  } while (0)
+
+/* If the host and target formats match, output the floats as hex.  */
+#if HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
+#if defined (HOST_WORDS_BIG_ENDIAN) == WORDS_BIG_ENDIAN
+
+/* This is how to output an assembler line defining a `double' constant.
+   Note that the native i860/svr4 ELF assembler can't properly handle
+   infinity.  It generates an incorrect (non-infinity) value when given
+   `.double 99e9999' and it doesn't grok `inf' at all.  It also mishandles
+   NaNs and -0.0.  */
+
+#undef ASM_OUTPUT_DOUBLE
+#define ASM_OUTPUT_DOUBLE(FILE,VALUE)					\
+  {									\
+    if (REAL_VALUE_ISINF (VALUE)					\
+        || REAL_VALUE_ISNAN (VALUE)					\
+	|| REAL_VALUE_MINUS_ZERO (VALUE))				\
+      {									\
+	long t[2];							\
+	REAL_VALUE_TO_TARGET_DOUBLE ((VALUE), t);			\
+	fprintf (FILE, "\t.word 0x%lx\n\t.word 0x%lx\n", t[0], t[1]);	\
+      }									\
+    else								\
+      fprintf (FILE, "\t.double %.20e\n", VALUE);			\
+  }
+
+/* This is how to output an assembler line defining a `float' constant.
+   Note that the native i860/svr4 ELF assembler can't properly handle
+   infinity.  It actually generates an assembly time error when given
+   `.float 99e9999' and it doesn't grok `inf' at all.  It also mishandles
+   NaNs and -0.0.  */
+
+#undef ASM_OUTPUT_FLOAT
+#define ASM_OUTPUT_FLOAT(FILE,VALUE)					\
+  {									\
+    if (REAL_VALUE_ISINF (VALUE)					\
+        || REAL_VALUE_ISNAN (VALUE)					\
+	|| REAL_VALUE_MINUS_ZERO (VALUE))				\
+      {									\
+	long t;								\
+	REAL_VALUE_TO_TARGET_SINGLE ((VALUE), t);			\
+	fprintf (FILE, "\t.word 0x%lx\n", t);				\
+      }									\
+    else								\
+      fprintf (FILE, "\t.float %.12e\n", VALUE);			\
+  }
+
+#endif /* word order matches */
+#endif /* HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT */
+
+#undef ASM_FILE_START
+#define ASM_FILE_START(FILE)						\
+  do {	output_file_directive (FILE, main_input_filename);		\
+	fprintf (FILE, "\t.version\t\"01.01\"\n");			\
+  } while (0)
+
+/* Output the special word the svr4 SDB wants to see just before
+   the first word of each function's prologue code.  */
+
+extern char *current_function_original_name;
+
+/* This special macro is used to output a magic word just before the
+   first word of each function.  On some versions of UNIX running on
+   the i860, this word can be any word that looks like a NOP, however
+   under svr4, this neds to be an `shr r0,r0,r0' instruction in which
+   the normally unused low-order bits contain the length of the function
+   prologue code (in bytes).  This is needed to make the svr4 SDB debugger
+   happy.  */
+
+#undef ASM_OUTPUT_FUNCTION_PREFIX
+#define ASM_OUTPUT_FUNCTION_PREFIX(FILE, FNNAME)			\
+  do {	ASM_OUTPUT_ALIGN (FILE, 2);					\
+  	fprintf ((FILE), "\t.long\t.ep.");				\
+	assemble_name (FILE, FNNAME);					\
+	fprintf (FILE, "-");						\
+	assemble_name (FILE, FNNAME);					\
+	fprintf (FILE, "+0xc8000000\n");				\
+	current_function_original_name = (FNNAME);			\
+  } while (0)
+
+/* Output the special label that must go just after each function's
+   prologue code to support svr4 SDB.  */
+
+#define ASM_OUTPUT_PROLOGUE_SUFFIX(FILE)				\
+  do {	fprintf (FILE, ".ep.");						\
+	assemble_name (FILE, current_function_original_name);		\
+	fprintf (FILE, ":\n");						\
+  } while (0)
+
+#undef CTORS_SECTION_ASM_OP
+#define CTORS_SECTION_ASM_OP	".section\t.ctors,\"a\",\"progbits\""
+#undef DTORS_SECTION_ASM_OP
+#define DTORS_SECTION_ASM_OP	".section\t.dtors,\"a\",\"progbits\""
+
+/* Add definitions to support the .tdesc section as specified in the svr4
+   ABI for the i860.  */
+
+#define TDESC_SECTION_ASM_OP    ".section\t.tdesc"
+
+#undef EXTRA_SECTIONS
+#define EXTRA_SECTIONS in_const, in_ctors, in_dtors, in_tdesc
+
+#undef EXTRA_SECTION_FUNCTIONS
+#define EXTRA_SECTION_FUNCTIONS						\
+  CONST_SECTION_FUNCTION						\
+  CTORS_SECTION_FUNCTION						\
+  DTORS_SECTION_FUNCTION						\
+  TDESC_SECTION_FUNCTION
+
+#define TDESC_SECTION_FUNCTION						\
+void									\
+tdesc_section ()							\
+{									\
+  if (in_section != in_tdesc)						\
+    {									\
+      fprintf (asm_out_file, "%s\n", TDESC_SECTION_ASM_OP);		\
+      in_section = in_tdesc;						\
+    }									\
+}
+
+#ifdef OUTPUT_TDESC
+#undef ASM_FILE_END
+#define ASM_FILE_END(FILE)					\
+do {				 				\
+     if (current_function_original_name != NULL) {		\
+       tdesc_section();						\
+       fprintf ((FILE), "%s __ETEXT\n", ASM_LONG);		\
+       fprintf ((FILE), "%s 0\n", ASM_LONG);			\
+       text_section();						\
+       fputs("__ETEXT:\n", (FILE));				\
+     }								\
+     fprintf ((FILE), "\t.ident\t\"GCC: (GNU) %s\"\n",		\
+	      version_string);					\
+   } while (0)
+#endif

gnu/gcc/gcc-2.2.2/config/iris.h

@@ -0,0 +1,99 @@
+/* Definitions of target machine for GNU compiler.  Iris version.
+   Copyright (C) 1991 Free Software Foundation, Inc.
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GNU CC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GNU CC; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+#define SGI_TARGET 1		/* inform other mips files this is SGI */
+
+/* Names to predefine in the preprocessor for this target machine.  */
+
+#define CPP_PREDEFINES	"-Dunix -Dmips -Dsgi -DSVR3 -Dhost_mips -DMIPSEB -DSYSTYPE_SYSV"
+
+#define STARTFILE_SPEC	"%{pg:gcrt1.o%s}%{!pg:%{p:mcrt1.o%s}%{!p:crt1.o%s}}"
+
+#define CPP_SPEC "\
+%{!ansi:-D__EXTENSIONS__} -D_MIPSEB -D_SYSTYPE_SYSV \
+%{.S:	-D_LANGUAGE_ASSEMBLY %{!ansi:-DLANGUAGE_ASSEMBLY}} \
+%{.cc:	-D_LANGUAGE_C_PLUS_PLUS} \
+%{.cxx:	-D_LANGUAGE_C_PLUS_PLUS} \
+%{.C:	-D_LANGUAGE_C_PLUS_PLUS} \
+%{.m:	-D_LANGUAGE_OBJECTIVE_C} \
+%{!.S: %{!.cc: %{!.cxx: %{!.C: %{!.m: -D_LANGUAGE_C %{!ansi:-DLANGUAGE_C}}}}}}"
+
+#define LIB_SPEC	"%{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p} crtn.o%s"
+
+#define MACHINE_TYPE	"Silicon Graphics Mips"
+
+/* SGI Iris doesn't support -EB/-EL like other MIPS processors.  */
+
+#define ASM_SPEC "\
+%{!mgas: \
+	%{!mrnames: %{!.s:-nocpp} %{.s: %{cpp} %{nocpp}}} \
+	%{pipe: %e-pipe is not supported.} \
+	%{mips1} %{mips2} %{mips3} \
+	%{O:-O2} %{O1:-O2} %{O2:-O2} %{O3:-O3} \
+	%{g} %{g0} %{g1} %{g2} %{g3} %{v} %{K}} \
+%{G*}"
+
+#define LINK_SPEC "\
+%{G*} \
+%{!mgas: %{mips1} %{mips2} %{mips3} \
+	 %{bestGnum}}"
+
+/* Always use 1 for .file number.  I [meissner@osf.org] wonder why
+   IRIS needs this.  */
+
+#define SET_FILE_NUMBER() num_source_filenames = 1
+
+/* Put out a label after a .loc.  I [meissner@osf.org] wonder why
+   IRIS needs this.  */
+
+#define LABEL_AFTER_LOC(STREAM) fprintf (STREAM, "LM%d:\n", ++sym_lineno)
+
+#define STACK_ARGS_ADJUST(SIZE)                                         \
+{                                                                       \
+  SIZE.constant += 4;                                                   \
+  if (SIZE.constant < 32)						\
+    SIZE.constant = 32;                                                 \
+}
+
+/* Define this macro to control use of the character `$' in
+   identifier names.  The value should be 0, 1, or 2.  0 means `$'
+   is not allowed by default; 1 means it is allowed by default if
+   `-traditional' is used; 2 means it is allowed by default provided
+   `-ansi' is not used.  1 is the default; there is no need to
+   define this macro in that case. */
+
+#define DOLLARS_IN_IDENTIFIERS 0
+
+/* Tell G++ not to create constructors or destructors with $'s in them.  */
+
+#define NO_DOLLAR_IN_LABEL 1
+
+/* Specify size_t, ptrdiff_t, and wchar_t types.  */
+#define SIZE_TYPE	"unsigned int"
+#define PTRDIFF_TYPE	"int"
+#define WCHAR_TYPE	"unsigned char"
+#define WCHAR_TYPE_SIZE BITS_PER_UNIT
+
+/* Generate calls to memcpy, etc., not bcopy, etc.  */
+#define TARGET_MEM_FUNCTIONS
+
+/* Plain char is unsigned in the SGI compiler.  */
+#define DEFAULT_SIGNED_CHAR 0
+
+#include "mips.h"

gnu/gcc/gcc-2.2.2/config/iris4.h

@@ -0,0 +1,24 @@
+/* Definitions of target machine for GNU compiler.  Iris version 4.
+   Copyright (C) 1991 Free Software Foundation, Inc.
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GNU CC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GNU CC; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+/* Use atexit for static constructors/destructors, instead of defining
+   our own exit function.  */
+#define HAVE_ATEXIT
+
+#include "iris.h"

gnu/gcc/gcc-2.2.2/config/irisgdb.h

@@ -0,0 +1,22 @@
+/* Definitions of target machine for GNU compiler.  Iris version
+   using encapsulated stabs.
+   Copyright (C) 1992 Free Software Foundation, Inc.
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GNU CC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GNU CC; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+#define PREFERRED_DEBUGGING_TYPE DBX_DEBUG
+#include "iris.h"

gnu/gcc/gcc-2.2.2/config/isi-nfp.h

@@ -0,0 +1,5 @@
+/* Define target machine as an ISI 68000/68020 with no 68881.  */
+
+#define TARGET_DEFAULT 5
+
+#include "isi.h"

gnu/gcc/gcc-2.2.2/config/isi.h

@@ -0,0 +1,88 @@
+/* Definitions of target machine for GNU compiler.  ISI 68000/68020 version.
+   Intended only for use with GAS, and not ISI's assembler, which is buggy
+   Copyright (C) 1988 Free Software Foundation, Inc.
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GNU CC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GNU CC; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+#include "m68k.h"
+
+/* Without STRUCTURE_SIZE_BOUNDARY, we can't ensure that structures are
+   aligned such that we can correctly extract bitfields from them.
+   Someone should check whether the usual compiler on this machine
+   provides the equivalent behavior of STRUCTURE_SIZE_BOUNDARY.  */
+/* Alternative solutions are (1) define PCC_BITFIELD_TYPE_MATTERS,
+   if that fits what the usual compiler does,
+   or disable the -m68000 and -mnobitfield options.  */
+#error This doesn't define STRUCTURE_SIZE_BOUNDARY
+
+/* See m68k.h.  7 means 68020 with 68881. */
+
+#ifndef TARGET_DEFAULT
+#define TARGET_DEFAULT 7
+#endif
+
+#if TARGET_DEFAULT & 2
+/* Define __HAVE_68881__ in preprocessor, unless -msoft-float is specified.
+   This will control the use of inline 68881 insns in certain macros.  */
+
+#define CPP_SPEC "%{!msoft-float:-D__HAVE_68881__}"
+
+/* If the 68881 is used, link must load libmc.a instead of libc.a */
+
+#define LIB_SPEC "%{g:-lg} %{msoft-float:%{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p}}%{!msoft-float:%{!p:%{!pg:-lmc}}%{p:-lmc_p}%{pg:-lmc_p}} %{g:-lg}"
+
+#else
+/* Define __HAVE_68881__ in preprocessor if -m68881 is specified.
+   This will control the use of inline 68881 insns in certain macros.  */
+
+#define CPP_SPEC "%{m68881:-D__HAVE_68881__}"
+
+/* If the 68881 is used, link must load libmc.a instead of libc.a */
+
+#define LIB_SPEC "%{g:-lg} %{!m68881:%{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p}}%{m68881:%{!p:%{!pg:-lmc}}%{p:-lmc_p}%{pg:-lmc_p}}"
+#endif
+
+/* Names to predefine in the preprocessor for this target machine.  */
+
+#define CPP_PREDEFINES "-Dunix -Dmc68000 -Dis68k"
+
+/* This is BSD, so it wants DBX format.  */
+
+#define DBX_DEBUGGING_INFO
+
+/* Override parts of m68k.h to fit the ISI 68k machine.  */
+
+#undef FUNCTION_VALUE
+#undef LIBCALL_VALUE
+#undef FUNCTION_VALUE_REGNO_P
+#undef ASM_FILE_START
+
+/* If TARGET_68881, return SF and DF values in f0 instead of d0.  */
+
+#define FUNCTION_VALUE(VALTYPE,FUNC) LIBCALL_VALUE (TYPE_MODE (VALTYPE))
+
+#define LIBCALL_VALUE(MODE) \
+ gen_rtx (REG, (MODE), ((TARGET_68881 && ((MODE) == SFmode || (MODE) == DFmode)) ? 16 : 0))
+
+/* 1 if N is a possible register number for a function value.
+   D0 may be used, and F0 as well if -m68881 is specified.  */
+
+#define FUNCTION_VALUE_REGNO_P(N) \
+ ((N) == 0 || (TARGET_68881 && (N) == 16))
+
+/* Also output something to cause the correct _doprnt to be loaded.  */
+#define ASM_FILE_START(FILE) fprintf (FILE, "#NO_APP\n%s\n", TARGET_68881 ? ".globl fltused" : "")

gnu/gcc/gcc-2.2.2/config/m68ksgs.h

@@ -0,0 +1,419 @@
+/* Definitions of target machine for GNU compiler for m68k targets using
+   assemblers derived from AT&T "SGS" releases.
+
+   Copyright (C) 1991 Free Software Foundation, Inc.
+
+   Written by Fred Fish (fnf@cygnus.com)
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 1, or (at your option)
+any later version.
+
+GNU CC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GNU CC; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+/* Control assembler-syntax conditionals in m68k.md and conditionals in
+   m68k.h.  Note that some systems may also require SGS_SWAP_W and/or
+   SGS_SWITCH_TABLES to be defined as well.  */
+
+#define MOTOROLA		/* Use Motorola syntax rather than "MIT" */
+#define SGS			/* Uses SGS assembler */
+#define SGS_CMP_ORDER		/* Takes cmp operands in reverse order */
+
+#include "m68k.h"
+
+/* SGS specific assembler pseudo ops. */
+
+#define	BYTE_ASM_OP		".byte"
+#define WORD_ASM_OP		".short"
+#define LONG_ASM_OP		".long"
+#define SPACE_ASM_OP		".space"
+#define ALIGN_ASM_OP		".align"
+#undef GLOBAL_ASM_OP
+#define GLOBAL_ASM_OP		".global"
+#define SWBEG_ASM_OP		".swbeg"
+#define SET_ASM_OP		".set"
+
+#define UNALIGNED_SHORT_ASM_OP	".short"	/* Used in dwarfout.c */
+#define UNALIGNED_INT_ASM_OP	".long"		/* Used in dwarfout.c */
+
+#define ASM_PN_FORMAT		"%s_%d"		/* Format for private names */
+
+/* Here are four prefixes that are used by asm_fprintf to
+   facilitate customization for alternate assembler syntaxes.
+   Machines with no likelihood of an alternate syntax need not
+   define these and need not use asm_fprintf.  */
+
+/* The prefix for register names.  Note that REGISTER_NAMES
+   is supposed to include this prefix. Also note that this is NOT an
+   fprintf format string, it is a literal string */
+
+#undef REGISTER_PREFIX
+#define REGISTER_PREFIX "%"
+
+/* The prefix for local (compiler generated) labels.
+   These labels will not appear in the symbol table. */
+
+#undef LOCAL_LABEL_PREFIX
+#define LOCAL_LABEL_PREFIX "."
+
+/* The prefix to add to user-visible assembler symbols. */
+
+#undef USER_LABEL_PREFIX
+#define USER_LABEL_PREFIX ""
+
+/* The prefix for immediate operands.  */
+
+#undef IMMEDIATE_PREFIX
+#define IMMEDIATE_PREFIX "&"
+
+/* How to refer to registers in assembler output.
+   This sequence is indexed by compiler's hard-register-number.
+   Motorola format uses different register names than defined in m68k.h.
+   We also take this chance to convert 'a6' to 'fp' */
+
+#undef REGISTER_NAMES
+
+#ifndef SUPPORT_SUN_FPA
+
+#define REGISTER_NAMES \
+{"%d0",   "%d1",   "%d2",   "%d3",   "%d4",   "%d5",   "%d6",   "%d7",	     \
+ "%a0",   "%a1",   "%a2",   "%a3",   "%a4",   "%a5",   "%fp",   "%sp",	     \
+ "%fp0",  "%fp1",  "%fp2",  "%fp3",  "%fp4",  "%fp5",  "%fp6",  "%fp7" }
+
+#else /* SUPPORTED_SUN_FPA */
+
+#define REGISTER_NAMES \
+{"%d0",   "%d1",   "%d2",   "%d3",   "%d4",   "%d5",   "%d6",   "%d7",	     \
+ "%a0",   "%a1",   "%a2",   "%a3",   "%a4",   "%a5",   "%fp",   "%sp",	     \
+ "%fp0",  "%fp1",  "%fp2",  "%fp3",  "%fp4",  "%fp5",  "%fp6",  "%fp7",	     \
+ "%fpa0", "%fpa1", "%fpa2", "%fpa3", "%fpa4", "%fpa5", "%fpa6","%fpa7",	     \
+ "%fpa8", "%fpa9", "%fpa10","%fpa11","%fpa12","%fpa13","%fpa14","%fpa15",    \
+ "%fpa16","%fpa17","%fpa18","%fpa19","%fpa20","%fpa21","%fpa22","%fpa23",    \
+ "%fpa24","%fpa25","%fpa26","%fpa27","%fpa28","%fpa29","%fpa30","%fpa31" }
+
+#endif /* defined SUPPORT_SUN_FPA */
+
+/* When using an SGS assembler, modify the name of the artificial label which
+   identifies this file as having been compiled with gcc, and the macro that
+   emits such a label in the assembly output, to use '%' rather than '.' */
+
+#define ASM_IDENTIFY_GCC(FILE)				\
+ { fprintf ((FILE), "%s:\n", "gcc2_compiled%"); }
+
+/* This is how to output an assembler line defining an `int' constant.  */
+/* The SGS assembler doesn't understand ".word". */
+
+#undef ASM_OUTPUT_SHORT
+#define ASM_OUTPUT_SHORT(FILE,VALUE)			\
+( fprintf ((FILE), "\t%s ", WORD_ASM_OP),		\
+  output_addr_const ((FILE), (VALUE)),			\
+  fprintf ((FILE), "\n"))
+
+/* This is how to output an assembler line defining a `double' constant.  */
+
+#undef ASM_OUTPUT_DOUBLE
+#define ASM_OUTPUT_DOUBLE(FILE,VALUE)			\
+do { union { double d; long l[2]; } tem;		\
+     tem.d = (VALUE);					\
+     fprintf((FILE), "\t%s 0x%x,0x%x\n", LONG_ASM_OP,	\
+	     tem.l[0], tem.l[1]);			\
+   } while (0)
+
+/* This is how to output an assembler line defining a `float' constant.  */
+
+#undef ASM_OUTPUT_FLOAT
+#define ASM_OUTPUT_FLOAT(FILE,VALUE)			\
+do { union { float f; long l;} tem;			\
+     tem.f = (VALUE);					\
+     fprintf ((FILE), "\t%s 0x%x\n", LONG_ASM_OP, tem.l); \
+   } while (0)
+
+/* This is how to output an assembler line that says to advance the
+   location counter to a multiple of 2**LOG bytes.  */
+
+#undef ASM_OUTPUT_ALIGN
+#define ASM_OUTPUT_ALIGN(FILE,LOG)				\
+  if ((LOG) > 0)						\
+    fprintf ((FILE), "\t%s \t%u\n", ALIGN_ASM_OP, 1 << (LOG));	\
+  else if ((LOG) > 31)						\
+    abort ();
+
+/* The routine used to output null terminated string literals.  We cannot
+   use the ".string" pseudo op, because it silently truncates strings to
+   1023 bytes.  There is no "partial string op" which works like ".string"
+   but doesn't append a null byte, so we can't chop the input string up
+   into small pieces and use that.  Our only remaining alternative is to
+   output the string one byte at a time. */
+
+#define ASM_OUTPUT_ASCII(FILE,PTR,LEN)				\
+{								\
+  register int sp = 0, lp = 0, ch;				\
+  fprintf ((FILE), "\t%s ", BYTE_ASM_OP);			\
+  do {								\
+    ch = (PTR)[sp];						\
+    if (ch > ' ' && ! (ch & 0x80) && ch != '\\')		\
+      {								\
+	fprintf ((FILE), "'%c", ch);				\
+      }								\
+    else							\
+      {								\
+	fprintf ((FILE), "0x%x", ch);				\
+      }								\
+    if (++sp < (LEN))						\
+      {								\
+	if ((sp % 10) == 0)					\
+	  {							\
+	    fprintf ((FILE), "\n\t%s ", BYTE_ASM_OP);		\
+	  }							\
+	else							\
+	  {							\
+	    putc (',', (FILE));					\
+	  }							\
+      }								\
+  } while (sp < (LEN));						\
+  putc ('\n', (FILE));						\
+}
+
+
+/* SGS based assemblers don't understand #NO_APP and #APP, so just don't
+   bother emitting them. */
+
+#undef ASM_APP_ON
+#define ASM_APP_ON ""
+
+#undef ASM_APP_OFF
+#define ASM_APP_OFF ""
+
+/* When using SGS derived assemblers, change the "MIT" or "MOTOROLA"
+   to "SGS/AT&T"  */
+
+#undef TARGET_VERSION
+#define TARGET_VERSION fprintf (stderr, " (68k, SGS/AT&T syntax)");
+
+#undef PRINT_OPERAND_PRINT_FLOAT
+#define PRINT_OPERAND_PRINT_FLOAT(CODE,FILE)			\
+	asm_fprintf ((FILE), "%I0x%x", u1.i);
+
+#undef ASM_OUTPUT_DOUBLE_OPERAND
+#define ASM_OUTPUT_DOUBLE_OPERAND(FILE,VALUE)			\
+	asm_fprintf ((FILE),"%I0x%x%08x", u.i[0], u.i[1]);
+
+/* How to output a block of SIZE zero bytes.  Note that the `space' pseudo,
+   when used in the text segment, causes SGS assemblers to output nop insns
+   rather than 0s, so we set ASM_NO_SKIP_IN_TEXT to prevent this. */
+
+#define ASM_NO_SKIP_IN_TEXT 1
+
+#undef ASM_OUTPUT_SKIP
+#define ASM_OUTPUT_SKIP(FILE,SIZE)  \
+  fprintf (FILE, "\t%s %u\n", SPACE_ASM_OP, (SIZE))
+
+/* Translate Motorola opcodes such as `jbeq' into SGS opcodes such
+   as `beq.w'.
+   Delete the `e' in `move...' and `fmove'.
+   Change `ftst' to `ftest'.
+   Change `fbne' to `fbneq'
+   Change `fsne' to `fsneq'
+   Change `divsl' to `tdivs' (32/32 -> 32r:32q)
+   Change `divul' to `tdivu' (32/32 -> 32r:32q)
+   Optionally change swap to swap.w.
+   */
+
+#ifdef SGS_SWAP_W
+#define ASM_OUTPUT_OPCODE(FILE, PTR)			\
+{							\
+  extern int flag_pic;					\
+  if (!strncmp ((PTR), "jbsr", 4))			\
+    { if (flag_pic)					\
+        fprintf ((FILE), "bsr");			\
+      else						\
+        fprintf ((FILE), "jsr");			\
+    (PTR) += 4; }					\
+  else if ((PTR)[0] == 'j' && (PTR)[1] == 'b')		\
+    { ++(PTR);						\
+      while (*(PTR) != ' ')				\
+	{ putc (*(PTR), (FILE)); ++(PTR); }		\
+      fprintf ((FILE), ".w"); }				\
+  else if ((PTR)[0] == 's')				\
+    {							\
+      if (!strncmp ((PTR), "swap", 4))			\
+	{ fprintf ((FILE), "swap.w"); (PTR) += 4; }	\
+    }							\
+/* FMOVE ==> FMOV, (and F%& F%$ translations) */	\
+  else if ((PTR)[0] == 'f')				\
+    {							\
+      if (!strncmp ((PTR), "fmove", 5))			\
+	{ fprintf ((FILE), "fmov"); (PTR) += 5; }	\
+      else if (!strncmp ((PTR), "ftst", 4))		\
+	{ fprintf ((FILE), "ftest"); (PTR) += 4; }	\
+      else if (!strncmp ((PTR), "fbne", 4))		\
+	{ fprintf ((FILE), "fbneq"); (PTR) += 4; }	\
+      else if (!strncmp ((PTR), "fsne", 4))		\
+	{ fprintf ((FILE), "fsneq"); (PTR) += 4; }	\
+      else if (!strncmp ((PTR), "f%$move", 7))		\
+	{ (PTR) += 7;					\
+	  if (TARGET_68040_ONLY)			\
+	    fprintf ((FILE), "fsmov");			\
+	  else fprintf ((FILE), "fmov"); }		\
+      else if (!strncmp ((PTR), "f%&move", 7))		\
+	{ (PTR) += 7;					\
+	  if (TARGET_68040_ONLY)			\
+	    fprintf ((FILE), "fdmov");			\
+	  else fprintf ((FILE), "fmov"); }		\
+    }							\
+/* MOVE, MOVEA, MOVEQ, MOVEC ==> MOV	*/		\
+  else if ((PTR)[0] == 'm' && (PTR)[1] == 'o'		\
+	   && (PTR)[2] == 'v' && (PTR)[3] == 'e')	\
+    { fprintf ((FILE), "mov"); (PTR) += 4;		\
+       if ((PTR)[0] == 'q' || (PTR)[0] == 'a'		\
+	   || (PTR)[0] == 'c') (PTR)++; }		\
+/* SUB, SUBQ, SUBA, SUBI ==> SUB */			\
+  else if ((PTR)[0] == 's' && (PTR)[1] == 'u' 		\
+	   && (PTR)[2] == 'b')				\
+    { fprintf ((FILE), "sub"); (PTR) += 3;		\
+       if ((PTR)[0] == 'q' || (PTR)[0] == 'i'	 	\
+	   || (PTR)[0] == 'a') (PTR)++; }		\
+/* CMP, CMPA, CMPI, CMPM ==> CMP	*/		\
+  else if ((PTR)[0] == 'c' && (PTR)[1] == 'm'		\
+	   && (PTR)[2] == 'p')				\
+    { fprintf ((FILE), "cmp"); (PTR) += 3;		\
+       if ((PTR)[0] == 'a' || (PTR)[0] == 'i'	 	\
+	   || (PTR)[0] == 'm') (PTR)++; }		\
+/* DIVSL ==> TDIVS */					\
+  else if ((PTR)[0] == 'd' && (PTR)[1] == 'i'		\
+	   && (PTR)[2] == 'v' && (PTR)[3] == 's'	\
+	   && (PTR)[4] == 'l')				\
+    { fprintf ((FILE), "tdivs"); (PTR) += 5; }		\
+/* DIVUL ==> TDIVU */					\
+  else if ((PTR)[0] == 'd' && (PTR)[1] == 'i'		\
+	   && (PTR)[2] == 'v' && (PTR)[3] == 'u'	\
+	   && (PTR)[4] == 'l')				\
+    { fprintf ((FILE), "tdivu"); (PTR) += 5; }		\
+}
+
+#else /* not SGS_SWAP_W */
+
+#define ASM_OUTPUT_OPCODE(FILE, PTR)			\
+{							\
+  extern int flag_pic;					\
+  if (!strncmp ((PTR), "jbsr", 4))			\
+    { if (flag_pic)					\
+        fprintf ((FILE), "bsr");			\
+      else						\
+        fprintf ((FILE), "jsr");			\
+    (PTR) += 4; }					\
+  else if ((PTR)[0] == 'j' && (PTR)[1] == 'b')		\
+    { ++(PTR);						\
+      while (*(PTR) != ' ')				\
+	{ putc (*(PTR), (FILE)); ++(PTR); }		\
+      fprintf ((FILE), ".w"); }				\
+/* FMOVE ==> FMOV, (and F%& F%$ translations) */	\
+  else if ((PTR)[0] == 'f')				\
+    {							\
+      if (!strncmp ((PTR), "fmove", 5))			\
+	{ fprintf ((FILE), "fmov"); (PTR) += 5; }	\
+      else if (!strncmp ((PTR), "ftst", 4))		\
+	{ fprintf ((FILE), "ftest"); (PTR) += 4; }	\
+      else if (!strncmp ((PTR), "fbne", 4))		\
+	{ fprintf ((FILE), "fbneq"); (PTR) += 4; }	\
+      else if (!strncmp ((PTR), "fsne", 4))		\
+	{ fprintf ((FILE), "fsneq"); (PTR) += 4; }	\
+      else if (!strncmp ((PTR), "f%$move", 7))		\
+	{ (PTR) += 7;					\
+	  if (TARGET_68040_ONLY)			\
+	    fprintf ((FILE), "fsmov");			\
+	  else fprintf ((FILE), "fmov"); }		\
+      else if (!strncmp ((PTR), "f%&move", 7))		\
+	{ (PTR) += 7;					\
+	  if (TARGET_68040_ONLY)			\
+	    fprintf ((FILE), "fdmov");			\
+	  else fprintf ((FILE), "fmov"); }		\
+    }							\
+/* MOVE, MOVEA, MOVEQ, MOVEC ==> MOV	*/		\
+  else if ((PTR)[0] == 'm' && (PTR)[1] == 'o'		\
+	   && (PTR)[2] == 'v' && (PTR)[3] == 'e')	\
+    { fprintf ((FILE), "mov"); (PTR) += 4;		\
+       if ((PTR)[0] == 'q' || (PTR)[0] == 'a'		\
+	   || (PTR)[0] == 'c') (PTR)++; }		\
+/* SUB, SUBQ, SUBA, SUBI ==> SUB */			\
+  else if ((PTR)[0] == 's' && (PTR)[1] == 'u' 		\
+	   && (PTR)[2] == 'b')				\
+    { fprintf ((FILE), "sub"); (PTR) += 3;		\
+       if ((PTR)[0] == 'q' || (PTR)[0] == 'i'	 	\
+	   || (PTR)[0] == 'a') (PTR)++; }		\
+/* CMP, CMPA, CMPI, CMPM ==> CMP	*/		\
+  else if ((PTR)[0] == 'c' && (PTR)[1] == 'm'		\
+	   && (PTR)[2] == 'p')				\
+    { fprintf ((FILE), "cmp"); (PTR) += 3;		\
+       if ((PTR)[0] == 'a' || (PTR)[0] == 'i'	 	\
+	   || (PTR)[0] == 'm') (PTR)++; }		\
+/* DIVSL ==> TDIVS */					\
+  else if ((PTR)[0] == 'd' && (PTR)[1] == 'i'		\
+	   && (PTR)[2] == 'v' && (PTR)[3] == 's'	\
+	   && (PTR)[4] == 'l')				\
+    { fprintf ((FILE), "tdivs"); (PTR) += 5; }		\
+/* DIVUL ==> TDIVU */					\
+  else if ((PTR)[0] == 'd' && (PTR)[1] == 'i'		\
+	   && (PTR)[2] == 'v' && (PTR)[3] == 'u'	\
+	   && (PTR)[4] == 'l')				\
+    { fprintf ((FILE), "tdivu"); (PTR) += 5; }		\
+}
+
+#endif /* not SGS_SWAP_W */
+
+/* This macro outputs the label at the start of a switch table.  The
+   ".swbeg <N>" is an assembler directive that causes the switch table
+   size to be inserted into the object code so that disassemblers, for
+   example, can identify that it is the start of a switch table. */
+
+#define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLE)			\
+    fprintf ((FILE), "\t%s &%d\n", SWBEG_ASM_OP, XVECLEN (PATTERN (TABLE), 1)); \
+    ASM_OUTPUT_INTERNAL_LABEL((FILE),(PREFIX),(NUM));
+
+/* At end of a switch table, define LDnnn iff the symbol LInnn was defined.
+   Some SGS assemblers have a bug such that "Lnnn-LInnn-2.b(pc,d0.l*2)"
+   fails to assemble.  Luckily "LDnnn(pc,d0.l*2)" produces the results
+   we want.  This difference can be accommodated by making the assembler
+   define such "LDnnn" to be either "Lnnn-LInnn-2.b", "Lnnn", or any other
+   string, as necessary.  This is accomplished via the ASM_OUTPUT_CASE_END
+   macro. */
+
+#undef ASM_OUTPUT_CASE_END
+#define ASM_OUTPUT_CASE_END(FILE,NUM,TABLE)		\
+{ if (switch_table_difference_label_flag)		\
+    asm_fprintf (FILE, "\t%s %LLD%d,%LL%d-%LLI%d-2.b\n",\
+		 SET_ASM_OP, (NUM), (NUM), (NUM))	\
+  switch_table_difference_label_flag = 0; }
+
+int switch_table_difference_label_flag;
+
+/* This is how to output an element of a case-vector that is relative.  */
+
+#undef ASM_OUTPUT_ADDR_DIFF_ELT
+#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL)	\
+  asm_fprintf (FILE, "\t%s %LL%d-%LL%d\n", WORD_ASM_OP, VALUE, REL)
+
+/* Currently, JUMP_TABLES_IN_TEXT_SECTION must be defined in order to
+   keep switch tables in the text section. */
+   
+#define JUMP_TABLES_IN_TEXT_SECTION 1
+
+/* Store in OUTPUT a string (made with alloca) containing
+   an assembler-name for a local static variable named NAME.
+   LABELNO is an integer which is different for each call.  */
+
+#undef ASM_FORMAT_PRIVATE_NAME
+#define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO)	\
+( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10),	\
+  sprintf ((OUTPUT), ASM_PN_FORMAT, (NAME), (LABELNO)))
+

gnu/gcc/gcc-2.2.2/config/m68kv4.h

@@ -0,0 +1,183 @@
+/* Target definitions for GNU compiler for mc680x0 running System V.4
+   Copyright (C) 1991 Free Software Foundation, Inc.
+
+   Written by Ron Guilmette (rfg@ncd.com) and Fred Fish (fnf@cygnus.com).
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GNU CC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GNU CC; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+/* Use SGS_* macros to control compilation in m68k.md */
+
+#define SGS_SWITCH_TABLES	/* Different switch table handling */
+
+#include "m68ksgs.h"		/* The m68k/SVR4 assembler is SGS based */
+#include "svr4.h"		/* Pick up the generic SVR4 macros */
+
+/* See m68k.h.  7 means 68020 with 68881.  */
+
+#ifndef TARGET_DEFAULT
+#define	TARGET_DEFAULT (5 /*68020*/ + 2 /*68881*/)
+#endif
+
+/*  Override the definition of NO_DOLLAR_IN_LABEL in svr4.h, for special
+    g++ assembler names.  When this is defined, g++ uses embedded '.'
+    characters and some m68k assemblers have problems with this.  The
+    chances are much greater that any particular assembler will permit
+    embedded '$' characters. */
+
+#undef NO_DOLLAR_IN_LABEL
+
+/* Define PCC_STATIC_STRUCT_RETURN if the convention on the target machine
+   is to use the nonreentrant technique for returning structure and union
+   values, as commonly implemented by the AT&T Portable C Compiler (PCC).
+   When defined, the gcc option -fpcc-struct-return can be used to cause
+   this form to be generated.  When undefined, the option does nothing.
+   For m68k SVR4, the convention is to use a reentrant technique compatible
+   with the gcc default, so override the definition of this macro in m68k.h */
+
+#undef PCC_STATIC_STRUCT_RETURN
+
+/* Provide a set of pre-definitions and pre-assertions appropriate for
+   the m68k running svr4.  __svr4__ is our extension.  */
+
+#define CPP_PREDEFINES \
+  "-Dm68k -Dunix -D__svr4__ -Asystem(unix) -Acpu(m68k) -Amachine(m68k)"
+
+/* Test to see if the target includes a 68881 by default, and use CPP_SPEC
+   to control whether or not __HAVE_68881__ is defined by default or not.
+   If a 68881 is the default, gcc will use inline 68881 instructions, by
+   predefining __HAVE_68881__, unless -msoft-float is specified.
+   If a 68881 is not the default, gcc will only define __HAVE_68881__ if
+   -m68881 is specified. */
+
+#if TARGET_DEFAULT & 2
+#define CPP_SPEC "%{!msoft-float:-D__HAVE_68881__}"
+#else
+#define CPP_SPEC "%{m68881:-D__HAVE_68881__}"
+#endif
+
+/* Output assembler code to FILE to increment profiler label # LABELNO
+   for profiling a function entry.  We override the definition in m68k.h
+   and match the way the native m68k/SVR4 compiler does profiling, with the
+   address of the profile counter in a1, not a0, and using bsr rather
+   than jsr. */
+
+#undef FUNCTION_PROFILER
+#define FUNCTION_PROFILER(FILE, LABELNO)				\
+  asm_fprintf ((FILE), "\tlea.l\t(%LLP%d,%Rpc),%Ra1\n\tbsr\t_mcount\n", \
+	       (LABELNO))
+
+/* Local common symbols are declared to the assembler with ".lcomm" rather
+   than ".bss", so override the definition in svr4.h */
+
+#undef BSS_ASM_OP
+#define BSS_ASM_OP	".lcomm"
+
+/* Register in which address to store a structure value is passed to a
+   function.  The default in m68k.h is a1.  For m68k/SVR4 it is a0. */
+
+#undef STRUCT_VALUE_REGNUM
+#define STRUCT_VALUE_REGNUM 8
+
+#define ASM_COMMENT_START "#"
+
+#undef TYPE_OPERAND_FMT
+#define TYPE_OPERAND_FMT      "@%s"
+
+/* Define how the m68k registers should be numbered for Dwarf output.
+   The numbering provided here should be compatible with the native
+   SVR4 SDB debugger in the m68k/SVR4 reference port, where d0-d7
+   are 0-7, a0-a8 are 8-15, and fp0-fp7 are 16-23. */
+
+#define DBX_REGISTER_NUMBER(REGNO) (REGNO)
+
+/* The ASM_OUTPUT_SKIP macro is first defined in m68k.h, using ".skip".
+   It is then overridden by m68ksgs.h to use ".space", and again by svr4.h
+   to use ".zero".  The m68k/SVR4 assembler uses ".space", so repeat the
+   definition from m68ksgs.h here.  Note that ASM_NO_SKIP_IN_TEXT is
+   defined in m68ksgs.h, so we don't have to repeat it here. */
+
+#undef ASM_OUTPUT_SKIP
+#define ASM_OUTPUT_SKIP(FILE,SIZE)  \
+  fprintf (FILE, "\t%s %u\n", SPACE_ASM_OP, (SIZE))
+
+/* 1 if N is a possible register number for a function value.
+   For m68k/SVR4 allow d0, a0, or fp0 as return registers, for integral,
+   pointer, or floating types, respectively. Reject fp0 if not using a
+   68881 coprocessor. */
+
+#undef FUNCTION_VALUE_REGNO_P
+#define FUNCTION_VALUE_REGNO_P(N) \
+  ((N) == 0 || (N) == 8 || (TARGET_68881 && (N) == 16))
+
+/* Define how to generate (in the callee) the output value of a function
+   and how to find (in the caller) the value returned by a function.  VALTYPE
+   is the data type of the value (as a tree).  If the precise function being
+   called is known, FUNC is its FUNCTION_DECL; otherwise, FUNC is 0.
+   For m68k/SVR4 generate the result in d0, a0, or fp0 as appropriate. */
+   
+#undef FUNCTION_VALUE
+#define FUNCTION_VALUE(VALTYPE, FUNC)					\
+  (TREE_CODE (VALTYPE) == REAL_TYPE && TARGET_68881			\
+   ? gen_rtx (REG, TYPE_MODE (VALTYPE), 16)				\
+   : (TREE_CODE (VALTYPE) == POINTER_TYPE				\
+      ? gen_rtx (REG, TYPE_MODE (VALTYPE), 8)				\
+      : gen_rtx (REG, TYPE_MODE (VALTYPE), 0)))
+
+/* For compatibility with the large body of existing code which does not
+   always properly declare external functions returning pointer types, the
+   m68k/SVR4 convention is to copy the value returned for pointer functions
+   from a0 to d0 in the function epilogue, so that callers that have
+   neglected to properly declare the callee can still find the correct return
+   value. */
+
+extern int current_function_returns_pointer;
+#define FUNCTION_EXTRA_EPILOGUE(FILE, SIZE)				\
+do {									\
+  if ((current_function_returns_pointer) && 				\
+      ! find_equiv_reg (0, get_last_insn (), 0, 0, 0, 8, Pmode))	\
+    asm_fprintf (FILE, "\tmov.l %Ra0,%Rd0\n");				\
+} while (0);
+
+/* Define how to find the value returned by a library function assuming the
+   value has mode MODE.
+   For m68k/SVR4 look for integer values in d0, pointer values in d0
+   (returned in both d0 and a0), and floating values in fp0. */
+
+#undef LIBCALL_VALUE
+#define LIBCALL_VALUE(MODE)						\
+  (((MODE) == SFmode || (MODE) == DFmode) && TARGET_68881		\
+   ? gen_rtx (REG, (MODE), 16)						\
+   : gen_rtx (REG, (MODE), 0))
+
+/* Boundary (in *bits*) on which stack pointer should be aligned.
+   The m68k/SVR4 convention is to keep the stack pointer longword aligned. */
+ 
+#undef STACK_BOUNDARY
+#define STACK_BOUNDARY 32
+
+/* Alignment of field after `int : 0' in a structure.
+   For m68k/SVR4, this is the next longword boundary. */
+
+#undef EMPTY_FIELD_BOUNDARY
+#define EMPTY_FIELD_BOUNDARY 32
+
+/* No data type wants to be aligned rounder than this.
+   For m68k/SVR4, some types (doubles for example) are aligned on 8 byte
+   boundaries */
+	
+#undef BIGGEST_ALIGNMENT
+#define BIGGEST_ALIGNMENT 64

gnu/gcc/gcc-2.2.2/config/m88k-move.sh

@@ -0,0 +1,299 @@
+#!/bin/sh
+#
+#	If your shell doesn't support functions (true for some BSD users),
+#	you might try using GNU's bash.
+#
+#ident "@(#) m88k-move.sh 3-Jan-92"
+#
+#	This file provided by Data General, February 1990.
+#
+#	This script generates the necessary movstr library functions
+#	for the m88100.  These functions are called from the expansion
+#	of movstrsi.  There are eight modules created by this script,
+#	each with multiple entry points.  One module, moveSI64n
+#	implements a word aligned loop; the other modules, moveXINx
+#	implement a straight line copy of N bytes in mode XI.
+#
+#	By analysis of the best memcpy function, it can be determined
+#	what appear to be certain magic numbers.  For example, a
+#	memcpy of 13 bytes, where the pointers are determined at run
+#	time to be word aligned takes 28 cycles.  A call to
+#	__movstrQI13x13 also takes 28 cycles.  The break even point
+#	for a HImode copy is 38 bytes.  Just to be on the safe side,
+#	these are bumped to 16 and 48 respectively.
+#
+#	The smaller, odd-remainder modules are provided to help
+#	mitigate the overhead of copying the last bytes.
+#
+#	Changes to these functions should not be taken lightly if you
+#	want to be able to link programs built with older movstr
+#	parameters.
+#
+#.Revision History
+#
+#	 2-Jan-92   Tom Wood   Renamed files to comply with SVR3 14 char limit.
+#	26-Oct-90   Tom Wood   Delete movstr.h; moved to out-m88k.c.
+#	17-Oct-90   Tom Wood   Files are named *.asm rather than *.s.
+#	11-Sep-90   Jeffrey Friedl
+#			On my BSD 4.3 awk and my GNU-awk, only the
+#			first character of an argument to -F is passed
+#			through, so I can't get this to work.
+#	 5-Sep-90   Ray Essick/Tom Wood  
+#			Added a -no-tdesc option.
+#	27-Aug-90   Vince Guarna/Tom Wood   
+#			Version 3 assembler syntax (-abi).
+#	16-Aug-90   Ron Guilmette
+#			Avoid problems on a Sparc.  The common
+#			denominator among shells seems to be '...\'
+#			rather than '...\\'.
+#	15-Aug-90   Ron Guilmette
+#			Avoid awk syntax errors on a Sun by not using
+#			the `!' operator.
+#	22-Feb-90   Tom Wood  	Created.
+#	20-Jun-90   Tom Wood	Emit file directives.
+#
+#.End]=--------------------------------------------------------------*/
+
+usage() {
+    echo "usage: $0 [ -abi ] [ -no-tdesc ]" 1>&2
+    exit 1
+}
+
+awk_flag="-F:";
+awk_begin="BEGIN { "
+do_file() {
+    echo "	file	 $1";
+}
+
+while [ $# -gt 0 ] ; do
+    case $1 in
+	-no-tdesc) awk_begin="$awk_begin no_tdesc=1;";;
+	-abi) awk_begin="$awk_begin abi=1;"
+	      do_file() {
+		echo '	version	 "03.00"';
+		echo "	file	 $1";
+	      };;
+	*) usage;;
+    esac
+    shift
+done
+
+rm -f move?I*[xn].s move?I*[xn].asm
+
+#.Implementation_continued[=-----------------------------------------------
+#
+#	This generates the word aligned loop.  The loop is entered
+#	from the callable entry points ___movstrSI64nN, where at
+#	least N bytes will be copied.  r2 is the destination pointer
+#	offset by 4, r3 is the source pointer offset by 4, r6 is the
+#	loop count.  Thus, the total bytes moved is 64 * r6 + N.  The
+#	first value is is preloaded into r4 or r5 (r4 if N/4 is odd;
+#	r5 if N/4 is even).  Upon returning, r2 and r3 have been
+#	updated and may be used for the remainder bytes to move.
+#
+#	The code for this loop is generated by the awk program
+#	following.  Edit *it*, not what it generates!
+#
+#.End]=------------------------------------------------------------------*/
+
+gen_movstrN() {
+  awk $awk_flag "$awk_begin"'
+    if (abi) {
+      ps="#"; us=""; tf="a";
+    } else {
+      ps=""; us="_"; tf="x";
+    }
+  }
+  NR == 1 && NF == 4 {
+    mode = $1; suffix = $2; align = $3; count = $4;
+    ld = align; st = 0;
+
+    printf "; The following was calculated using awk.\n";
+    printf "\ttext\n";
+    printf "\talign\t16\n";
+    printf "loop%s%d:\n", mode, count * align;
+    printf "\taddu\t%sr3,%sr3,%d\n", ps, ps, count * align;
+    printf "\taddu\t%sr2,%sr2,%d\n", ps, ps, count * align;
+    printf "\tsubu\t%sr6,%sr6,1\n", ps, ps;
+    for (r = count + 1; r >= 1; r--) {
+      evenp = r % 2;
+      name = sprintf("__%smovstr%s%dn%d", us, mode, count * align, r * align);
+      if (r > 1) {
+        printf "\tglobal\t%s\n", name;
+        printf "%s:\n", name;
+      }
+      if (r > 2) {
+	printf "\tld%s\t%sr%d,%sr3,%d\n", suffix, ps, 4 + evenp, ps, ld;
+        printf "\tst%s\t%sr%d,%sr2,%d\n", suffix, ps, 5 - evenp, ps, st;
+      } else if (r == 2) {
+	printf "\tld%s\t%sr%d,%sr3,%d\n", suffix, ps, 4 + evenp, ps, ld;
+	printf "\tbcnd.n\t%sgt0,%sr6,loop%s%d\n", ps, ps, mode, count * align;
+        printf "\tst%s\t%sr%d,%sr2,%d\n", suffix, ps, 5 - evenp, ps, st;
+        printf "\tjmp.n\t%sr1\n", ps;
+      } else {
+        printf "\tst%s\t%sr%d,%sr2,%d\n", suffix, ps, 5 - evenp, ps, st;
+      }
+      ld += align; st += align;
+    }
+    if (!no_tdesc) {
+      printf "end%s%d:\n", mode, count * align;
+      printf "\tsection\t.tdesc,\"%s\"\n", tf;
+      printf "\tword\t0x42\n";
+      printf "\tword\t1\n";
+      printf "\tword\tloop%s%d\n", mode, count * align;
+      printf "\tword\tend%s%d\n", mode, count * align;
+      printf "\tword\t0x0100001f\n";
+      printf "\tword\t0\n";
+      printf "\tword\t1\n";
+      printf "\tword\t0\n";
+      printf "\ttext\n";
+    }
+    printf "; End of awk generated code.\n";
+    exit;
+  }'
+}
+
+(do_file '"movstrSI64n.s"';
+ echo 'SI::4:16' | gen_movstrN) > moveSI64n.asm
+
+#.Implementation_continued[=-----------------------------------------------
+#
+#	This generates the even-remainder, straight-line modules.
+#	The code is entered from the callable entry points
+#	___movstrXINxM, where exactly M bytes will be copied in XI
+#	mode.  r2 is the destination pointer, r3 is the source
+#	pointer, neither being offset.  The first value is preloaded
+#	into r4 or r5 (r4 if M-N/B is even; r5 if M-N/B is odd, where
+#	B is the mode size of XI).  Upon returning, r2 and r3 have not
+#	been changed.
+#
+#	The code for these cases is generated by the awk program
+#	following.  Edit *it*, not what it generates!
+#
+#.End]=------------------------------------------------------------------*/
+
+gen_movstrX0() {
+    awk $awk_flag "$awk_begin"'
+      if (abi) {
+	ps="#"; us=""; tf="a";
+      } else {
+	ps=""; us="_"; tf="x";
+      }
+    }
+    NR == 1 && NF == 4 {
+    mode = $1; suffix = $2; align = $3; bytes = $4;
+    ld = align; st = 0; count = bytes / align;
+    printf "; The following was calculated using awk.\n";
+    printf "\ttext\n";
+    printf "\talign\t16\n";
+    for (r = count; r >= 1; r--) {
+      evenp = r % 2;
+      name = sprintf("__%smovstr%s%dx%d", us, mode, count * align, r * align);
+      if (r > 1) {
+        printf "\tglobal\t%s\n", name;
+        printf "%s:\n", name;
+      }
+      if (r == 1)
+        printf "\tjmp.n\t%sr1\n", ps;
+      else
+        printf "\tld%s\t%sr%d,%sr3,%d\n", suffix, ps, 4 + evenp, ps, ld;
+      printf "\tst%s\t%sr%d,%sr2,%d\n", suffix, ps, 5 - evenp, ps, st;
+      ld += align; st += align;
+    }
+    if (!no_tdesc) {
+      printf "end%s%dx:\n", mode, count * align;
+      printf "\tsection\t.tdesc,\"%s\"\n", tf;
+      printf "\tword\t0x42\n";
+      printf "\tword\t1\n";
+      printf "\tword\t__%smovstr%s%dx%d\n", us, mode, count * align, count * align;
+      printf "\tword\tend%s%dx\n", mode, count * align;
+      printf "\tword\t0x0100001f\n";
+      printf "\tword\t0\n";
+      printf "\tword\t1\n";
+      printf "\tword\t0\n";
+      printf "\ttext\n";
+    }
+    printf "; End of awk generated code.\n"
+    exit;
+  }'
+}
+
+(do_file '"movstrQI16x.s"';
+ echo 'QI:.b:1:16' | gen_movstrX0) > moveQI16x.asm
+(do_file '"movstrHI48x.s"';
+ echo 'HI:.h:2:48' | gen_movstrX0) > moveHI48x.asm
+(do_file '"movstrSI96x.s"';
+ echo 'SI::4:96'   | gen_movstrX0) > moveSI96x.asm
+
+#.Implementation_continued[=-----------------------------------------------
+#
+#	This generates the odd-remainder, straight-line modules.  The
+#	interface is the same as that for the even-remainder modules.
+#
+#.End]=------------------------------------------------------------------*/
+
+gen_movstrXr() {
+    awk $awk_flag "$awk_begin"'
+      if (abi) {
+	ps="#"; us=""; tf="a";
+      } else {
+	ps=""; us="_"; tf="x";
+      }
+    }
+    NR == 1 && NF == 4 {
+    mode = $1; rem = $2; most = $3; count = $4;
+    suffix[1] = ".b"; suffix[2] = ".h"; suffix[4] = "";
+
+    prev = align = most;
+    ld = align; st = 0; total = count - rem - most;
+    evenp = int(total/align) % 2;
+    printf "; The following was calculated using awk.\n";
+    printf "\ttext\n";
+    printf "\talign\t16\n";
+    for (bytes = total; bytes >= 0; bytes -= align) {
+      if (bytes < align) {
+	if (bytes >= 2) align = 2;
+	else align = 1;
+      }
+      name = sprintf("__%smovstr%s%dx%d", us, mode, total + most, bytes + most);
+      if (bytes > most) {
+        printf "\tglobal\t%s\n", name;
+        printf "%s:\n", name;
+      }
+      if (bytes == 0)
+	printf "\tjmp.n\t%sr1\n", ps;
+      else
+	printf "\tld%s\t%sr%d,%sr3,%d\n", suffix[align], ps, 4 + evenp, ps, ld;
+      printf "\tst%s\t%sr%d,%sr2,%d\n", suffix[prev], ps, 5 - evenp, ps, st;
+      ld += align; st += prev; prev = align;
+      if (evenp)
+	evenp = 0;
+      else
+	evenp = 1;
+    }
+    if (!no_tdesc) {
+      printf "end%s%dx:\n", mode, total + most;
+      printf "\tsection\t.tdesc,\"%s\"\n", tf;
+      printf "\tword\t0x42\n";
+      printf "\tword\t1\n";
+      printf "\tword\t__%smovstr%s%dx%d\n", us, mode, total + most, total + most;
+      printf "\tword\tend%s%dx\n", mode, total + most;
+      printf "\tword\t0x0100001f\n";
+      printf "\tword\t0\n";
+      printf "\tword\t1\n";
+      printf "\tword\t0\n";
+      printf "\ttext\n";
+    }
+    printf "; End of awk generated code.\n"
+    exit;
+  }'
+}
+
+(do_file '"movstrSI47x.s"';
+ echo 'SI:1:4:48' | gen_movstrXr) > moveSI47x.asm
+(do_file '"movstrSI46x.s"';
+ echo 'SI:2:4:48' | gen_movstrXr) > moveSI46x.asm
+(do_file '"movstrSI45x.s"';
+ echo 'SI:3:4:48' | gen_movstrXr) > moveSI45x.asm
+(do_file '"movstrHI15x.s"';
+ echo 'HI:1:2:16' | gen_movstrXr) > moveHI15x.asm

gnu/gcc/gcc-2.2.2/config/m88kdgux.h

@@ -0,0 +1,169 @@
+/* Definitions of target machine for GNU compiler.
+   Motorola m88100 running DG/UX.
+   Copyright (C) 1988, 1989, 1990, 1991 Free Software Foundation, Inc.
+   Contributed by Michael Tiemann (tiemann@mcc.com)
+   Enhanced by Michael Meissner (meissner@osf.org)
+   Currently supported by Tom Wood (wood@dg-rtp.dg.com)
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GNU CC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GNU CC; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+/* You're not seeing double!  To transition to dwarf debugging, both are
+   supported.  The option -msvr4 and -mversion-03.00 specify (for DG/UX)
+   `real' elf.  With these combinations, -g means dwarf.  */
+/* DWARF_DEBUGGING_INFO defined in svr4.h.  */
+#define SDB_DEBUGGING_INFO
+#define PREFERRED_DEBUGGING_TYPE \
+  (VERSION_0300_SYNTAX ? DWARF_DEBUG : SDB_DEBUG)
+
+#ifndef NO_BUGS
+#define AS_BUG_IMMEDIATE_LABEL
+#endif
+
+#include "svr4.h"
+#include "m88k.h"
+
+/* Augment TARGET_SWITCHES with the MXDB options.  */
+#define MASK_STANDARD		0x40000000 /* Retain standard information */
+#define MASK_LEGEND		0x20000000 /* Retain legend information */
+#define MASK_EXTERNAL_LEGEND	0x10000000 /* Make external legends */
+
+#define TARGET_STANDARD		  (target_flags & MASK_STANDARD)
+#define TARGET_LEGEND		  (target_flags & MASK_LEGEND)
+#define TARGET_EXTERNAL_LEGEND	  (target_flags & MASK_EXTERNAL_LEGEND)
+
+#undef  SUBTARGET_SWITCHES
+#define SUBTARGET_SWITCHES \
+    { "standard",			 MASK_STANDARD }, \
+    { "legend",				 MASK_LEGEND }, \
+    { "external-legend",		 MASK_EXTERNAL_LEGEND }, \
+    /* the following is used only in the *_SPEC's */ \
+    { "keep-coff",			 0 },
+
+/* Default switches */
+#undef	TARGET_DEFAULT
+#define TARGET_DEFAULT	(MASK_CHECK_ZERO_DIV	 | \
+			 MASK_OCS_DEBUG_INFO	 | \
+			 MASK_OCS_FRAME_POSITION)
+
+/* Macros to be automatically defined.  __svr4__ is our extension.
+   __CLASSIFY_TYPE__ is used in the <varargs.h> and <stdarg.h> header
+   files with DG/UX revision 5.40 and later.  This allows GNU CC to
+   operate without installing the header files.  */
+
+#undef	CPP_PREDEFINES
+#define CPP_PREDEFINES "-Dm88000 -Dm88k -Dunix -DDGUX -D__CLASSIFY_TYPE__=2\
+   -D__svr4__ -Asystem(unix) -Acpu(m88k) -Amachine(m88k)"
+
+/* If not -ansi, -traditional, or restricting include files to one
+   specific source target, specify full DG/UX features.  */
+#undef	CPP_SPEC
+#define	CPP_SPEC "%{!ansi:%{!traditional:-D__OPEN_NAMESPACE__}}"
+
+/* Assembler support (-V, silicon filter, legends for mxdb).  */
+#undef	ASM_SPEC
+#define ASM_SPEC "\
+%{V} %{v:%{!V:-V}} %{pipe: - %{msvr4:%{mversion-03.00:-KV3}}}\
+%{!mlegend:%{mstandard:-Wc,off}}\
+%{mlegend:-Wc,-fix-bb,-h\"gcc-2.0.3\",-s\"%i\"\
+%{traditional:,-lc}%{!traditional:,-lansi-c}\
+%{mstandard:,-keep-std}\
+%{mkeep-coff:,-keep-coff}\
+%{mexternal-legend:,-external}\
+%{mocs-frame-position:,-ocs}}"
+
+/* Override svr4.h.  */
+#undef	ASM_FINAL_SPEC
+#undef	STARTFILE_SPEC
+
+/* Linker and library spec's.
+   -static, -shared, -symbolic, -h* and -z* access AT&T V.4 link options.
+   -svr4 instructs gcc to place /usr/lib/values-X[cat].o on link the line.
+   When the -G link option is used (-shared and -symbolic) a final link is
+   not being done.  */
+#undef	LIB_SPEC
+#define LIB_SPEC "%{!shared:%{!symbolic:-lc}}"
+#undef	LINK_SPEC
+#define LINK_SPEC "%{z*} %{h*} %{V} %{v:%{!V:-V}} \
+		   %{static:-dn -Bstatic} \
+		   %{shared:-G -dy} \
+		   %{symbolic:-Bsymbolic -G -dy} \
+		   %{pg:-L/usr/lib/libp}%{p:-L/usr/lib/libp}"
+#undef	STARTFILE_SPEC
+#define STARTFILE_SPEC "%{!shared:%{!symbolic:%{pg:gcrt0.o%s} \
+			 %{!pg:%{p:/lib/mcrt0.o}%{!p:/lib/crt0.o}} \
+			 %{svr4:%{ansi:/lib/values-Xc.o} \
+			  %{!ansi:%{traditional:/lib/values-Xt.o} \
+			   %{!traditional:/usr/lib/values-Xa.o}}}}}"
+
+#undef	GPLUSPLUS_INCLUDE_DIR
+#define GPLUSPLUS_INCLUDE_DIR "/usr/opt/g++/lib/g++-include"
+
+/* Fast DG/UX version of profiler that does not require lots of
+   registers to be stored.  */
+#undef	FUNCTION_PROFILER
+#define FUNCTION_PROFILER(FILE, LABELNO) \
+  output_function_profiler (FILE, LABELNO, "gcc.mcount", 0)
+
+/* DGUX V.4 isn't quite ELF--yet.  */
+#undef  VERSION_0300_SYNTAX
+#define VERSION_0300_SYNTAX (TARGET_SVR4 && TARGET_VERSION_0300)
+
+/* Output the legend info for mxdb when debugging except if standard
+   debugging information only is explicitly requested.  */
+#undef  ASM_FIRST_LINE
+#define ASM_FIRST_LINE(FILE)						\
+  do {									\
+    if (VERSION_0300_SYNTAX)						\
+      fprintf (FILE, "\t%s\t \"03.00\"\n", VERSION_ASM_OP);		\
+    if (write_symbols != NO_DEBUG					\
+	&& ! (TARGET_STANDARD && ! TARGET_LEGEND))			\
+      {									\
+	fprintf (FILE, ";legend_info -fix-bb -h\"gcc-%s\" -s\"%s\"",	\
+		 VERSION_STRING, main_input_filename);			\
+	fputs (flag_traditional ? " -lc" : " -lansi-c", FILE);		\
+	if (TARGET_STANDARD)						\
+	  fputs (" -keep-std", FILE);					\
+	if (TARGET_EXTERNAL_LEGEND)					\
+	  fputs (" -external", FILE);					\
+	if (TARGET_OCS_FRAME_POSITION)					\
+	  fputs (" -ocs", FILE);					\
+	fputc ('\n', FILE);						\
+      }									\
+  } while (0)
+
+/* Override svr4.h.  */
+#undef PTRDIFF_TYPE
+#undef WCHAR_TYPE
+#undef WCHAR_TYPE_SIZE
+
+/* Override svr4.h and m88k.h except when compiling crtstuff.c.  */
+#if !defined (CRT_BEGIN) && !defined (CRT_END)
+#if 0 /* The SVR4 init method doesn't yet work.  */
+#undef	INIT_SECTION_ASM_OP
+#define INIT_SECTION_ASM_OP (VERSION_0300_SYNTAX		\
+			     ? "section\t .init,\"xa\""	\
+			     : "section\t .init,\"x\"")
+#endif
+#undef	CTORS_SECTION_ASM_OP
+#define CTORS_SECTION_ASM_OP (VERSION_0300_SYNTAX		\
+			      ? "section\t .ctors,\"aw\""	\
+			      : "section\t .ctors,\"d\"")
+#undef	DTORS_SECTION_ASM_OP
+#define DTORS_SECTION_ASM_OP (VERSION_0300_SYNTAX		\
+			      ? "section\t .dtors,\"aw\""	\
+			      : "section\t .dtors,\"d\"")
+#endif /* crtstuff.c */

gnu/gcc/gcc-2.2.2/config/m88kdolph.h

@@ -0,0 +1,33 @@
+/* Definitions of target machine for GNU compiler.
+   Motorola m88100 running the Dolphin UNIX System V/88 Release 3.2,
+   Version 3.5/5.60.
+   Copyright (C) 1992 Free Software Foundation, Inc.
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GNU CC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GNU CC; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+#include "m88kv3.h"
+
+/* Don't output structure tag names when it causes a forward reference.
+   Symptom:
+   Error messages like
+   as: "/usr/tmp/cca22733.s": cannot reduce symbol table, unused symbols remain
+   when compiling some programs.
+   example program (C++): struct bad { bad(); }; bad::bad() {}  */
+#undef SDB_ALLOW_FORWARD_REFERENCES
+
+/* Use T_ARG as T_VOID.  T_VOID is not defined in <syms.h> as it should be.  */
+#define T_VOID T_ARG

gnu/gcc/gcc-2.2.2/config/m88kluna.h

@@ -0,0 +1,48 @@
+/* Definitions of target machine for GNU compiler.
+   Motorola m88100 running Omron Luna/88k.
+   Copyright (C) 1991 Free Software Foundation, Inc.
+   Contributed by Jeffery Friedl (jfriedl@omron.co.jp)
+   Currently supported by Tom Wood (wood@dg-rtp.dg.com)
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GNU CC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GNU CC; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+/* The Omron Luna/88k is MACH and uses BSD a.out, not COFF or ELF.  */
+#ifndef MACH
+#define MACH
+#endif
+#define DBX_DEBUGGING_INFO
+#define DEFAULT_GDB_EXTENSIONS 0
+
+#include "aoutos.h"
+#include "m88k.h"
+
+/* Identify the compiler.  */
+#undef  VERSION_INFO1
+#define VERSION_INFO1 "Omron Luna/88k, "
+
+/* Macros to be automatically defined.  */
+#undef	CPP_PREDEFINES
+#define CPP_PREDEFINES \
+    "-DMACH -Dmc88100 -Dm88k -Dunix -Dluna -Dluna88k -D__CLASSIFY_TYPE__=2"
+
+/* Specify extra dir to search for include files.  */
+#undef	SYSTEM_INCLUDE_DIR
+#define SYSTEM_INCLUDE_DIR "/usr/mach/include"
+
+/* For the Omron Luna/88k, a float function returns a double in traditional
+   mode (and a float in ansi mode).  */
+#undef TRADITIONAL_RETURN_FLOAT

gnu/gcc/gcc-2.2.2/config/m88kv3.h

@@ -0,0 +1,138 @@
+/* Definitions of target machine for GNU compiler.
+   Motorola m88100 running the AT&T/Unisoft/Motorla V.3 reference port.
+   Copyright (C) 1990, 1991 Free Software Foundation, Inc.
+   Contributed by Ray Essick (ressick@mot.com)
+   Currently supported by Tom Wood (wood@dg-rtp.dg.com)
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GNU CC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GNU CC; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+#include "m88k.h"
+
+/* Default switches */
+#undef	TARGET_DEFAULT
+#define TARGET_DEFAULT	(MASK_CHECK_ZERO_DIV	| \
+			 MASK_OCS_DEBUG_INFO	| \
+			 MASK_OCS_FRAME_POSITION)
+
+/* Macros to be automatically defined.  */
+#undef	CPP_PREDEFINES
+#define CPP_PREDEFINES "-Dm88000 -Dm88k -DsysV88 -D__CLASSIFY_TYPE__=2"
+
+/* Override svr3.h to link with ?crt0.o instead of ?crt1.o and ?crtn.o.
+   From arul@sdsu.edu.  */
+#undef	STARTFILE_SPEC
+#define STARTFILE_SPEC \
+   "%{pg:gcrt0.o%s}%{!pg:%{p:mcrt0.o%s}%{!p:crt0.o%s}} crtbegin.o%s"
+
+/* Profiled libraries live in a different directory but keep the same
+   names other than that.  arul@sdsu.edu says -lg is always needed.  */
+#undef	LIB_SPEC
+#define LIB_SPEC "%{p:-L/lib/libp}%{pg:%{!p:-L/lib/libp}} -lg -lc crtend.o%s"
+
+/* Hot version of the profiler that uses r10 to pass the address of
+   the counter.  the _gcc_mcount routine knows not to screw with
+   the parameter registers.
+
+   DG/UX does this; i wrote a gnu-c/88k specific version and put it
+   in libgcc2.c -- RBE; this macro knows about the leading underscore
+   convention.  */
+#undef	FUNCTION_PROFILER
+#define FUNCTION_PROFILER(FILE, LABELNO) \
+  output_function_profiler (FILE, LABELNO, "_gcc_mcount", 0)
+
+/* Various other changes that we want to have in place without
+   too many changes to the m88k.h file.  */
+#undef	USE_LIBG
+#define	USE_LIBG
+
+/* Define a few machine-specific details of the implementation of
+   constructors.  */
+
+/* Although the .init section is used, it is not automatically invoked.  */
+#define INVOKE__main
+
+/* State that atexit exists so __do_global_ctors will register
+   __do_global_dtors.  */
+#define HAVE_ATEXIT
+
+#define CTOR_LIST_BEGIN	    		\
+  asm (INIT_SECTION_ASM_OP);		\
+  asm ("\tsubu\t r31,r31,16");	/* (STACK_BOUNDARY / BITS_PER_UNIT) == 16 */ \
+  asm ("\tst\t r0,r31,32");	/* REG_PARM_STACK_SPACE (0) == 32 */
+#define CTOR_LIST_END
+
+/* ASM_OUTPUT_CONSTRUCTOR outputs code into the .init section to push the
+   address of the constructor.  This becomes the body of __do_global_ctors
+   in crtstuff.c.  r13 is a temporary register.  */
+#undef	ASM_OUTPUT_CONSTRUCTOR
+#define ASM_OUTPUT_CONSTRUCTOR(FILE,NAME)				\
+  do {									\
+    init_section ();							\
+    fprintf (FILE, "\tor.u\t r13,r0,hi16(");				\
+    assemble_name (FILE, NAME);						\
+    fprintf (FILE, ")\n\tor\t r13,r13,lo16(");				\
+    assemble_name (FILE, NAME);						\
+    fprintf (FILE, ")\n\tsubu\t r31,r31,%d\n\tst\t r13,r31,%d\n",	\
+	     STACK_BOUNDARY / BITS_PER_UNIT, REG_PARM_STACK_SPACE (0));	\
+  } while (0)
+
+#undef	DO_GLOBAL_CTORS_BODY
+#define DO_GLOBAL_CTORS_BODY						\
+do {									\
+  func_ptr *__CTOR_LIST__ = __builtin_alloca (0), *p;			\
+  for (p = __CTOR_LIST__; *p; p += 4)					\
+    (*p) ();								\
+} while (0)
+
+#define DTOR_LIST_BEGIN							\
+  asm (FINI_SECTION_ASM_OP);						\
+  func_ptr __DTOR_LIST__[4] = { (func_ptr) (-1), (func_ptr) (-1),	\
+				(func_ptr) (-1), (func_ptr) (-1) }
+#define DTOR_LIST_END						  	\
+  asm (FINI_SECTION_ASM_OP);						\
+  func_ptr __DTOR_END__[4] = { (func_ptr) 0, (func_ptr) 0,		\
+			       (func_ptr) 0, (func_ptr) 0 }  
+
+/* A C statement (sans semicolon) to output an element in the table of
+   global destructors.  The table is constructed in the .fini section
+   so that an explicit linker script is not required.  The complication
+   is that this section is padded with NOP instructions and to either
+   8 or 16 byte alignment depending on the specific system.  A clever
+   way to avoid trouble is to output a block of 16 bytes where the
+   extra words are known values (-1).  */
+#undef	ASM_OUTPUT_DESTRUCTOR
+#define ASM_OUTPUT_DESTRUCTOR(FILE,NAME)	\
+  do {						\
+    register int i;				\
+    fini_section ();				\
+    fprintf (FILE, "\t%s\t ", ASM_LONG);	\
+    assemble_name (FILE,NAME);			\
+    fprintf (FILE, "\n");			\
+    for (i = 1; i < 4; i++)			\
+      fprintf (FILE, "\t%s\t -1\n", ASM_LONG);	\
+    } while (0)
+
+/* Walk the list looking for the terminating zero and ignoring all values of
+   -1.  */
+#undef	DO_GLOBAL_DTORS_BODY
+#define DO_GLOBAL_DTORS_BODY			\
+  do {						\
+    int i;					\
+    for (i = 0; __DTOR_LIST__[i] != 0; i++)	\
+      if (((int *)__DTOR_LIST__)[i] != -1)	\
+	__DTOR_LIST__[i] ();			\
+  } while (0)					

gnu/gcc/gcc-2.2.2/config/m88kv4.h

@@ -0,0 +1,64 @@
+/* Definitions of target machine for GNU compiler.
+   Motorola 88100 in an 88open ABI environment.
+   Copyright (C) 1990, 1991 Free Software Foundation, Inc.
+   Written by Ron Guilmette (rfg@ncd.com).
+   Contributed to FSF by Network Computing Devices.
+   Other contributions by Vince Guarna (vguarna@urbana.mcd.mot.com),
+   Ray Essick (essick@i88.isc.com), and Wilson Tien (wtien@urbana.mcd.mot.com).
+   Currently supported by Tom Wood (wood@dg-rtp.dg.com)
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GNU CC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GNU CC; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+/* DWARF_DEBUGGING_INFO defined in svr4.h.  */
+
+#ifndef NO_BUGS
+#define AS_BUG_DOT_LABELS
+#define AS_BUG_POUND_TYPE
+#endif
+
+#include "svr4.h"
+#include "m88k.h"
+
+/* Identify the compiler.  */
+#undef  VERSION_INFO1
+#define VERSION_INFO1 "88open ABI, "
+
+/* Default switches */
+#undef	TARGET_DEFAULT
+#define TARGET_DEFAULT	(MASK_CHECK_ZERO_DIV | \
+			 MASK_OCS_DEBUG_INFO | \
+			 MASK_SVR4)
+
+/* Cpp spec.  These pre-assertions are needed for SVR4 as they occur
+   often in the system header files.  __svr4__ is our extension.  */
+
+#undef  CPP_PREDEFINES
+#define CPP_PREDEFINES \
+  "-Dm88000 -Dm88k -Dunix -D__svr4__ -Amachine(m88k) -Acpu(m88k) -Asystem(unix)"
+
+/* For the AT&T SVR4 port, the function is _mcount.  */
+#undef	FUNCTION_PROFILER
+#define FUNCTION_PROFILER(FILE, LABELNO) \
+  output_function_profiler (FILE, LABELNO, "_mcount", 1)
+
+/* Override svr4.h and m88k.h.  */
+#undef	INIT_SECTION_ASM_OP
+#define INIT_SECTION_ASM_OP "section\t.init,\"xa\",#progbits"
+#undef	CTORS_SECTION_ASM_OP
+#define CTORS_SECTION_ASM_OP	"section\t.ctors,\"a\",#progbits"
+#undef	DTORS_SECTION_ASM_OP
+#define DTORS_SECTION_ASM_OP	"section\t.dtors,\"a\",#progbits"

gnu/gcc/gcc-2.2.2/config/merlin.h

@@ -0,0 +1,229 @@
+/* Definitions of target machine for GNU compiler.  MERLIN NS32000 version.
+   Copyright (C) 1990 Free Software Foundation, Inc.
+   By Mark Mason (mason@reed.bitnet, pyramid!unify!mason@uunet.uu.net).
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GNU CC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GNU CC; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+/* Two flags to control how addresses are printed in assembler insns.  */
+
+#define SEQUENT_ADDRESS_BUG 1
+#define SEQUENT_BASE_REGS
+
+#include "ns32k.h"
+
+/* This is BSD, so it wants DBX format.  */
+#define DBX_DEBUGGING_INFO
+
+/* Sequent has some changes in the format of DBX symbols.  */
+#define DBX_NO_XREFS 1
+
+/* Don't split DBX symbols into continuations.  */
+#define DBX_CONTIN_LENGTH 0
+
+#define TARGET_DEFAULT 1
+
+/* Print subsidiary information on the compiler version in use.  */
+#undef TARGET_VERSION
+#define TARGET_VERSION fprintf (stderr, " (32000, UTek syntax)");
+
+/* These control the C++ compiler somehow.  */
+#define FASCIST_ASSEMBLER
+#define USE_COLLECT
+
+#undef CPP_PREDEFINES
+#define CPP_PREDEFINES \
+	"-Dns32000 -Dns32k -Dns16000 -Dmerlin -Dunix -DUtek -Dbsd"
+
+/* This is how to align the code that follows an unconditional branch.
+   Don't define it, since it confuses the assembler (we hear).  */
+
+#undef ASM_OUTPUT_ALIGN_CODE
+
+/* Assembler pseudo-op for shared data segment. */
+#define SHARED_SECTION_ASM_OP ".shdata"
+
+/* %$ means print the prefix for an immediate operand. */
+
+#ifdef UTEK_ASM
+#undef PRINT_OPERAND
+#define PRINT_OPERAND(FILE, X, CODE)  \
+{ if (CODE == '$') putc('$', FILE);					\
+  else if (CODE == '?');						\
+  else if (GET_CODE (X) == CONST_INT)					\
+    fprintf(FILE, "$%d", INTVAL(X));					\
+  else if (GET_CODE (X) == REG)						\
+    fprintf (FILE, "%s", reg_names[REGNO (X)]);				\
+  else if (GET_CODE (X) == MEM)						\
+    {									\
+      rtx xfoo;								\
+      xfoo = XEXP (X, 0);						\
+      switch (GET_CODE (xfoo))						\
+	{								\
+	case MEM:							\
+	  if (GET_CODE (XEXP (xfoo, 0)) == REG)				\
+	    if (REGNO (XEXP (xfoo, 0)) == STACK_POINTER_REGNUM)		\
+	      fprintf (FILE, "0(0(sp))");				\
+	    else fprintf (FILE, "0(0(%s))",				\
+			  reg_names[REGNO (XEXP (xfoo, 0))]);		\
+	  else								\
+	    {								\
+	      if (GET_CODE (XEXP (xfoo, 0)) == SYMBOL_REF		\
+		  || GET_CODE (XEXP (xfoo, 0)) == CONST)		\
+	        {							\
+		  fprintf(FILE, "0(");					\
+		  output_address(xfoo);					\
+		  fprintf(FILE, "(sb))");				\
+		}							\
+	      else							\
+	        {							\
+		  fprintf (FILE, "0(");					\
+		  output_address (xfoo);				\
+		  putc (')', FILE);					\
+		}							\
+	    }								\
+	  break;							\
+	case REG:							\
+	  fprintf (FILE, "0(%s)", reg_names[REGNO (xfoo)]);		\
+	  break;							\
+	case PRE_DEC:							\
+	case POST_INC:							\
+	  fprintf (FILE, "tos");					\
+	  break;							\
+	case CONST_INT:							\
+	  fprintf (FILE, "$%d", INTVAL (xfoo));				\
+	  break;							\
+	default:							\
+	  output_address (xfoo);					\
+	  break;							\
+	}								\
+    }									\
+  else if (GET_CODE (X) == CONST_DOUBLE && GET_MODE (X) != DImode)	\
+    if (GET_MODE (X) == DFmode)						\
+      { union { double d; int i[2]; } u;				\
+	u.i[0] = CONST_DOUBLE_LOW (X); u.i[1] = CONST_DOUBLE_HIGH (X);	\
+	fprintf (FILE, "$0d%.20e", u.d); }				\
+    else { union { double d; int i[2]; } u;				\
+	   u.i[0] = CONST_DOUBLE_LOW (X); u.i[1] = CONST_DOUBLE_HIGH (X); \
+	   fprintf (FILE, "$0f%.20e", u.d); }				\
+  else output_addr_const (FILE, X); }
+
+#undef  FUNCTION_PROLOGUE
+
+/* This differs from the one in ns32k.h in printing a bitmask
+   rather than a register list in the enter or save instruction.  */
+
+#define FUNCTION_PROLOGUE(FILE, SIZE)     \
+{ register int regno, g_regs_used = 0;				\
+  int used_regs_buf[8], *bufp = used_regs_buf;			\
+  int used_fregs_buf[8], *fbufp = used_fregs_buf;		\
+  extern char call_used_regs[];					\
+  MAIN_FUNCTION_PROLOGUE;					\
+  for (regno = 0; regno < 8; regno++)				\
+    if (regs_ever_live[regno]					\
+	&& ! call_used_regs[regno])				\
+    {								\
+      *bufp++ = regno; g_regs_used++;				\
+    }								\
+  *bufp = -1;							\
+  for (; regno < 16; regno++)					\
+    if (regs_ever_live[regno] && !call_used_regs[regno]) {	\
+      *fbufp++ = regno;						\
+    }								\
+  *fbufp = -1;							\
+  bufp = used_regs_buf;						\
+  if (frame_pointer_needed)					\
+    fprintf (FILE, "\tenter ");					\
+  else if (g_regs_used)						\
+    fprintf (FILE, "\tsave ");					\
+  if (frame_pointer_needed || g_regs_used)			\
+    {								\
+      char mask = 0;						\
+      while (*bufp >= 0)					\
+	mask |= 1 << *bufp++;					\
+      fprintf (FILE, "$0x%x", (int) mask & 0xff);		\
+    }								\
+  if (frame_pointer_needed)					\
+    fprintf (FILE, ",%d\n", SIZE);				\
+  else if (g_regs_used)						\
+    fprintf (FILE, "\n");					\
+  fbufp = used_fregs_buf;					\
+  while (*fbufp >= 0)						\
+    {								\
+      if ((*fbufp & 1) || (fbufp[0] != fbufp[1] - 1))		\
+	fprintf (FILE, "\tmovf f%d,tos\n", *fbufp++ - 8);	\
+      else							\
+	{							\
+	  fprintf (FILE, "\tmovl f%d,tos\n", fbufp[0] - 8);	\
+	  fbufp += 2;						\
+	}							\
+    }								\
+}
+
+#undef  FUNCTION_EPILOGUE
+
+/* This differs from the one in ns32k.h in printing a bitmask
+   rather than a register list in the exit or restore instruction.  */
+
+#define FUNCTION_EPILOGUE(FILE, SIZE) \
+{ register int regno, g_regs_used = 0, f_regs_used = 0;		\
+  int used_regs_buf[8], *bufp = used_regs_buf;			\
+  int used_fregs_buf[8], *fbufp = used_fregs_buf;		\
+  extern char call_used_regs[];					\
+  *fbufp++ = -2;						\
+  for (regno = 8; regno < 16; regno++)				\
+    if (regs_ever_live[regno] && !call_used_regs[regno]) {	\
+       *fbufp++ = regno; f_regs_used++;				\
+    }								\
+  fbufp--;							\
+  for (regno = 0; regno < 8; regno++)				\
+    if (regs_ever_live[regno]					\
+	&& ! call_used_regs[regno])				\
+    {                                                         	\
+      *bufp++ = regno; g_regs_used++;				\
+    }                                                         	\
+  while (fbufp > used_fregs_buf)				\
+    {								\
+      if ((*fbufp & 1) && fbufp[0] == fbufp[-1] + 1)		\
+	{							\
+	  fprintf (FILE, "\tmovl tos,f%d\n", fbufp[-1] - 8);	\
+	  fbufp -= 2;						\
+	}							\
+      else fprintf (FILE, "\tmovf tos,f%d\n", *fbufp-- - 8);	\
+    }								\
+  if (frame_pointer_needed)					\
+    fprintf (FILE, "\texit ");					\
+  else if (g_regs_used)						\
+    fprintf (FILE, "\trestore ");				\
+  if (g_regs_used || frame_pointer_needed)			\
+    {								\
+      char mask = 0;						\
+								\
+      while (bufp > used_regs_buf)				\
+	{							\
+	  /* Utek assembler takes care of reversing this */	\
+	  mask |= 1 << *--bufp;					\
+	}							\
+      fprintf (FILE, "$0x%x\n", (int) mask & 0xff);		\
+    }								\
+  if (current_function_pops_args)				\
+    fprintf (FILE, "\tret %d\n", current_function_pops_args);	\
+  else fprintf (FILE, "\tret 0\n"); }
+
+#endif /* UTEK_ASM */
+
+#undef PRINT_OPERAND_ADDRESS
+#define PRINT_OPERAND_ADDRESS(FILE, ADDR)  print_operand_address(FILE, ADDR)

gnu/gcc/gcc-2.2.2/config/mips-bsd.h

@@ -0,0 +1,56 @@
+/* Definitions of target machine for GNU compiler.  MIPS RISC-OS BSD version.
+   Copyright (C) 1991 Free Software Foundation, Inc.
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GNU CC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GNU CC; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+#define MIPS_BSD43
+
+#define CPP_PREDEFINES "-Dmips -Dunix -Dhost_mips -DMIPSEB -DR3000 -DSYSTYPE_BSD43"
+
+#define SYSTEM_INCLUDE_DIR "/bsd43/usr/include"
+
+#define CPP_SPEC "\
+%{.cc:	-D__LANGUAGE_C_PLUS_PLUS -D_LANGUAGE_C_PLUS_PLUS} \
+%{.cxx:	-D__LANGUAGE_C_PLUS_PLUS -D_LANGUAGE_C_PLUS_PLUS} \
+%{.C:	-D__LANGUAGE_C_PLUS_PLUS -D_LANGUAGE_C_PLUS_PLUS} \
+%{.m:	-D__LANGUAGE_OBJECTIVE_C -D_LANGUAGE_OBJECTIVE_C} \
+%{.S:	-D__LANGUAGE_ASSEMBLY -D_LANGUAGE_ASSEMBLY %{!ansi:-DLANGUAGE_ASSEMBLY}} \
+%{!.S:	-D__LANGUAGE_C -D_LANGUAGE_C %{!ansi:-DLANGUAGE_C}}"
+
+#define LINK_SPEC "\
+%{G*} \
+%{!mgas: \
+	%{EB} %{!EB: -EB} \
+	%{EL: %e-EL not supported} \
+	%{bestGnum} \
+	%{mips1} %{mips2} %{mips3} \
+	-systype /bsd43/ }"
+		    
+#define LIB_SPEC "%{p:-lprof1} %{pg:-lprof1} -lc"
+
+#define STARTFILE_SPEC "%{pg:gcrt0.o%s}%{!pg:%{p:mcrt0.o%s}%{!p:crt1.o%s crtn.o%s}}"
+
+#define MACHINE_TYPE "RISC-OS BSD Mips"
+
+/* Generate calls to memcpy, etc., not bcopy, etc.  */
+#define TARGET_MEM_FUNCTIONS
+
+/* Override defaults for finding the MIPS tools.  */
+#define MD_STARTFILE_PREFIX "/bsd43/usr/lib/cmplrs/cc/"
+#define MD_EXEC_PREFIX "/bsd43/usr/lib/cmplrs/cc/"
+
+#include "mips.h"

gnu/gcc/gcc-2.2.2/config/mips-g5.h

@@ -0,0 +1,22 @@
+/* Definitions of target machine for GNU compiler.  Sony RISC NEWS (mips)
+   System V using encapsulated stabs.
+   Copyright (C) 1992 Free Software Foundation, Inc.
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GNU CC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GNU CC; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+#define PREFERRED_DEBUGGING_TYPE DBX_DEBUG
+#include "mips-news5.h"

gnu/gcc/gcc-2.2.2/config/mips-gbsd.h

@@ -0,0 +1,22 @@
+/* Definitions of target machine for GNU compiler.  Mips BSD version
+   using encapsulated stabs.
+   Copyright (C) 1992 Free Software Foundation, Inc.
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GNU CC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GNU CC; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+#define PREFERRED_DEBUGGING_TYPE DBX_DEBUG
+#include "mips-bsd.h"

gnu/gcc/gcc-2.2.2/config/mips-gdb.h

@@ -0,0 +1,22 @@
+/* Definitions of target machine for GNU compiler.  MIPS default version
+   using encapsulated stabs.
+   Copyright (C) 1992 Free Software Foundation, Inc.
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GNU CC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GNU CC; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+#define PREFERRED_DEBUGGING_TYPE DBX_DEBUG
+#include "mips.h"

gnu/gcc/gcc-2.2.2/config/mips-gn5.h

@@ -0,0 +1,22 @@
+/* Definitions of target machine for GNU compiler.  Sony RISC NEWS (mips)
+   System V using encapsulated stabs.
+   Copyright (C) 1992 Free Software Foundation, Inc.
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GNU CC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GNU CC; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+#define PREFERRED_DEBUGGING_TYPE DBX_DEBUG
+#include "mips-news5.h"