add directory gnu
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gnu/gcc/gcc-2.2.2/hard-reg-set.h
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271
gnu/gcc/gcc-2.2.2/hard-reg-set.h
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/* Sets (bit vectors) of hard registers, and operations on them.
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Copyright (C) 1987 Free Software Foundation, Inc.
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This file is part of GNU CC
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GNU CC is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2, or (at your option)
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any later version.
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GNU CC is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with GNU CC; see the file COPYING. If not, write to
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the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
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/* Define the type of a set of hard registers. */
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/* If HARD_REG_SET is a macro, its definition is a scalar type
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that has enough bits for all the target machine's hard registers.
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Otherwise, it is a typedef for a suitable array of longs,
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and HARD_REG_SET_LONGS is how many. */
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#ifndef HOST_BITS_PER_LONG_LONG
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#define HOST_BITS_PER_LONG_LONG (2 * HOST_BITS_PER_LONG)
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#endif
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#if FIRST_PSEUDO_REGISTER <= HOST_BITS_PER_CHAR
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#define HARD_REG_SET char
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#else
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#if FIRST_PSEUDO_REGISTER <= HOST_BITS_PER_SHORT
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#define HARD_REG_SET short
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#else
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#if FIRST_PSEUDO_REGISTER <= HOST_BITS_PER_INT
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#define HARD_REG_SET int
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#else
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#if FIRST_PSEUDO_REGISTER <= HOST_BITS_PER_LONG
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#define HARD_REG_SET long
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#else
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#if 0 && defined (__GNUC__) && FIRST_PSEUDO_REGISTER <= HOST_BITS_PER_LONGLONG
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#define HARD_REG_SET long long
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#else
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#define HARD_REG_SET_LONGS \
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((FIRST_PSEUDO_REGISTER + HOST_BITS_PER_LONG - 1) / HOST_BITS_PER_LONG)
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typedef long HARD_REG_SET[HARD_REG_SET_LONGS];
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#endif
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#endif
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#endif
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#endif
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#endif
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/* HARD_CONST is used to cast a constant to a HARD_REG_SET
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if that is a scalar wider than an integer. */
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#ifdef HARD_REG_SET
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#define HARD_CONST(X) ((HARD_REG_SET) (X))
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#else
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#define HARD_CONST(X) (X)
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#endif
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/* Define macros SET_HARD_REG_BIT, CLEAR_HARD_REG_BIT and TEST_HARD_REG_BIT
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to set, clear or test one bit in a hard reg set of type HARD_REG_SET.
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All three take two arguments: the set and the register number.
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In the case where sets are arrays of longs, the first argument
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is actually a pointer to a long.
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Define two macros for initializing a set:
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CLEAR_HARD_REG_SET and SET_HARD_REG_SET.
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These take just one argument.
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Also define macros for copying hard reg sets:
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COPY_HARD_REG_SET and COMPL_HARD_REG_SET.
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These take two arguments TO and FROM; they read from FROM
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and store into TO. COMPL_HARD_REG_SET complements each bit.
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Also define macros for combining hard reg sets:
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IOR_HARD_REG_SET and AND_HARD_REG_SET.
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These take two arguments TO and FROM; they read from FROM
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and combine bitwise into TO. Define also two variants
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IOR_COMPL_HARD_REG_SET and AND_COMPL_HARD_REG_SET
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which use the complement of the set FROM.
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Also define GO_IF_HARD_REG_SUBSET (X, Y, TO):
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if X is a subset of Y, go to TO.
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*/
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#ifdef HARD_REG_SET
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#define SET_HARD_REG_BIT(SET, BIT) \
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((SET) |= HARD_CONST (1) << (BIT))
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#define CLEAR_HARD_REG_BIT(SET, BIT) \
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((SET) &= ~(HARD_CONST (1) << (BIT)))
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#define TEST_HARD_REG_BIT(SET, BIT) \
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((SET) & (HARD_CONST (1) << (BIT)))
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#define CLEAR_HARD_REG_SET(TO) ((TO) = HARD_CONST (0))
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#define SET_HARD_REG_SET(TO) ((TO) = HARD_CONST (-1))
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#define COPY_HARD_REG_SET(TO, FROM) ((TO) = (FROM))
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#define COMPL_HARD_REG_SET(TO, FROM) ((TO) = ~(FROM))
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#define IOR_HARD_REG_SET(TO, FROM) ((TO) |= (FROM))
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#define IOR_COMPL_HARD_REG_SET(TO, FROM) ((TO) |= ~ (FROM))
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#define AND_HARD_REG_SET(TO, FROM) ((TO) &= (FROM))
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#define AND_COMPL_HARD_REG_SET(TO, FROM) ((TO) &= ~ (FROM))
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#define GO_IF_HARD_REG_SUBSET(X,Y,TO) if (HARD_CONST (0) == ((X) & ~(Y))) goto TO
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#define GO_IF_HARD_REG_EQUAL(X,Y,TO) if ((X) == (Y)) goto TO
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#else
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#define UHOST_BITS_PER_LONG ((unsigned) HOST_BITS_PER_LONG)
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#define SET_HARD_REG_BIT(SET, BIT) \
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((SET)[(BIT) / UHOST_BITS_PER_LONG] |= 1 << ((BIT) % UHOST_BITS_PER_LONG))
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#define CLEAR_HARD_REG_BIT(SET, BIT) \
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((SET)[(BIT) / UHOST_BITS_PER_LONG] &= ~(1 << ((BIT) % UHOST_BITS_PER_LONG)))
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#define TEST_HARD_REG_BIT(SET, BIT) \
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((SET)[(BIT) / UHOST_BITS_PER_LONG] & (1 << ((BIT) % UHOST_BITS_PER_LONG)))
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#define CLEAR_HARD_REG_SET(TO) \
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do { register long *scan_tp_ = (TO); \
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register int i; \
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for (i = 0; i < HARD_REG_SET_LONGS; i++) \
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*scan_tp_++ = 0; } while (0)
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#define SET_HARD_REG_SET(TO) \
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do { register long *scan_tp_ = (TO); \
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register int i; \
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for (i = 0; i < HARD_REG_SET_LONGS; i++) \
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*scan_tp_++ = -1; } while (0)
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#define COPY_HARD_REG_SET(TO, FROM) \
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do { register long *scan_tp_ = (TO), *scan_fp_ = (FROM); \
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register int i; \
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for (i = 0; i < HARD_REG_SET_LONGS; i++) \
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*scan_tp_++ = *scan_fp_++; } while (0)
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#define COMPL_HARD_REG_SET(TO, FROM) \
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do { register long *scan_tp_ = (TO), *scan_fp_ = (FROM); \
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register int i; \
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for (i = 0; i < HARD_REG_SET_LONGS; i++) \
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*scan_tp_++ = ~ *scan_fp_++; } while (0)
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#define AND_HARD_REG_SET(TO, FROM) \
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do { register long *scan_tp_ = (TO), *scan_fp_ = (FROM); \
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register int i; \
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for (i = 0; i < HARD_REG_SET_LONGS; i++) \
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*scan_tp_++ &= *scan_fp_++; } while (0)
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#define AND_COMPL_HARD_REG_SET(TO, FROM) \
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do { register long *scan_tp_ = (TO), *scan_fp_ = (FROM); \
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register int i; \
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for (i = 0; i < HARD_REG_SET_LONGS; i++) \
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*scan_tp_++ &= ~ *scan_fp_++; } while (0)
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#define IOR_HARD_REG_SET(TO, FROM) \
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do { register long *scan_tp_ = (TO), *scan_fp_ = (FROM); \
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register int i; \
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for (i = 0; i < HARD_REG_SET_LONGS; i++) \
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*scan_tp_++ |= *scan_fp_++; } while (0)
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#define IOR_COMPL_HARD_REG_SET(TO, FROM) \
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do { register long *scan_tp_ = (TO), *scan_fp_ = (FROM); \
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register int i; \
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for (i = 0; i < HARD_REG_SET_LONGS; i++) \
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*scan_tp_++ |= ~ *scan_fp_++; } while (0)
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#define GO_IF_HARD_REG_SUBSET(X,Y,TO) \
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do { register long *scan_xp_ = (X), *scan_yp_ = (Y); \
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register int i; \
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for (i = 0; i < HARD_REG_SET_LONGS; i++) \
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if (0 != (*scan_xp_++ & ~*scan_yp_++)) break; \
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if (i == HARD_REG_SET_LONGS) goto TO; } while (0)
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#define GO_IF_HARD_REG_EQUAL(X,Y,TO) \
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do { register long *scan_xp_ = (X), *scan_yp_ = (Y); \
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register int i; \
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for (i = 0; i < HARD_REG_SET_LONGS; i++) \
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if (*scan_xp_++ != ~*scan_yp_++)) break; \
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if (i == HARD_REG_SET_LONGS) goto TO; } while (0)
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#endif
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/* Define some standard sets of registers. */
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/* Indexed by hard register number, contains 1 for registers
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that are fixed use (stack pointer, pc, frame pointer, etc.).
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These are the registers that cannot be used to allocate
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a pseudo reg whose life does not cross calls. */
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extern char fixed_regs[FIRST_PSEUDO_REGISTER];
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/* The same info as a HARD_REG_SET. */
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extern HARD_REG_SET fixed_reg_set;
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/* Indexed by hard register number, contains 1 for registers
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that are fixed use or are clobbered by function calls.
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These are the registers that cannot be used to allocate
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a pseudo reg whose life crosses calls. */
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extern char call_used_regs[FIRST_PSEUDO_REGISTER];
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/* The same info as a HARD_REG_SET. */
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extern HARD_REG_SET call_used_reg_set;
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/* Indexed by hard register number, contains 1 for registers that are
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fixed use -- i.e. in fixed_regs -- or a function value return register
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or STRUCT_VALUE_REGNUM or STATIC_CHAIN_REGNUM. These are the
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registers that cannot hold quantities across calls even if we are
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willing to save and restore them. */
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extern char call_fixed_regs[FIRST_PSEUDO_REGISTER];
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/* The same info as a HARD_REG_SET. */
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extern HARD_REG_SET call_fixed_reg_set;
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/* Indexed by hard register number, contains 1 for registers
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that are being used for global register decls.
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These must be exempt from ordinary flow analysis
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and are also considered fixed. */
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extern char global_regs[FIRST_PSEUDO_REGISTER];
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/* Table of register numbers in the order in which to try to use them. */
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#ifdef REG_ALLOC_ORDER /* Avoid undef symbol in certain broken linkers. */
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extern int reg_alloc_order[FIRST_PSEUDO_REGISTER];
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#endif
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/* For each reg class, a HARD_REG_SET saying which registers are in it. */
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extern HARD_REG_SET reg_class_contents[];
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/* For each reg class, number of regs it contains. */
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extern int reg_class_size[N_REG_CLASSES];
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/* For each reg class, table listing all the containing classes. */
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extern enum reg_class reg_class_superclasses[N_REG_CLASSES][N_REG_CLASSES];
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/* For each reg class, table listing all the classes contained in it. */
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extern enum reg_class reg_class_subclasses[N_REG_CLASSES][N_REG_CLASSES];
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/* For each pair of reg classes,
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a largest reg class contained in their union. */
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extern enum reg_class reg_class_subunion[N_REG_CLASSES][N_REG_CLASSES];
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/* For each pair of reg classes,
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the smallest reg class that contains their union. */
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extern enum reg_class reg_class_superunion[N_REG_CLASSES][N_REG_CLASSES];
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/* Number of non-fixed registers. */
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extern int n_non_fixed_regs;
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/* Vector indexed by hardware reg giving its name. */
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extern char *reg_names[FIRST_PSEUDO_REGISTER];
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