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<HTML>
<HEAD>
<!-- This HTML file has been created by texi2html 1.52
from ../texi/as.texinfo on 24 April 1999 -->
<TITLE>Using as - Overview</TITLE>
</HEAD>
<BODY>
Go to the first, previous, <A HREF="as_2.html">next</A>, <A HREF="as_27.html">last</A> section, <A HREF="as_toc.html">table of contents</A>.
<P><HR><P>
<P>
The Free Software Foundation Inc. thanks The Nice Computer
Company of Australia for loaning Dean Elsner to write the
first (Vax) version of <CODE>as</CODE> for Project GNU.
The proprietors, management and staff of TNCCA thank FSF for
distracting the boss while they got some work
done.
<P>
</P>
<P>
Copyright (C) 1991, 92, 93, 94, 95, 96, 97, 1998 Free Software Foundation, Inc.
</P>
<P>
Permission is granted to make and distribute verbatim copies of
this manual provided the copyright notice and this permission notice
are preserved on all copies.
</P>
<P>
Permission is granted to copy and distribute modified versions of this manual
under the conditions for verbatim copying, provided that the entire resulting
derived work is distributed under the terms of a permission notice identical to
this one.
</P>
<P>
Permission is granted to copy and distribute translations of this manual
into another language, under the above conditions for modified versions.
</P>
<H1><A NAME="SEC1" HREF="as_toc.html#TOC1">Overview</A></H1>
<P>
This manual is a user guide to the GNU assembler <CODE>as</CODE>.
</P>
<P>
<A NAME="IDX1"></A>
<A NAME="IDX2"></A>
<A NAME="IDX3"></A>
Here is a brief summary of how to invoke <CODE>as</CODE>. For details,
see section <A HREF="as_2.html#SEC9">Command-Line Options</A>.
</P>
<PRE>
as [ -a[cdhlns][=file] ] [ -D ] [ --defsym <VAR>sym</VAR>=<VAR>val</VAR> ]
[ -f ] [ --gstabs ] [ --help ] [ -I <VAR>dir</VAR> ] [ -J ] [ -K ] [ -L ]
[ --keep-locals ] [ -o <VAR>objfile</VAR> ] [ -R ] [ --statistics ] [ -v ]
[ -version ] [ --version ] [ -W ] [ -w ] [ -x ] [ -Z ]
[ -mbig-endian | -mlittle-endian ]
[ -m[arm]1 | -m[arm]2 | -m[arm]250 | -m[arm]3 | -m[arm]6 | -m[arm]7[t][[d]m[i]] ]
[ -m[arm]v2 | -m[arm]v2a | -m[arm]v3 | -m[arm]v3m | -m[arm]v4 | -m[arm]v4t ]
[ -mthumb | -mall ]
[ -mfpa10 | -mfpa11 | -mfpe-old | -mno-fpu ]
[ -EB | -EL ]
[ -mapcs-32 | -mapcs-26 ]
[ -O ]
[ -Av6 | -Av7 | -Av8 | -Asparclet | -Asparclite
-Av8plus | -Av8plusa | -Av9 | -Av9a ]
[ -xarch=v8plus | -xarch=v8plusa ] [ -bump ] [ -32 | -64 ]
[ -ACA | -ACA_A | -ACB | -ACC | -AKA | -AKB | -AKC | -AMC ]
[ -b ] [ -no-relax ]
[ -l ] [ -m68000 | -m68010 | -m68020 | ... ]
[ -nocpp ] [ -EL ] [ -EB ] [ -G <VAR>num</VAR> ] [ -mcpu=<VAR>CPU</VAR> ]
[ -mips1 ] [ -mips2 ] [ -mips3 ] [ -m4650 ] [ -no-m4650 ]
[ --trap ] [ --break ]
[ --emulation=<VAR>name</VAR> ]
[ -- | <VAR>files</VAR> ... ]
</PRE>
<DL COMPACT>
<DT><CODE>-a[cdhlmns]</CODE>
<DD>
Turn on listings, in any of a variety of ways:
<DL COMPACT>
<DT><CODE>-ac</CODE>
<DD>
omit false conditionals
<DT><CODE>-ad</CODE>
<DD>
omit debugging directives
<DT><CODE>-ah</CODE>
<DD>
include high-level source
<DT><CODE>-al</CODE>
<DD>
include assembly
<DT><CODE>-am</CODE>
<DD>
include macro expansions
<DT><CODE>-an</CODE>
<DD>
omit forms processing
<DT><CODE>-as</CODE>
<DD>
include symbols
<DT><CODE>=file</CODE>
<DD>
set the name of the listing file
</DL>
You may combine these options; for example, use <SAMP>`-aln'</SAMP> for assembly
listing without forms processing. The <SAMP>`=file'</SAMP> option, if used, must be
the last one. By itself, <SAMP>`-a'</SAMP> defaults to <SAMP>`-ahls'</SAMP>.
<DT><CODE>-D</CODE>
<DD>
Ignored. This option is accepted for script compatibility with calls to
other assemblers.
<DT><CODE>--defsym <VAR>sym</VAR>=<VAR>value</VAR></CODE>
<DD>
Define the symbol <VAR>sym</VAR> to be <VAR>value</VAR> before assembling the input file.
<VAR>value</VAR> must be an integer constant. As in C, a leading <SAMP>`0x'</SAMP>
indicates a hexadecimal value, and a leading <SAMP>`0'</SAMP> indicates an octal value.
<DT><CODE>-f</CODE>
<DD>
"fast"---skip whitespace and comment preprocessing (assume source is
compiler output).
<DT><CODE>--gstabs</CODE>
<DD>
Generate stabs debugging information for each assembler line. This
may help debugging assembler code, if the debugger can handle it.
<DT><CODE>--help</CODE>
<DD>
Print a summary of the command line options and exit.
<DT><CODE>-I <VAR>dir</VAR></CODE>
<DD>
Add directory <VAR>dir</VAR> to the search list for <CODE>.include</CODE> directives.
<DT><CODE>-J</CODE>
<DD>
Don't warn about signed overflow.
<DT><CODE>-K</CODE>
<DD>
Issue warnings when difference tables altered for long displacements.
<DT><CODE>-L</CODE>
<DD>
<DT><CODE>--keep-locals</CODE>
<DD>
Keep (in the symbol table) local symbols. On traditional a.out systems
these start with <SAMP>`L'</SAMP>, but different systems have different local
label prefixes.
<DT><CODE>-o <VAR>objfile</VAR></CODE>
<DD>
Name the object-file output from <CODE>as</CODE> <VAR>objfile</VAR>.
<DT><CODE>-R</CODE>
<DD>
Fold the data section into the text section.
<DT><CODE>--statistics</CODE>
<DD>
Print the maximum space (in bytes) and total time (in seconds) used by
assembly.
<DT><CODE>--strip-local-absolute</CODE>
<DD>
Remove local absolute symbols from the outgoing symbol table.
<DT><CODE>-v</CODE>
<DD>
<DT><CODE>-version</CODE>
<DD>
Print the <CODE>as</CODE> version.
<DT><CODE>--version</CODE>
<DD>
Print the <CODE>as</CODE> version and exit.
<DT><CODE>-W</CODE>
<DD>
Suppress warning messages.
<DT><CODE>-w</CODE>
<DD>
Ignored.
<DT><CODE>-x</CODE>
<DD>
Ignored.
<DT><CODE>-Z</CODE>
<DD>
Generate an object file even after errors.
<DT><CODE>-- | <VAR>files</VAR> ...</CODE>
<DD>
Standard input, or source files to assemble.
</DL>
<P>
The following options are available when as is configured for
an ARC processor.
</P>
<DL COMPACT>
<DT><CODE>-mbig-endian</CODE>
<DD>
<A NAME="IDX4"></A>
<A NAME="IDX5"></A>
<A NAME="IDX6"></A>
Generate "big endian" format output.
<A NAME="IDX7"></A>
<DT><CODE>-mlittle-endian</CODE>
<DD>
Generate "little endian" format output.
</DL>
<P>
The following options are available when as is configured for the ARM
processor family.
</P>
<DL COMPACT>
<DT><CODE>-m[arm]1 | -m[arm]2 | -m[arm]250 | -m[arm]3 | -m[arm]6 | -m[arm]7[t][[d]m] | -m[arm]v2 | -m[arm]v2a | -m[arm]v3 | -m[arm]v3m | -m[arm]v4 | -m[arm]v4t</CODE>
<DD>
Specify which variant of the ARM architecture is the target.
<DT><CODE>-mthumb | -mall</CODE>
<DD>
Enable or disable Thumb only instruction decoding.
<DT><CODE>-mfpa10 | -mfpa11 | -mfpe-old | -mno-fpu</CODE>
<DD>
Select which Floating Point architcture is the target.
<DT><CODE>-mapcs-32 | -mapcs-26</CODE>
<DD>
Select which procedure calling convention is in use.
<DT><CODE>-EB | -EL</CODE>
<DD>
Select either big-endian (-EB) or little-endian (-EL) output.
</DL>
<P>
The following options are available when as is configured for
a D10V processor.
<DL COMPACT>
<DT><CODE>-O</CODE>
<DD>
<A NAME="IDX8"></A>
<A NAME="IDX9"></A>
Optimize output by parallelizing instructions.
</DL>
<P>
The following options are available when as is configured for the
Intel 80960 processor.
</P>
<DL COMPACT>
<DT><CODE>-ACA | -ACA_A | -ACB | -ACC | -AKA | -AKB | -AKC | -AMC</CODE>
<DD>
Specify which variant of the 960 architecture is the target.
<DT><CODE>-b</CODE>
<DD>
Add code to collect statistics about branches taken.
<DT><CODE>-no-relax</CODE>
<DD>
Do not alter compare-and-branch instructions for long displacements;
error if necessary.
</DL>
<P>
The following options are available when as is configured for the
Motorola 68000 series.
</P>
<DL COMPACT>
<DT><CODE>-l</CODE>
<DD>
Shorten references to undefined symbols, to one word instead of two.
<DT><CODE>-m68000 | -m68008 | -m68010 | -m68020 | -m68030 | -m68040 | -m68060</CODE>
<DD>
<DT><CODE>| -m68302 | -m68331 | -m68332 | -m68333 | -m68340 | -mcpu32 | -m5200</CODE>
<DD>
Specify what processor in the 68000 family is the target. The default
is normally the 68020, but this can be changed at configuration time.
<DT><CODE>-m68881 | -m68882 | -mno-68881 | -mno-68882</CODE>
<DD>
The target machine does (or does not) have a floating-point coprocessor.
The default is to assume a coprocessor for 68020, 68030, and cpu32. Although
the basic 68000 is not compatible with the 68881, a combination of the
two can be specified, since it's possible to do emulation of the
coprocessor instructions with the main processor.
<DT><CODE>-m68851 | -mno-68851</CODE>
<DD>
The target machine does (or does not) have a memory-management
unit coprocessor. The default is to assume an MMU for 68020 and up.
</DL>
<P>
The following options are available when <CODE>as</CODE> is configured
for the SPARC architecture:
</P>
<DL COMPACT>
<DT><CODE>-Av6 | -Av7 | -Av8 | -Asparclet | -Asparclite</CODE>
<DD>
<DT><CODE>-Av8plus | -Av8plusa | -Av9 | -Av9a</CODE>
<DD>
Explicitly select a variant of the SPARC architecture.
<SAMP>`-Av8plus'</SAMP> and <SAMP>`-Av8plusa'</SAMP> select a 32 bit environment.
<SAMP>`-Av9'</SAMP> and <SAMP>`-Av9a'</SAMP> select a 64 bit environment.
<SAMP>`-Av8plusa'</SAMP> and <SAMP>`-Av9a'</SAMP> enable the SPARC V9 instruction set with
UltraSPARC extensions.
<DT><CODE>-xarch=v8plus | -xarch=v8plusa</CODE>
<DD>
For compatibility with the Solaris v9 assembler. These options are
equivalent to -Av8plus and -Av8plusa, respectively.
<DT><CODE>-bump</CODE>
<DD>
Warn when the assembler switches to another architecture.
</DL>
<P>
The following options are available when as is configured for
a MIPS processor.
</P>
<DL COMPACT>
<DT><CODE>-G <VAR>num</VAR></CODE>
<DD>
This option sets the largest size of an object that can be referenced
implicitly with the <CODE>gp</CODE> register. It is only accepted for targets that
use ECOFF format, such as a DECstation running Ultrix. The default value is 8.
<A NAME="IDX10"></A>
<A NAME="IDX11"></A>
<A NAME="IDX12"></A>
<DT><CODE>-EB</CODE>
<DD>
Generate "big endian" format output.
<A NAME="IDX13"></A>
<DT><CODE>-EL</CODE>
<DD>
Generate "little endian" format output.
<A NAME="IDX14"></A>
<DT><CODE>-mips1</CODE>
<DD>
<DT><CODE>-mips2</CODE>
<DD>
<DT><CODE>-mips3</CODE>
<DD>
Generate code for a particular MIPS Instruction Set Architecture level.
<SAMP>`-mips1'</SAMP> corresponds to the R2000 and R3000 processors,
<SAMP>`-mips2'</SAMP> to the R6000 processor, and <SAMP>`-mips3'</SAMP> to the R4000
processor.
<DT><CODE>-m4650</CODE>
<DD>
<DT><CODE>-no-m4650</CODE>
<DD>
Generate code for the MIPS R4650 chip. This tells the assembler to accept
the <SAMP>`mad'</SAMP> and <SAMP>`madu'</SAMP> instruction, and to not schedule <SAMP>`nop'</SAMP>
instructions around accesses to the <SAMP>`HI'</SAMP> and <SAMP>`LO'</SAMP> registers.
<SAMP>`-no-m4650'</SAMP> turns off this option.
<DT><CODE>-mcpu=<VAR>CPU</VAR></CODE>
<DD>
Generate code for a particular MIPS cpu. This has little effect on the
assembler, but it is passed by <CODE>gcc</CODE>.
<A NAME="IDX15"></A>
<DT><CODE>--emulation=<VAR>name</VAR></CODE>
<DD>
This option causes <CODE>as</CODE> to emulate <CODE>as</CODE> configured
for some other target, in all respects, including output format (choosing
between ELF and ECOFF only), handling of pseudo-opcodes which may generate
debugging information or store symbol table information, and default
endianness. The available configuration names are: <SAMP>`mipsecoff'</SAMP>,
<SAMP>`mipself'</SAMP>, <SAMP>`mipslecoff'</SAMP>, <SAMP>`mipsbecoff'</SAMP>, <SAMP>`mipslelf'</SAMP>,
<SAMP>`mipsbelf'</SAMP>. The first two do not alter the default endianness from that
of the primary target for which the assembler was configured; the others change
the default to little- or big-endian as indicated by the <SAMP>`b'</SAMP> or <SAMP>`l'</SAMP>
in the name. Using <SAMP>`-EB'</SAMP> or <SAMP>`-EL'</SAMP> will override the endianness
selection in any case.
This option is currently supported only when the primary target
<CODE>as</CODE> is configured for is a MIPS ELF or ECOFF target.
Furthermore, the primary target or others specified with
<SAMP>`--enable-targets=...'</SAMP> at configuration time must include support for
the other format, if both are to be available. For example, the Irix 5
configuration includes support for both.
Eventually, this option will support more configurations, with more
fine-grained control over the assembler's behavior, and will be supported for
more processors.
<DT><CODE>-nocpp</CODE>
<DD>
<CODE>as</CODE> ignores this option. It is accepted for compatibility with
the native tools.
<DT><CODE>--trap</CODE>
<DD>
<DT><CODE>--no-trap</CODE>
<DD>
<DT><CODE>--break</CODE>
<DD>
<DT><CODE>--no-break</CODE>
<DD>
Control how to deal with multiplication overflow and division by zero.
<SAMP>`--trap'</SAMP> or <SAMP>`--no-break'</SAMP> (which are synonyms) take a trap exception
(and only work for Instruction Set Architecture level 2 and higher);
<SAMP>`--break'</SAMP> or <SAMP>`--no-trap'</SAMP> (also synonyms, and the default) take a
break exception.
</DL>
<H2><A NAME="SEC2" HREF="as_toc.html#TOC2">Structure of this Manual</A></H2>
<P>
<A NAME="IDX16"></A>
This manual is intended to describe what you need to know to use
GNU <CODE>as</CODE>. We cover the syntax expected in source files, including
notation for symbols, constants, and expressions; the directives that
<CODE>as</CODE> understands; and of course how to invoke <CODE>as</CODE>.
</P>
<P>
This manual also describes some of the machine-dependent features of
various flavors of the assembler.
</P>
<P>
<A NAME="IDX17"></A>
On the other hand, this manual is <EM>not</EM> intended as an introduction
to programming in assembly language--let alone programming in general!
In a similar vein, we make no attempt to introduce the machine
architecture; we do <EM>not</EM> describe the instruction set, standard
mnemonics, registers or addressing modes that are standard to a
particular architecture.
You may want to consult the manufacturer's
machine architecture manual for this information.
</P>
<H2><A NAME="SEC3" HREF="as_toc.html#TOC3">The GNU Assembler</A></H2>
<P>
GNU <CODE>as</CODE> is really a family of assemblers.
If you use (or have used) the GNU assembler on one architecture, you
should find a fairly similar environment when you use it on another
architecture. Each version has much in common with the others,
including object file formats, most assembler directives (often called
<EM>pseudo-ops</EM>) and assembler syntax.
</P>
<P>
<A NAME="IDX18"></A>
<CODE>as</CODE> is primarily intended to assemble the output of the
GNU C compiler <CODE>gcc</CODE> for use by the linker
<CODE>ld</CODE>. Nevertheless, we've tried to make <CODE>as</CODE>
assemble correctly everything that other assemblers for the same
machine would assemble.
Any exceptions are documented explicitly (see section <A HREF="as_8.html#SEC138">Machine Dependent Features</A>).
This doesn't mean <CODE>as</CODE> always uses the same syntax as another
assembler for the same architecture; for example, we know of several
incompatible versions of 680x0 assembly language syntax.
</P>
<P>
Unlike older assemblers, <CODE>as</CODE> is designed to assemble a source
program in one pass of the source file. This has a subtle impact on the
<KBD>.org</KBD> directive (see section <A HREF="as_7.html#SEC112"><CODE>.org <VAR>new-lc</CODE> , <VAR>fill</VAR></VAR></A>).
</P>
<H2><A NAME="SEC4" HREF="as_toc.html#TOC4">Object File Formats</A></H2>
<P>
<A NAME="IDX19"></A>
The GNU assembler can be configured to produce several alternative
object file formats. For the most part, this does not affect how you
write assembly language programs; but directives for debugging symbols
are typically different in different file formats. See section <A HREF="as_5.html#SEC50">Symbol Attributes</A>.
On the machine specific, <CODE>as</CODE> can be configured to produce either
<CODE>a.out</CODE> or COFF format object files.
On the machine specific, <CODE>as</CODE> can be configured to produce either
<CODE>b.out</CODE> or COFF format object files.
On the machine specific, <CODE>as</CODE> can be configured to produce either
SOM or ELF format object files.
</P>
<H2><A NAME="SEC5" HREF="as_toc.html#TOC5">Command Line</A></H2>
<P>
<A NAME="IDX20"></A>
After the program name <CODE>as</CODE>, the command line may contain
options and file names. Options may appear in any order, and may be
before, after, or between file names. The order of file names is
significant.
</P>
<P>
<A NAME="IDX21"></A>
<A NAME="IDX22"></A>
<TT>`--'</TT> (two hyphens) by itself names the standard input file
explicitly, as one of the files for <CODE>as</CODE> to assemble.
</P>
<P>
<A NAME="IDX23"></A>
Except for <SAMP>`--'</SAMP> any command line argument that begins with a
hyphen (<SAMP>`-'</SAMP>) is an option. Each option changes the behavior of
<CODE>as</CODE>. No option changes the way another option works. An
option is a <SAMP>`-'</SAMP> followed by one or more letters; the case of
the letter is important. All options are optional.
</P>
<P>
Some options expect exactly one file name to follow them. The file
name may either immediately follow the option's letter (compatible
with older assemblers) or it may be the next command argument (GNU
standard). These two command lines are equivalent:
</P>
<PRE>
as -o my-object-file.o mumble.s
as -omy-object-file.o mumble.s
</PRE>
<H2><A NAME="SEC6" HREF="as_toc.html#TOC6">Input Files</A></H2>
<P>
<A NAME="IDX24"></A>
<A NAME="IDX25"></A>
<A NAME="IDX26"></A>
We use the phrase <EM>source program</EM>, abbreviated <EM>source</EM>, to
describe the program input to one run of <CODE>as</CODE>. The program may
be in one or more files; how the source is partitioned into files
doesn't change the meaning of the source.
</P>
<P>
The source program is a concatenation of the text in all the files, in the
order specified.
</P>
<P>
Each time you run <CODE>as</CODE> it assembles exactly one source
program. The source program is made up of one or more files.
(The standard input is also a file.)
</P>
<P>
You give <CODE>as</CODE> a command line that has zero or more input file
names. The input files are read (from left file name to right). A
command line argument (in any position) that has no special meaning
is taken to be an input file name.
</P>
<P>
If you give <CODE>as</CODE> no file names it attempts to read one input file
from the <CODE>as</CODE> standard input, which is normally your terminal. You
may have to type <KBD>ctl-D</KBD> to tell <CODE>as</CODE> there is no more program
to assemble.
</P>
<P>
Use <SAMP>`--'</SAMP> if you need to explicitly name the standard input file
in your command line.
</P>
<P>
If the source is empty, <CODE>as</CODE> produces a small, empty object
file.
</P>
<H3>Filenames and Line-numbers</H3>
<P>
<A NAME="IDX27"></A>
<A NAME="IDX28"></A>
There are two ways of locating a line in the input file (or files) and
either may be used in reporting error messages. One way refers to a line
number in a physical file; the other refers to a line number in a
"logical" file. See section <A HREF="as_1.html#SEC8">Error and Warning Messages</A>.
</P>
<P>
<EM>Physical files</EM> are those files named in the command line given
to <CODE>as</CODE>.
</P>
<P>
<EM>Logical files</EM> are simply names declared explicitly by assembler
directives; they bear no relation to physical files. Logical file names
help error messages reflect the original source file, when <CODE>as</CODE>
source is itself synthesized from other files.
See section <A HREF="as_7.html#SEC71"><CODE>.app-file <VAR>string</CODE></VAR></A>.
</P>
<H2><A NAME="SEC7" HREF="as_toc.html#TOC7">Output (Object) File</A></H2>
<P>
<A NAME="IDX29"></A>
<A NAME="IDX30"></A>
<A NAME="IDX31"></A>
<A NAME="IDX32"></A>
Every time you run <CODE>as</CODE> it produces an output file, which is
your assembly language program translated into numbers. This file
is the object file. Its default name is
<CODE>a.out</CODE>, or
<CODE>b.out</CODE> when <CODE>as</CODE> is configured for the Intel 80960.
You can give it another name by using the <CODE>-o</CODE> option. Conventionally,
object file names end with <TT>`.o'</TT>. The default name is used for historical
reasons: older assemblers were capable of assembling self-contained programs
directly into a runnable program. (For some formats, this isn't currently
possible, but it can be done for the <CODE>a.out</CODE> format.)
</P>
<P>
<A NAME="IDX33"></A>
<A NAME="IDX34"></A>
The object file is meant for input to the linker <CODE>ld</CODE>. It contains
assembled program code, information to help <CODE>ld</CODE> integrate
the assembled program into a runnable file, and (optionally) symbolic
information for the debugger.
</P>
<H2><A NAME="SEC8" HREF="as_toc.html#TOC8">Error and Warning Messages</A></H2>
<P>
<A NAME="IDX35"></A>
<A NAME="IDX36"></A>
<A NAME="IDX37"></A>
<CODE>as</CODE> may write warnings and error messages to the standard error
file (usually your terminal). This should not happen when a compiler
runs <CODE>as</CODE> automatically. Warnings report an assumption made so
that <CODE>as</CODE> could keep assembling a flawed program; errors report a
grave problem that stops the assembly.
</P>
<P>
<A NAME="IDX38"></A>
Warning messages have the format
</P>
<PRE>
file_name:<B>NNN</B>:Warning Message Text
</PRE>
<P>
<A NAME="IDX39"></A>
(where <B>NNN</B> is a line number). If a logical file name has been given
(see section <A HREF="as_7.html#SEC71"><CODE>.app-file <VAR>string</CODE></VAR></A>) it is used for the filename,
otherwise the name of the current input file is used. If a logical line
number was given
(see section <A HREF="as_7.html#SEC103"><CODE>.line <VAR>line-number</CODE></VAR></A>)
(see section <A HREF="as_7.html#SEC105"><CODE>.ln <VAR>line-number</CODE></VAR></A>)
then it is used to calculate the number printed,
otherwise the actual line in the current source file is printed. The
message text is intended to be self explanatory (in the grand Unix
tradition).
</P>
<P>
<A NAME="IDX40"></A>
Error messages have the format
<PRE>
file_name:<B>NNN</B>:FATAL:Error Message Text
</PRE>
<P>
The file name and line number are derived as for warning
messages. The actual message text may be rather less explanatory
because many of them aren't supposed to happen.
</P>
<P><HR><P>
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<TITLE>Using as - AMD 29K Dependent Features</TITLE>
</HEAD>
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<P><HR><P>
<H1><A NAME="SEC143" HREF="as_toc.html#TOC143">AMD 29K Dependent Features</A></H1>
<P>
<A NAME="IDX433"></A>
<A NAME="IDX434"></A>
</P>
<H2><A NAME="SEC144" HREF="as_toc.html#TOC144">Options</A></H2>
<P>
<A NAME="IDX435"></A>
<A NAME="IDX436"></A>
<CODE>as</CODE> has no additional command-line options for the AMD
29K family.
</P>
<H2><A NAME="SEC145" HREF="as_toc.html#TOC145">Syntax</A></H2>
<H3><A NAME="SEC146" HREF="as_toc.html#TOC146">Macros</A></H3>
<P>
<A NAME="IDX437"></A>
<A NAME="IDX438"></A>
The macro syntax used on the AMD 29K is like that described in the AMD
29K Family Macro Assembler Specification. Normal <CODE>as</CODE>
macros should still work.
</P>
<H3><A NAME="SEC147" HREF="as_toc.html#TOC147">Special Characters</A></H3>
<P>
<A NAME="IDX439"></A>
<A NAME="IDX440"></A>
<SAMP>`;'</SAMP> is the line comment character.
</P>
<P>
<A NAME="IDX441"></A>
<A NAME="IDX442"></A>
The character <SAMP>`?'</SAMP> is permitted in identifiers (but may not begin
an identifier).
</P>
<H3><A NAME="SEC148" HREF="as_toc.html#TOC148">Register Names</A></H3>
<P>
<A NAME="IDX443"></A>
<A NAME="IDX444"></A>
General-purpose registers are represented by predefined symbols of the
form <SAMP>`GR<VAR>nnn</VAR>'</SAMP> (for global registers) or <SAMP>`LR<VAR>nnn</VAR>'</SAMP>
(for local registers), where <VAR>nnn</VAR> represents a number between
<CODE>0</CODE> and <CODE>127</CODE>, written with no leading zeros. The leading
letters may be in either upper or lower case; for example, <SAMP>`gr13'</SAMP>
and <SAMP>`LR7'</SAMP> are both valid register names.
</P>
<P>
You may also refer to general-purpose registers by specifying the
register number as the result of an expression (prefixed with <SAMP>`%%'</SAMP>
to flag the expression as a register number):
<PRE>
%%<VAR>expression</VAR>
</PRE>
<P>
---where <VAR>expression</VAR> must be an absolute expression evaluating to a
number between <CODE>0</CODE> and <CODE>255</CODE>. The range [0, 127] refers to
global registers, and the range [128, 255] to local registers.
</P>
<P>
<A NAME="IDX445"></A>
<A NAME="IDX446"></A>
<A NAME="IDX447"></A>
<A NAME="IDX448"></A>
In addition, <CODE>as</CODE> understands the following protected
special-purpose register names for the AMD 29K family:
</P>
<PRE>
vab chd pc0
ops chc pc1
cps rbp pc2
cfg tmc mmu
cha tmr lru
</PRE>
<P>
These unprotected special-purpose register names are also recognized:
<PRE>
ipc alu fpe
ipa bp inte
ipb fc fps
q cr exop
</PRE>
<H2><A NAME="SEC149" HREF="as_toc.html#TOC149">Floating Point</A></H2>
<P>
<A NAME="IDX449"></A>
<A NAME="IDX450"></A>
The AMD 29K family uses IEEE floating-point numbers.
</P>
<H2><A NAME="SEC150" HREF="as_toc.html#TOC150">AMD 29K Machine Directives</A></H2>
<P>
<A NAME="IDX451"></A>
<A NAME="IDX452"></A>
<DL COMPACT>
<DT><CODE>.block <VAR>size</VAR> , <VAR>fill</VAR></CODE>
<DD>
<A NAME="IDX453"></A>
This directive emits <VAR>size</VAR> bytes, each of value <VAR>fill</VAR>. Both
<VAR>size</VAR> and <VAR>fill</VAR> are absolute expressions. If the comma
and <VAR>fill</VAR> are omitted, <VAR>fill</VAR> is assumed to be zero.
In other versions of the GNU assembler, this directive is called
<SAMP>`.space'</SAMP>.
</DL>
<DL COMPACT>
<DT><CODE>.cputype</CODE>
<DD>
<A NAME="IDX454"></A>
This directive is ignored; it is accepted for compatibility with other
AMD 29K assemblers.
<A NAME="IDX455"></A>
<DT><CODE>.file</CODE>
<DD>
This directive is ignored; it is accepted for compatibility with other
AMD 29K assemblers.
<BLOCKQUOTE>
<P>
<EM>Warning:</EM> in other versions of the GNU assembler, <CODE>.file</CODE> is
used for the directive called <CODE>.app-file</CODE> in the AMD 29K support.
</BLOCKQUOTE>
<A NAME="IDX456"></A>
<DT><CODE>.line</CODE>
<DD>
This directive is ignored; it is accepted for compatibility with other
AMD 29K assemblers.
<A NAME="IDX457"></A>
<DT><CODE>.sect</CODE>
<DD>
This directive is ignored; it is accepted for compatibility with other
AMD 29K assemblers.
<A NAME="IDX458"></A>
<DT><CODE>.use <VAR>section name</VAR></CODE>
<DD>
Establishes the section and subsection for the following code;
<VAR>section name</VAR> may be one of <CODE>.text</CODE>, <CODE>.data</CODE>,
<CODE>.data1</CODE>, or <CODE>.lit</CODE>. With one of the first three <VAR>section
name</VAR> options, <SAMP>`.use'</SAMP> is equivalent to the machine directive
<VAR>section name</VAR>; the remaining case, <SAMP>`.use .lit'</SAMP>, is the same as
<SAMP>`.data 200'</SAMP>.
</DL>
<H2><A NAME="SEC151" HREF="as_toc.html#TOC151">Opcodes</A></H2>
<P>
<A NAME="IDX459"></A>
<A NAME="IDX460"></A>
<CODE>as</CODE> implements all the standard AMD 29K opcodes. No
additional pseudo-instructions are needed on this family.
</P>
<P>
For information on the 29K machine instruction set, see <CITE>Am29000
User's Manual</CITE>, Advanced Micro Devices, Inc.
</P>
<P><HR><P>
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<TITLE>Using as - ARM Dependent Features</TITLE>
</HEAD>
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<P><HR><P>
<H1><A NAME="SEC152" HREF="as_toc.html#TOC152">ARM Dependent Features</A></H1>
<P>
<A NAME="IDX461"></A>
<A NAME="IDX462"></A>
</P>
<H2><A NAME="SEC153" HREF="as_toc.html#TOC153">Options</A></H2>
<P>
<A NAME="IDX463"></A>
<A NAME="IDX464"></A>
<DL COMPACT>
<DT><CODE>-marm <VAR>[2|250|3|6|60|600|610|620|7|7m|7d|7dm|7di|7dmi|70|700|700i|710|710c|7100|7500|7500fe|7tdmi|8|strongarm|strongarm110]</VAR></CODE>
<DD>
<A NAME="IDX465"></A>
This option specifies the target processor. The assembler will issue an
error message if an attempt is made to assemble an instruction which
will not execute on the target processor.
<A NAME="IDX466"></A>
<DT><CODE>-marmv <VAR>[2|2a|3|3m|4|4t]</VAR></CODE>
<DD>
This option specifies the target architecture. The assembler will issue
an error message if an attempt is made to assemble an instruction which
will not execute on the target architecture.
<A NAME="IDX467"></A>
<DT><CODE>-mthumb</CODE>
<DD>
This option specifies that only Thumb instructions should be assembled.
<A NAME="IDX468"></A>
<DT><CODE>-mall</CODE>
<DD>
This option specifies that any Arm or Thumb instruction should be assembled.
<A NAME="IDX469"></A>
<DT><CODE>-mfpa <VAR>[10|11]</VAR></CODE>
<DD>
This option specifies the floating point architecture in use on the
target processor.
<A NAME="IDX470"></A>
<DT><CODE>-mfpe-old</CODE>
<DD>
Do not allow the assemble of floating point multiple instructions.
<A NAME="IDX471"></A>
<DT><CODE>-mno-fpu</CODE>
<DD>
Do not allow the assembly of any floating point instructions.
<A NAME="IDX472"></A>
<DT><CODE>-mthumb-interwork</CODE>
<DD>
This option specifies that the output generated by the assembler should
be marked as supporting interworking.
<A NAME="IDX473"></A>
<DT><CODE>-mapcs <VAR>[26|32]</VAR></CODE>
<DD>
This option specifies that the output generated by the assembler should
be marked as supporting the indicated version of the Arm Procedure.
Calling Standard.
<A NAME="IDX474"></A>
<DT><CODE>-EB</CODE>
<DD>
This option specifies that the output generated by the assembler should
be marked as being encoded for a big-endian processor.
<A NAME="IDX475"></A>
<DT><CODE>-EL</CODE>
<DD>
This option specifies that the output generated by the assembler should
be marked as being encoded for a little-endian processor.
</DL>
<H2><A NAME="SEC154" HREF="as_toc.html#TOC154">Syntax</A></H2>
<H3><A NAME="SEC155" HREF="as_toc.html#TOC155">Special Characters</A></H3>
<P>
<A NAME="IDX476"></A>
<A NAME="IDX477"></A>
<SAMP>`;'</SAMP> is the line comment character.
</P>
<P>
<A NAME="IDX478"></A>
<A NAME="IDX479"></A>
*TODO* Explain about /data modifier on symbols.
</P>
<H3><A NAME="SEC156" HREF="as_toc.html#TOC156">Register Names</A></H3>
<P>
<A NAME="IDX480"></A>
<A NAME="IDX481"></A>
*TODO* Explain about ARM register naming, and the predefined names.
</P>
<H2><A NAME="SEC157" HREF="as_toc.html#TOC157">Floating Point</A></H2>
<P>
<A NAME="IDX482"></A>
<A NAME="IDX483"></A>
The ARM family uses IEEE floating-point numbers.
</P>
<H2><A NAME="SEC158" HREF="as_toc.html#TOC158">ARM Machine Directives</A></H2>
<P>
<A NAME="IDX484"></A>
<A NAME="IDX485"></A>
<DL COMPACT>
<DT><CODE>.code <VAR>[16|32]</VAR></CODE>
<DD>
<A NAME="IDX486"></A>
This directive selects the instruction set being generated. The value 16
selects Thumb, with the value 32 selecting ARM.
<A NAME="IDX487"></A>
<DT><CODE>.thumb</CODE>
<DD>
This performs the same action as <VAR>.code 16</VAR>.
<A NAME="IDX488"></A>
<DT><CODE>.arm</CODE>
<DD>
This performs the same action as <VAR>.code 32</VAR>.
<A NAME="IDX489"></A>
<DT><CODE>.force_thumb</CODE>
<DD>
This directive forces the selection of Thumb instructions, even if the
target processor does not support those instructions
<A NAME="IDX490"></A>
<DT><CODE>.thumb_func</CODE>
<DD>
This directive specifies that the following symbol is the name of a
Thumb encoded function. This information is necessary in order to allow
the assembler and linker to generate correct code for interworking
between Arm and Thumb instructions and should be used even if
interworking is not going to be performed.
</DL>
<H2><A NAME="SEC159" HREF="as_toc.html#TOC159">Opcodes</A></H2>
<P>
<A NAME="IDX491"></A>
<A NAME="IDX492"></A>
<CODE>as</CODE> implements all the standard ARM opcodes.
</P>
<P>
*TODO* Document the pseudo-ops (adr, nop)
</P>
<P>
For information on the ARM or Thumb instruction sets, see <CITE>ARM
Software Development Toolkit Reference Manual</CITE>, Advanced RISC Machines
Ltd.
</P>
<P><HR><P>
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<TITLE>Using as - D10V Dependent Features</TITLE>
</HEAD>
<BODY>
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<P><HR><P>
<H1><A NAME="SEC160" HREF="as_toc.html#TOC160">D10V Dependent Features</A></H1>
<P>
<A NAME="IDX493"></A>
</P>
<H2><A NAME="SEC161" HREF="as_toc.html#TOC161">D10V Options</A></H2>
<P>
<A NAME="IDX494"></A>
<A NAME="IDX495"></A>
The Mitsubishi D10V version of <CODE>as</CODE> has a few machine
dependent options.
</P>
<DL COMPACT>
<DT><SAMP>`-O'</SAMP>
<DD>
The D10V can often execute two sub-instructions in parallel. When this option
is used, <CODE>as</CODE> will attempt to optimize its output by detecting when
instructions can be executed in parallel.
<DT><SAMP>`--nowarnswap'</SAMP>
<DD>
To optimize execution performance, <CODE>as</CODE> will sometimes swap the
order of instructions. Normally this generates a warning. When this option
is used, no warning will be generated when instructions are swapped.
</DL>
<H2><A NAME="SEC162" HREF="as_toc.html#TOC162">Syntax</A></H2>
<P>
<A NAME="IDX496"></A>
<A NAME="IDX497"></A>
</P>
<P>
The D10V syntax is based on the syntax in Mitsubishi's D10V architecture manual.
The differences are detailed below.
</P>
<H3><A NAME="SEC163" HREF="as_toc.html#TOC163">Size Modifiers</A></H3>
<P>
<A NAME="IDX498"></A>
<A NAME="IDX499"></A>
The D10V version of <CODE>as</CODE> uses the instruction names in the D10V
Architecture Manual. However, the names in the manual are sometimes ambiguous.
There are instruction names that can assemble to a short or long form opcode.
How does the assembler pick the correct form? <CODE>as</CODE> will always pick the
smallest form if it can. When dealing with a symbol that is not defined yet when a
line is being assembled, it will always use the long form. If you need to force the
assembler to use either the short or long form of the instruction, you can append
either <SAMP>`.s'</SAMP> (short) or <SAMP>`.l'</SAMP> (long) to it. For example, if you are writing
an assembly program and you want to do a branch to a symbol that is defined later
in your program, you can write <SAMP>`bra.s foo'</SAMP>.
Objdump and GDB will always append <SAMP>`.s'</SAMP> or <SAMP>`.l'</SAMP> to instructions which
have both short and long forms.
</P>
<H3><A NAME="SEC164" HREF="as_toc.html#TOC164">Sub-Instructions</A></H3>
<P>
<A NAME="IDX500"></A>
<A NAME="IDX501"></A>
The D10V assembler takes as input a series of instructions, either one-per-line,
or in the special two-per-line format described in the next section. Some of these
instructions will be short-form or sub-instructions. These sub-instructions can be packed
into a single instruction. The assembler will do this automatically. It will also detect
when it should not pack instructions. For example, when a label is defined, the next
instruction will never be packaged with the previous one. Whenever a branch and link
instruction is called, it will not be packaged with the next instruction so the return
address will be valid. Nops are automatically inserted when necessary.
</P>
<P>
If you do not want the assembler automatically making these decisions, you can control
the packaging and execution type (parallel or sequential) with the special execution
symbols described in the next section.
</P>
<H3><A NAME="SEC165" HREF="as_toc.html#TOC165">Special Characters</A></H3>
<P>
<A NAME="IDX502"></A>
<A NAME="IDX503"></A>
<SAMP>`;'</SAMP> and <SAMP>`#'</SAMP> are the line comment characters.
<A NAME="IDX504"></A>
<A NAME="IDX505"></A>
Sub-instructions may be executed in order, in reverse-order, or in parallel.
Instructions listed in the standard one-per-line format will be executed sequentially.
To specify the executing order, use the following symbols:
<DL COMPACT>
<DT><SAMP>`-&#62;'</SAMP>
<DD>
Sequential with instruction on the left first.
<DT><SAMP>`&#60;-'</SAMP>
<DD>
Sequential with instruction on the right first.
<DT><SAMP>`||'</SAMP>
<DD>
Parallel
</DL>
<P>
The D10V syntax allows either one instruction per line, one instruction per line with
the execution symbol, or two instructions per line. For example
<DL COMPACT>
<DT><CODE>abs a1 -&#62; abs r0</CODE>
<DD>
Execute these sequentially. The instruction on the right is in the right
container and is executed second.
<DT><CODE>abs r0 &#60;- abs a1</CODE>
<DD>
Execute these reverse-sequentially. The instruction on the right is in the right
container, and is executed first.
<DT><CODE>ld2w r2,@r8+ || mac a0,r0,r7</CODE>
<DD>
Execute these in parallel.
<DT><CODE>ld2w r2,@r8+ ||</CODE>
<DD>
<DT><CODE>mac a0,r0,r7</CODE>
<DD>
Two-line format. Execute these in parallel.
<DT><CODE>ld2w r2,@r8+</CODE>
<DD>
<DT><CODE>mac a0,r0,r7</CODE>
<DD>
Two-line format. Execute these sequentially. Assembler will
put them in the proper containers.
<DT><CODE>ld2w r2,@r8+ -&#62;</CODE>
<DD>
<DT><CODE>mac a0,r0,r7</CODE>
<DD>
Two-line format. Execute these sequentially. Same as above but
second instruction will always go into right container.
</DL>
<P>
<A NAME="IDX506"></A>
<A NAME="IDX507"></A>
Since <SAMP>`$'</SAMP> has no special meaning, you may use it in symbol names.
</P>
<H3><A NAME="SEC166" HREF="as_toc.html#TOC166">Register Names</A></H3>
<P>
<A NAME="IDX508"></A>
<A NAME="IDX509"></A>
You can use the predefined symbols <SAMP>`r0'</SAMP> through <SAMP>`r15'</SAMP> to refer to the D10V
registers. You can also use <SAMP>`sp'</SAMP> as an alias for <SAMP>`r15'</SAMP>. The accumulators
are <SAMP>`a0'</SAMP> and <SAMP>`a1'</SAMP>. There are special register-pair names that may
optionally be used in opcodes that require even-numbered registers. Register names are
not case sensitive.
</P>
<P>
Register Pairs
<DL COMPACT>
<DT><CODE>r0-r1</CODE>
<DD>
<DT><CODE>r2-r3</CODE>
<DD>
<DT><CODE>r4-r5</CODE>
<DD>
<DT><CODE>r6-r7</CODE>
<DD>
<DT><CODE>r8-r9</CODE>
<DD>
<DT><CODE>r10-r11</CODE>
<DD>
<DT><CODE>r12-r13</CODE>
<DD>
<DT><CODE>r14-r15</CODE>
<DD>
</DL>
<P>
The D10V also has predefined symbols for these control registers and status bits:
<DL COMPACT>
<DT><CODE>psw</CODE>
<DD>
Processor Status Word
<DT><CODE>bpsw</CODE>
<DD>
Backup Processor Status Word
<DT><CODE>pc</CODE>
<DD>
Program Counter
<DT><CODE>bpc</CODE>
<DD>
Backup Program Counter
<DT><CODE>rpt_c</CODE>
<DD>
Repeat Count
<DT><CODE>rpt_s</CODE>
<DD>
Repeat Start address
<DT><CODE>rpt_e</CODE>
<DD>
Repeat End address
<DT><CODE>mod_s</CODE>
<DD>
Modulo Start address
<DT><CODE>mod_e</CODE>
<DD>
Modulo End address
<DT><CODE>iba</CODE>
<DD>
Instruction Break Address
<DT><CODE>f0</CODE>
<DD>
Flag 0
<DT><CODE>f1</CODE>
<DD>
Flag 1
<DT><CODE>c</CODE>
<DD>
Carry flag
</DL>
<P>
<H3><A NAME="SEC167" HREF="as_toc.html#TOC167">Addressing Modes</A></H3>
<P>
<A NAME="IDX510"></A>
<A NAME="IDX511"></A>
<CODE>as</CODE> understands the following addressing modes for the D10V.
<CODE>R<VAR>n</VAR></CODE> in the following refers to any of the numbered
registers, but <EM>not</EM> the control registers.
<DL COMPACT>
<DT><CODE>R<VAR>n</VAR></CODE>
<DD>
Register direct
<DT><CODE>@R<VAR>n</VAR></CODE>
<DD>
Register indirect
<DT><CODE>@R<VAR>n</VAR>+</CODE>
<DD>
Register indirect with post-increment
<DT><CODE>@R<VAR>n</VAR>-</CODE>
<DD>
Register indirect with post-decrement
<DT><CODE>@-SP</CODE>
<DD>
Register indirect with pre-decrement
<DT><CODE>@(<VAR>disp</VAR>, R<VAR>n</VAR>)</CODE>
<DD>
Register indirect with displacement
<DT><CODE><VAR>addr</VAR></CODE>
<DD>
PC relative address (for branch or rep).
<DT><CODE>#<VAR>imm</VAR></CODE>
<DD>
Immediate data (the <SAMP>`#'</SAMP> is optional and ignored)
</DL>
<H3><A NAME="SEC168" HREF="as_toc.html#TOC168">@WORD Modifier</A></H3>
<P>
<A NAME="IDX512"></A>
<A NAME="IDX513"></A>
Any symbol followed by <CODE>@word</CODE> will be replaced by the symbol's value
shifted right by 2. This is used in situations such as loading a register
with the address of a function (or any other code fragment). For example, if
you want to load a register with the location of the function <CODE>main</CODE> then
jump to that function, you could do it as follws:
<PRE>
ldi r2, main@word
jmp r2
</PRE>
<H2><A NAME="SEC169" HREF="as_toc.html#TOC169">Floating Point</A></H2>
<P>
<A NAME="IDX514"></A>
<A NAME="IDX515"></A>
The D10V has no hardware floating point, but the <CODE>.float</CODE> and <CODE>.double</CODE>
directives generates IEEE floating-point numbers for compatibility
with other development tools.
</P>
<H2><A NAME="SEC170" HREF="as_toc.html#TOC170">Opcodes</A></H2>
<P>
<A NAME="IDX516"></A>
<A NAME="IDX517"></A>
<A NAME="IDX518"></A>
<A NAME="IDX519"></A>
For detailed information on the D10V machine instruction set, see
<CITE>D10V Architecture: A VLIW Microprocessor for Multimedia Applications</CITE>
(Mitsubishi Electric Corp.).
<CODE>as</CODE> implements all the standard D10V opcodes. The only changes are those
described in the section on size modifiers
</P>
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</HEAD>
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Go to the <A HREF="as_1.html">first</A>, <A HREF="as_12.html">previous</A>, <A HREF="as_14.html">next</A>, <A HREF="as_27.html">last</A> section, <A HREF="as_toc.html">table of contents</A>.
<P><HR><P>
<H1><A NAME="SEC171" HREF="as_toc.html#TOC171">H8/300 Dependent Features</A></H1>
<P>
<A NAME="IDX520"></A>
</P>
<H2><A NAME="SEC172" HREF="as_toc.html#TOC172">Options</A></H2>
<P>
<A NAME="IDX521"></A>
<A NAME="IDX522"></A>
<CODE>as</CODE> has no additional command-line options for the Hitachi
H8/300 family.
</P>
<H2><A NAME="SEC173" HREF="as_toc.html#TOC173">Syntax</A></H2>
<H3><A NAME="SEC174" HREF="as_toc.html#TOC174">Special Characters</A></H3>
<P>
<A NAME="IDX523"></A>
<A NAME="IDX524"></A>
<SAMP>`;'</SAMP> is the line comment character.
</P>
<P>
<A NAME="IDX525"></A>
<A NAME="IDX526"></A>
<A NAME="IDX527"></A>
<SAMP>`$'</SAMP> can be used instead of a newline to separate statements.
Therefore <EM>you may not use <SAMP>`$'</SAMP> in symbol names</EM> on the H8/300.
</P>
<H3><A NAME="SEC175" HREF="as_toc.html#TOC175">Register Names</A></H3>
<P>
<A NAME="IDX528"></A>
<A NAME="IDX529"></A>
You can use predefined symbols of the form <SAMP>`r<VAR>n</VAR>h'</SAMP> and
<SAMP>`r<VAR>n</VAR>l'</SAMP> to refer to the H8/300 registers as sixteen 8-bit
general-purpose registers. <VAR>n</VAR> is a digit from <SAMP>`0'</SAMP> to
<SAMP>`7'</SAMP>); for instance, both <SAMP>`r0h'</SAMP> and <SAMP>`r7l'</SAMP> are valid
register names.
</P>
<P>
You can also use the eight predefined symbols <SAMP>`r<VAR>n</VAR>'</SAMP> to refer
to the H8/300 registers as 16-bit registers (you must use this form for
addressing).
</P>
<P>
On the H8/300H, you can also use the eight predefined symbols
<SAMP>`er<VAR>n</VAR>'</SAMP> (<SAMP>`er0'</SAMP> ... <SAMP>`er7'</SAMP>) to refer to the 32-bit
general purpose registers.
</P>
<P>
The two control registers are called <CODE>pc</CODE> (program counter; a
16-bit register, except on the H8/300H where it is 24 bits) and
<CODE>ccr</CODE> (condition code register; an 8-bit register). <CODE>r7</CODE> is
used as the stack pointer, and can also be called <CODE>sp</CODE>.
</P>
<H3><A NAME="SEC176" HREF="as_toc.html#TOC176">Addressing Modes</A></H3>
<P>
<A NAME="IDX530"></A>
<A NAME="IDX531"></A>
as understands the following addressing modes for the H8/300:
<DL COMPACT>
<DT><CODE>r<VAR>n</VAR></CODE>
<DD>
Register direct
<DT><CODE>@r<VAR>n</VAR></CODE>
<DD>
Register indirect
<DT><CODE>@(<VAR>d</VAR>, r<VAR>n</VAR>)</CODE>
<DD>
<DT><CODE>@(<VAR>d</VAR>:16, r<VAR>n</VAR>)</CODE>
<DD>
<DT><CODE>@(<VAR>d</VAR>:24, r<VAR>n</VAR>)</CODE>
<DD>
Register indirect: 16-bit or 24-bit displacement <VAR>d</VAR> from register
<VAR>n</VAR>. (24-bit displacements are only meaningful on the H8/300H.)
<DT><CODE>@r<VAR>n</VAR>+</CODE>
<DD>
Register indirect with post-increment
<DT><CODE>@-r<VAR>n</VAR></CODE>
<DD>
Register indirect with pre-decrement
<DT><CODE><CODE>@</CODE><VAR>aa</VAR></CODE>
<DD>
<DT><CODE><CODE>@</CODE><VAR>aa</VAR>:8</CODE>
<DD>
<DT><CODE><CODE>@</CODE><VAR>aa</VAR>:16</CODE>
<DD>
<DT><CODE><CODE>@</CODE><VAR>aa</VAR>:24</CODE>
<DD>
Absolute address <CODE>aa</CODE>. (The address size <SAMP>`:24'</SAMP> only makes
sense on the H8/300H.)
<DT><CODE>#<VAR>xx</VAR></CODE>
<DD>
<DT><CODE>#<VAR>xx</VAR>:8</CODE>
<DD>
<DT><CODE>#<VAR>xx</VAR>:16</CODE>
<DD>
<DT><CODE>#<VAR>xx</VAR>:32</CODE>
<DD>
Immediate data <VAR>xx</VAR>. You may specify the <SAMP>`:8'</SAMP>, <SAMP>`:16'</SAMP>, or
<SAMP>`:32'</SAMP> for clarity, if you wish; but <CODE>as</CODE> neither
requires this nor uses it--the data size required is taken from
context.
<DT><CODE><CODE>@</CODE><CODE>@</CODE><VAR>aa</VAR></CODE>
<DD>
<DT><CODE><CODE>@</CODE><CODE>@</CODE><VAR>aa</VAR>:8</CODE>
<DD>
Memory indirect. You may specify the <SAMP>`:8'</SAMP> for clarity, if you
wish; but <CODE>as</CODE> neither requires this nor uses it.
</DL>
<H2><A NAME="SEC177" HREF="as_toc.html#TOC177">Floating Point</A></H2>
<P>
<A NAME="IDX532"></A>
<A NAME="IDX533"></A>
The H8/300 family has no hardware floating point, but the <CODE>.float</CODE>
directive generates IEEE floating-point numbers for compatibility
with other development tools.
</P>
<H2><A NAME="SEC178" HREF="as_toc.html#TOC178">H8/300 Machine Directives</A></H2>
<P>
<A NAME="IDX534"></A>
<A NAME="IDX535"></A>
<A NAME="IDX536"></A>
<A NAME="IDX537"></A>
<CODE>as</CODE> has only one machine-dependent directive for the
H8/300:
</P>
<DL COMPACT>
<DT><CODE>.h8300h</CODE>
<DD>
<A NAME="IDX538"></A>
Recognize and emit additional instructions for the H8/300H variant, and
also make <CODE>.int</CODE> emit 32-bit numbers rather than the usual (16-bit)
for the H8/300 family.
</DL>
<P>
On the H8/300 family (including the H8/300H) <SAMP>`.word'</SAMP> directives
generate 16-bit numbers.
</P>
<H2><A NAME="SEC179" HREF="as_toc.html#TOC179">Opcodes</A></H2>
<P>
<A NAME="IDX539"></A>
<A NAME="IDX540"></A>
<A NAME="IDX541"></A>
<A NAME="IDX542"></A>
For detailed information on the H8/300 machine instruction set, see
<CITE>H8/300 Series Programming Manual</CITE> (Hitachi ADE--602--025). For
information specific to the H8/300H, see <CITE>H8/300H Series
Programming Manual</CITE> (Hitachi).
</P>
<P>
<CODE>as</CODE> implements all the standard H8/300 opcodes. No additional
pseudo-instructions are needed on this family.
</P>
<P>
<A NAME="IDX543"></A>
<A NAME="IDX544"></A>
Four H8/300 instructions (<CODE>add</CODE>, <CODE>cmp</CODE>, <CODE>mov</CODE>,
<CODE>sub</CODE>) are defined with variants using the suffixes <SAMP>`.b'</SAMP>,
<SAMP>`.w'</SAMP>, and <SAMP>`.l'</SAMP> to specify the size of a memory operand.
<CODE>as</CODE> supports these suffixes, but does not require them;
since one of the operands is always a register, <CODE>as</CODE> can
deduce the correct size.
</P>
<P>
For example, since <CODE>r0</CODE> refers to a 16-bit register,
<PRE>
mov r0,@foo
is equivalent to
mov.w r0,@foo
</PRE>
<P>
If you use the size suffixes, <CODE>as</CODE> issues a warning when
the suffix and the register size do not match.
</P>
<P><HR><P>
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<TITLE>Using as - H8/500 Dependent Features</TITLE>
</HEAD>
<BODY>
Go to the <A HREF="as_1.html">first</A>, <A HREF="as_13.html">previous</A>, <A HREF="as_15.html">next</A>, <A HREF="as_27.html">last</A> section, <A HREF="as_toc.html">table of contents</A>.
<P><HR><P>
<H1><A NAME="SEC180" HREF="as_toc.html#TOC180">H8/500 Dependent Features</A></H1>
<P>
<A NAME="IDX545"></A>
</P>
<H2><A NAME="SEC181" HREF="as_toc.html#TOC181">Options</A></H2>
<P>
<A NAME="IDX546"></A>
<A NAME="IDX547"></A>
<CODE>as</CODE> has no additional command-line options for the Hitachi
H8/500 family.
</P>
<H2><A NAME="SEC182" HREF="as_toc.html#TOC182">Syntax</A></H2>
<H3><A NAME="SEC183" HREF="as_toc.html#TOC183">Special Characters</A></H3>
<P>
<A NAME="IDX548"></A>
<A NAME="IDX549"></A>
<SAMP>`!'</SAMP> is the line comment character.
</P>
<P>
<A NAME="IDX550"></A>
<A NAME="IDX551"></A>
<A NAME="IDX552"></A>
<SAMP>`;'</SAMP> can be used instead of a newline to separate statements.
</P>
<P>
<A NAME="IDX553"></A>
<A NAME="IDX554"></A>
Since <SAMP>`$'</SAMP> has no special meaning, you may use it in symbol names.
</P>
<H3><A NAME="SEC184" HREF="as_toc.html#TOC184">Register Names</A></H3>
<P>
<A NAME="IDX555"></A>
<A NAME="IDX556"></A>
You can use the predefined symbols <SAMP>`r0'</SAMP>, <SAMP>`r1'</SAMP>, <SAMP>`r2'</SAMP>,
<SAMP>`r3'</SAMP>, <SAMP>`r4'</SAMP>, <SAMP>`r5'</SAMP>, <SAMP>`r6'</SAMP>, and <SAMP>`r7'</SAMP> to refer to
the H8/500 registers.
</P>
<P>
The H8/500 also has these control registers:
</P>
<DL COMPACT>
<DT><CODE>cp</CODE>
<DD>
code pointer
<DT><CODE>dp</CODE>
<DD>
data pointer
<DT><CODE>bp</CODE>
<DD>
base pointer
<DT><CODE>tp</CODE>
<DD>
stack top pointer
<DT><CODE>ep</CODE>
<DD>
extra pointer
<DT><CODE>sr</CODE>
<DD>
status register
<DT><CODE>ccr</CODE>
<DD>
condition code register
</DL>
<P>
All registers are 16 bits long. To represent 32 bit numbers, use two
adjacent registers; for distant memory addresses, use one of the segment
pointers (<CODE>cp</CODE> for the program counter; <CODE>dp</CODE> for
<CODE>r0</CODE>--<CODE>r3</CODE>; <CODE>ep</CODE> for <CODE>r4</CODE> and <CODE>r5</CODE>; and
<CODE>tp</CODE> for <CODE>r6</CODE> and <CODE>r7</CODE>.
</P>
<H3><A NAME="SEC185" HREF="as_toc.html#TOC185">Addressing Modes</A></H3>
<P>
<A NAME="IDX557"></A>
<A NAME="IDX558"></A>
as understands the following addressing modes for the H8/500:
<DL COMPACT>
<DT><CODE>R<VAR>n</VAR></CODE>
<DD>
Register direct
<DT><CODE>@R<VAR>n</VAR></CODE>
<DD>
Register indirect
<DT><CODE>@(d:8, R<VAR>n</VAR>)</CODE>
<DD>
Register indirect with 8 bit signed displacement
<DT><CODE>@(d:16, R<VAR>n</VAR>)</CODE>
<DD>
Register indirect with 16 bit signed displacement
<DT><CODE>@-R<VAR>n</VAR></CODE>
<DD>
Register indirect with pre-decrement
<DT><CODE>@R<VAR>n</VAR>+</CODE>
<DD>
Register indirect with post-increment
<DT><CODE>@<VAR>aa</VAR>:8</CODE>
<DD>
8 bit absolute address
<DT><CODE>@<VAR>aa</VAR>:16</CODE>
<DD>
16 bit absolute address
<DT><CODE>#<VAR>xx</VAR>:8</CODE>
<DD>
8 bit immediate
<DT><CODE>#<VAR>xx</VAR>:16</CODE>
<DD>
16 bit immediate
</DL>
<H2><A NAME="SEC186" HREF="as_toc.html#TOC186">Floating Point</A></H2>
<P>
<A NAME="IDX559"></A>
<A NAME="IDX560"></A>
The H8/500 family has no hardware floating point, but the <CODE>.float</CODE>
directive generates IEEE floating-point numbers for compatibility
with other development tools.
</P>
<H2><A NAME="SEC187" HREF="as_toc.html#TOC187">H8/500 Machine Directives</A></H2>
<P>
<A NAME="IDX561"></A>
<A NAME="IDX562"></A>
<A NAME="IDX563"></A>
<A NAME="IDX564"></A>
<CODE>as</CODE> has no machine-dependent directives for the H8/500.
However, on this platform the <SAMP>`.int'</SAMP> and <SAMP>`.word'</SAMP> directives
generate 16-bit numbers.
</P>
<H2><A NAME="SEC188" HREF="as_toc.html#TOC188">Opcodes</A></H2>
<P>
<A NAME="IDX565"></A>
<A NAME="IDX566"></A>
<A NAME="IDX567"></A>
<A NAME="IDX568"></A>
For detailed information on the H8/500 machine instruction set, see
<CITE>H8/500 Series Programming Manual</CITE> (Hitachi M21T001).
</P>
<P>
<CODE>as</CODE> implements all the standard H8/500 opcodes. No additional
pseudo-instructions are needed on this family.
</P>
<P><HR><P>
Go to the <A HREF="as_1.html">first</A>, <A HREF="as_13.html">previous</A>, <A HREF="as_15.html">next</A>, <A HREF="as_27.html">last</A> section, <A HREF="as_toc.html">table of contents</A>.
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<HEAD>
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<TITLE>Using as - HPPA Dependent Features</TITLE>
</HEAD>
<BODY>
Go to the <A HREF="as_1.html">first</A>, <A HREF="as_14.html">previous</A>, <A HREF="as_16.html">next</A>, <A HREF="as_27.html">last</A> section, <A HREF="as_toc.html">table of contents</A>.
<P><HR><P>
<H1><A NAME="SEC189" HREF="as_toc.html#TOC189">HPPA Dependent Features</A></H1>
<P>
<A NAME="IDX569"></A>
</P>
<H2><A NAME="SEC190" HREF="as_toc.html#TOC190">Notes</A></H2>
<P>
As a back end for GNU CC <CODE>as</CODE> has been throughly tested and should
work extremely well. We have tested it only minimally on hand written assembly
code and no one has tested it much on the assembly output from the HP
compilers.
</P>
<P>
The format of the debugging sections has changed since the original
<CODE>as</CODE> port (version 1.3X) was released; therefore,
you must rebuild all HPPA objects and libraries with the new
assembler so that you can debug the final executable.
</P>
<P>
The HPPA <CODE>as</CODE> port generates a small subset of the relocations
available in the SOM and ELF object file formats. Additional relocation
support will be added as it becomes necessary.
</P>
<H2><A NAME="SEC191" HREF="as_toc.html#TOC191">Options</A></H2>
<P>
<CODE>as</CODE> has no machine-dependent command-line options for the HPPA.
</P>
<P>
<A NAME="IDX570"></A>
<H2><A NAME="SEC192" HREF="as_toc.html#TOC192">Syntax</A></H2>
<P>
The assembler syntax closely follows the HPPA instruction set
reference manual; assembler directives and general syntax closely follow the
HPPA assembly language reference manual, with a few noteworthy differences.
</P>
<P>
First, a colon may immediately follow a label definition. This is
simply for compatibility with how most assembly language programmers
write code.
</P>
<P>
Some obscure expression parsing problems may affect hand written code which
uses the <CODE>spop</CODE> instructions, or code which makes significant
use of the <CODE>!</CODE> line separator.
</P>
<P>
<CODE>as</CODE> is much less forgiving about missing arguments and other
similar oversights than the HP assembler. <CODE>as</CODE> notifies you
of missing arguments as syntax errors; this is regarded as a feature, not a
bug.
</P>
<P>
Finally, <CODE>as</CODE> allows you to use an external symbol without
explicitly importing the symbol. <EM>Warning:</EM> in the future this will be
an error for HPPA targets.
</P>
<P>
Special characters for HPPA targets include:
</P>
<P>
<SAMP>`;'</SAMP> is the line comment character.
</P>
<P>
<SAMP>`!'</SAMP> can be used instead of a newline to separate statements.
</P>
<P>
Since <SAMP>`$'</SAMP> has no special meaning, you may use it in symbol names.
</P>
<H2><A NAME="SEC193" HREF="as_toc.html#TOC193">Floating Point</A></H2>
<P>
<A NAME="IDX571"></A>
<A NAME="IDX572"></A>
The HPPA family uses IEEE floating-point numbers.
</P>
<H2><A NAME="SEC194" HREF="as_toc.html#TOC194">HPPA Assembler Directives</A></H2>
<P>
<CODE>as</CODE> for the HPPA supports many additional directives for
compatibility with the native assembler. This section describes them only
briefly. For detailed information on HPPA-specific assembler directives, see
<CITE>HP9000 Series 800 Assembly Language Reference Manual</CITE> (HP 92432-90001).
</P>
<P>
<A NAME="IDX573"></A>
<CODE>as</CODE> does <EM>not</EM> support the following assembler directives
described in the HP manual:
</P>
<PRE>
.endm .liston
.enter .locct
.leave .macro
.listoff
</PRE>
<P>
<A NAME="IDX574"></A>
Beyond those implemented for compatibility, <CODE>as</CODE> supports one
additional assembler directive for the HPPA: <CODE>.param</CODE>. It conveys
register argument locations for static functions. Its syntax closely follows
the <CODE>.export</CODE> directive.
</P>
<P>
<A NAME="IDX575"></A>
These are the additional directives in <CODE>as</CODE> for the HPPA:
</P>
<DL COMPACT>
<DT><CODE>.block <VAR>n</VAR></CODE>
<DD>
<DT><CODE>.blockz <VAR>n</VAR></CODE>
<DD>
Reserve <VAR>n</VAR> bytes of storage, and initialize them to zero.
<DT><CODE>.call</CODE>
<DD>
Mark the beginning of a procedure call. Only the special case with <EM>no
arguments</EM> is allowed.
<DT><CODE>.callinfo [ <VAR>param</VAR>=<VAR>value</VAR>, ... ] [ <VAR>flag</VAR>, ... ]</CODE>
<DD>
Specify a number of parameters and flags that define the environment for a
procedure.
<VAR>param</VAR> may be any of <SAMP>`frame'</SAMP> (frame size), <SAMP>`entry_gr'</SAMP> (end of
general register range), <SAMP>`entry_fr'</SAMP> (end of float register range),
<SAMP>`entry_sr'</SAMP> (end of space register range).
The values for <VAR>flag</VAR> are <SAMP>`calls'</SAMP> or <SAMP>`caller'</SAMP> (proc has
subroutines), <SAMP>`no_calls'</SAMP> (proc does not call subroutines), <SAMP>`save_rp'</SAMP>
(preserve return pointer), <SAMP>`save_sp'</SAMP> (proc preserves stack pointer),
<SAMP>`no_unwind'</SAMP> (do not unwind this proc), <SAMP>`hpux_int'</SAMP> (proc is interrupt
routine).
<DT><CODE>.code</CODE>
<DD>
Assemble into the standard section called <SAMP>`$TEXT$'</SAMP>, subsection
<SAMP>`$CODE$'</SAMP>.
<DT><CODE>.copyright "<VAR>string</VAR>"</CODE>
<DD>
In the SOM object format, insert <VAR>string</VAR> into the object code, marked as a
copyright string.
<DT><CODE>.copyright "<VAR>string</VAR>"</CODE>
<DD>
In the ELF object format, insert <VAR>string</VAR> into the object code, marked as a
version string.
<DT><CODE>.enter</CODE>
<DD>
Not yet supported; the assembler rejects programs containing this directive.
<DT><CODE>.entry</CODE>
<DD>
Mark the beginning of a procedure.
<DT><CODE>.exit</CODE>
<DD>
Mark the end of a procedure.
<DT><CODE>.export <VAR>name</VAR> [ ,<VAR>typ</VAR> ] [ ,<VAR>param</VAR>=<VAR>r</VAR> ]</CODE>
<DD>
Make a procedure <VAR>name</VAR> available to callers. <VAR>typ</VAR>, if present, must
be one of <SAMP>`absolute'</SAMP>, <SAMP>`code'</SAMP> (ELF only, not SOM), <SAMP>`data'</SAMP>,
<SAMP>`entry'</SAMP>, <SAMP>`data'</SAMP>, <SAMP>`entry'</SAMP>, <SAMP>`millicode'</SAMP>, <SAMP>`plabel'</SAMP>,
<SAMP>`pri_prog'</SAMP>, or <SAMP>`sec_prog'</SAMP>.
<VAR>param</VAR>, if present, provides either relocation information for the
procedure arguments and result, or a privilege level. <VAR>param</VAR> may be
<SAMP>`argw<VAR>n</VAR>'</SAMP> (where <VAR>n</VAR> ranges from <CODE>0</CODE> to <CODE>3</CODE>, and
indicates one of four one-word arguments); <SAMP>`rtnval'</SAMP> (the procedure's
result); or <SAMP>`priv_lev'</SAMP> (privilege level). For arguments or the result,
<VAR>r</VAR> specifies how to relocate, and must be one of <SAMP>`no'</SAMP> (not
relocatable), <SAMP>`gr'</SAMP> (argument is in general register), <SAMP>`fr'</SAMP> (in
floating point register), or <SAMP>`fu'</SAMP> (upper half of float register).
For <SAMP>`priv_lev'</SAMP>, <VAR>r</VAR> is an integer.
<DT><CODE>.half <VAR>n</VAR></CODE>
<DD>
Define a two-byte integer constant <VAR>n</VAR>; synonym for the portable
<CODE>as</CODE> directive <CODE>.short</CODE>.
<DT><CODE>.import <VAR>name</VAR> [ ,<VAR>typ</VAR> ]</CODE>
<DD>
Converse of <CODE>.export</CODE>; make a procedure available to call. The arguments
use the same conventions as the first two arguments for <CODE>.export</CODE>.
<DT><CODE>.label <VAR>name</VAR></CODE>
<DD>
Define <VAR>name</VAR> as a label for the current assembly location.
<DT><CODE>.leave</CODE>
<DD>
Not yet supported; the assembler rejects programs containing this directive.
<DT><CODE>.origin <VAR>lc</VAR></CODE>
<DD>
Advance location counter to <VAR>lc</VAR>. Synonym for the <CODE></CODE>
portable directive <CODE>.org</CODE>.
<DT><CODE>.param <VAR>name</VAR> [ ,<VAR>typ</VAR> ] [ ,<VAR>param</VAR>=<VAR>r</VAR> ]</CODE>
<DD>
Similar to <CODE>.export</CODE>, but used for static procedures.
<DT><CODE>.proc</CODE>
<DD>
Use preceding the first statement of a procedure.
<DT><CODE>.procend</CODE>
<DD>
Use following the last statement of a procedure.
<DT><CODE><VAR>label</VAR> .reg <VAR>expr</VAR></CODE>
<DD>
Synonym for <CODE>.equ</CODE>; define <VAR>label</VAR> with the absolute expression
<VAR>expr</VAR> as its value.
<DT><CODE>.space <VAR>secname</VAR> [ ,<VAR>params</VAR> ]</CODE>
<DD>
Switch to section <VAR>secname</VAR>, creating a new section by that name if
necessary. You may only use <VAR>params</VAR> when creating a new section, not
when switching to an existing one. <VAR>secname</VAR> may identify a section by
number rather than by name.
If specified, the list <VAR>params</VAR> declares attributes of the section,
identified by keywords. The keywords recognized are <SAMP>`spnum=<VAR>exp</VAR>'</SAMP>
(identify this section by the number <VAR>exp</VAR>, an absolute expression),
<SAMP>`sort=<VAR>exp</VAR>'</SAMP> (order sections according to this sort key when linking;
<VAR>exp</VAR> is an absolute expression), <SAMP>`unloadable'</SAMP> (section contains no
loadable data), <SAMP>`notdefined'</SAMP> (this section defined elsewhere), and
<SAMP>`private'</SAMP> (data in this section not available to other programs).
<DT><CODE>.spnum <VAR>secnam</VAR></CODE>
<DD>
Allocate four bytes of storage, and initialize them with the section number of
the section named <VAR>secnam</VAR>. (You can define the section number with the
HPPA <CODE>.space</CODE> directive.)
<A NAME="IDX576"></A>
<DT><CODE>.string "<VAR>str</VAR>"</CODE>
<DD>
Copy the characters in the string <VAR>str</VAR> to the object file.
See section <A HREF="as_3.html#SEC33">Strings</A>, for information on escape sequences you can use in
<CODE>as</CODE> strings.
<EM>Warning!</EM> The HPPA version of <CODE>.string</CODE> differs from the
usual <CODE>as</CODE> definition: it does <EM>not</EM> write a zero byte
after copying <VAR>str</VAR>.
<DT><CODE>.stringz "<VAR>str</VAR>"</CODE>
<DD>
Like <CODE>.string</CODE>, but appends a zero byte after copying <VAR>str</VAR> to object
file.
<DT><CODE>.subspa <VAR>name</VAR> [ ,<VAR>params</VAR> ]</CODE>
<DD>
<DT><CODE>.nsubspa <VAR>name</VAR> [ ,<VAR>params</VAR> ]</CODE>
<DD>
Similar to <CODE>.space</CODE>, but selects a subsection <VAR>name</VAR> within the
current section. You may only specify <VAR>params</VAR> when you create a
subsection (in the first instance of <CODE>.subspa</CODE> for this <VAR>name</VAR>).
If specified, the list <VAR>params</VAR> declares attributes of the subsection,
identified by keywords. The keywords recognized are <SAMP>`quad=<VAR>expr</VAR>'</SAMP>
("quadrant" for this subsection), <SAMP>`align=<VAR>expr</VAR>'</SAMP> (alignment for
beginning of this subsection; a power of two), <SAMP>`access=<VAR>expr</VAR>'</SAMP> (value
for "access rights" field), <SAMP>`sort=<VAR>expr</VAR>'</SAMP> (sorting order for this
subspace in link), <SAMP>`code_only'</SAMP> (subsection contains only code),
<SAMP>`unloadable'</SAMP> (subsection cannot be loaded into memory), <SAMP>`common'</SAMP>
(subsection is common block), <SAMP>`dup_comm'</SAMP> (initialized data may have
duplicate names), or <SAMP>`zero'</SAMP> (subsection is all zeros, do not write in
object file).
<CODE>.nsubspa</CODE> always creates a new subspace with the given name, even
if one with the same name already exists.
<DT><CODE>.version "<VAR>str</VAR>"</CODE>
<DD>
Write <VAR>str</VAR> as version identifier in object code.
</DL>
<H2><A NAME="SEC195" HREF="as_toc.html#TOC195">Opcodes</A></H2>
<P>
For detailed information on the HPPA machine instruction set, see
<CITE>PA-RISC Architecture and Instruction Set Reference Manual</CITE>
(HP 09740-90039).
</P>
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<TITLE>Using as - 80386 Dependent Features</TITLE>
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<P><HR><P>
<H1><A NAME="SEC196" HREF="as_toc.html#TOC196">80386 Dependent Features</A></H1>
<P>
<A NAME="IDX577"></A>
<A NAME="IDX578"></A>
</P>
<H2><A NAME="SEC197" HREF="as_toc.html#TOC197">Options</A></H2>
<P>
<A NAME="IDX579"></A>
<A NAME="IDX580"></A>
The 80386 has no machine dependent options.
</P>
<H2><A NAME="SEC198" HREF="as_toc.html#TOC198">AT&#38;T Syntax versus Intel Syntax</A></H2>
<P>
<A NAME="IDX581"></A>
<A NAME="IDX582"></A>
In order to maintain compatibility with the output of <CODE>gcc</CODE>,
<CODE>as</CODE> supports AT&#38;T System V/386 assembler syntax. This is quite
different from Intel syntax. We mention these differences because
almost all 80386 documents used only Intel syntax. Notable differences
between the two syntaxes are:
</P>
<P>
<A NAME="IDX583"></A>
<A NAME="IDX584"></A>
<A NAME="IDX585"></A>
<A NAME="IDX586"></A>
<A NAME="IDX587"></A>
<A NAME="IDX588"></A>
<A NAME="IDX589"></A>
<UL>
<LI>
AT&#38;T immediate operands are preceded by <SAMP>`$'</SAMP>; Intel immediate
operands are undelimited (Intel <SAMP>`push 4'</SAMP> is AT&#38;T <SAMP>`pushl $4'</SAMP>).
AT&#38;T register operands are preceded by <SAMP>`%'</SAMP>; Intel register operands
are undelimited. AT&#38;T absolute (as opposed to PC relative) jump/call
operands are prefixed by <SAMP>`*'</SAMP>; they are undelimited in Intel syntax.
<A NAME="IDX590"></A>
<A NAME="IDX591"></A>
<LI>
AT&#38;T and Intel syntax use the opposite order for source and destination
operands. Intel <SAMP>`add eax, 4'</SAMP> is <SAMP>`addl $4, %eax'</SAMP>. The
<SAMP>`source, dest'</SAMP> convention is maintained for compatibility with
previous Unix assemblers.
<A NAME="IDX592"></A>
<A NAME="IDX593"></A>
<A NAME="IDX594"></A>
<LI>
In AT&#38;T syntax the size of memory operands is determined from the last
character of the opcode name. Opcode suffixes of <SAMP>`b'</SAMP>, <SAMP>`w'</SAMP>,
and <SAMP>`l'</SAMP> specify byte (8-bit), word (16-bit), and long (32-bit)
memory references. Intel syntax accomplishes this by prefixes memory
operands (<EM>not</EM> the opcodes themselves) with <SAMP>`byte ptr'</SAMP>,
<SAMP>`word ptr'</SAMP>, and <SAMP>`dword ptr'</SAMP>. Thus, Intel <SAMP>`mov al, byte
ptr <VAR>foo</VAR>'</SAMP> is <SAMP>`movb <VAR>foo</VAR>, %al'</SAMP> in AT&#38;T syntax.
<A NAME="IDX595"></A>
<A NAME="IDX596"></A>
<LI>
Immediate form long jumps and calls are
<SAMP>`lcall/ljmp $<VAR>section</VAR>, $<VAR>offset</VAR>'</SAMP> in AT&#38;T syntax; the
Intel syntax is
<SAMP>`call/jmp far <VAR>section</VAR>:<VAR>offset</VAR>'</SAMP>. Also, the far return
instruction
is <SAMP>`lret $<VAR>stack-adjust</VAR>'</SAMP> in AT&#38;T syntax; Intel syntax is
<SAMP>`ret far <VAR>stack-adjust</VAR>'</SAMP>.
<A NAME="IDX597"></A>
<A NAME="IDX598"></A>
<LI>
The AT&#38;T assembler does not provide support for multiple section
programs. Unix style systems expect all programs to be single sections.
</UL>
<H2><A NAME="SEC199" HREF="as_toc.html#TOC199">Opcode Naming</A></H2>
<P>
<A NAME="IDX599"></A>
<A NAME="IDX600"></A>
Opcode names are suffixed with one character modifiers which specify the
size of operands. The letters <SAMP>`b'</SAMP>, <SAMP>`w'</SAMP>, and <SAMP>`l'</SAMP> specify
byte, word, and long operands. If no suffix is specified by an
instruction and it contains no memory operands then <CODE>as</CODE> tries to
fill in the missing suffix based on the destination register operand
(the last one by convention). Thus, <SAMP>`mov %ax, %bx'</SAMP> is equivalent
to <SAMP>`movw %ax, %bx'</SAMP>; also, <SAMP>`mov $1, %bx'</SAMP> is equivalent to
<SAMP>`movw $1, %bx'</SAMP>. Note that this is incompatible with the AT&#38;T Unix
assembler which assumes that a missing opcode suffix implies long
operand size. (This incompatibility does not affect compiler output
since compilers always explicitly specify the opcode suffix.)
</P>
<P>
Almost all opcodes have the same names in AT&#38;T and Intel format. There
are a few exceptions. The sign extend and zero extend instructions need
two sizes to specify them. They need a size to sign/zero extend
<EM>from</EM> and a size to zero extend <EM>to</EM>. This is accomplished
by using two opcode suffixes in AT&#38;T syntax. Base names for sign extend
and zero extend are <SAMP>`movs...'</SAMP> and <SAMP>`movz...'</SAMP> in AT&#38;T
syntax (<SAMP>`movsx'</SAMP> and <SAMP>`movzx'</SAMP> in Intel syntax). The opcode
suffixes are tacked on to this base name, the <EM>from</EM> suffix before
the <EM>to</EM> suffix. Thus, <SAMP>`movsbl %al, %edx'</SAMP> is AT&#38;T syntax for
"move sign extend <EM>from</EM> %al <EM>to</EM> %edx." Possible suffixes,
thus, are <SAMP>`bl'</SAMP> (from byte to long), <SAMP>`bw'</SAMP> (from byte to word),
and <SAMP>`wl'</SAMP> (from word to long).
</P>
<P>
<A NAME="IDX601"></A>
<A NAME="IDX602"></A>
The Intel-syntax conversion instructions
</P>
<UL>
<LI>
<SAMP>`cbw'</SAMP> -- sign-extend byte in <SAMP>`%al'</SAMP> to word in <SAMP>`%ax'</SAMP>,
<LI>
<SAMP>`cwde'</SAMP> -- sign-extend word in <SAMP>`%ax'</SAMP> to long in <SAMP>`%eax'</SAMP>,
<LI>
<SAMP>`cwd'</SAMP> -- sign-extend word in <SAMP>`%ax'</SAMP> to long in <SAMP>`%dx:%ax'</SAMP>,
<LI>
<SAMP>`cdq'</SAMP> -- sign-extend dword in <SAMP>`%eax'</SAMP> to quad in <SAMP>`%edx:%eax'</SAMP>,
</UL>
<P>
are called <SAMP>`cbtw'</SAMP>, <SAMP>`cwtl'</SAMP>, <SAMP>`cwtd'</SAMP>, and <SAMP>`cltd'</SAMP> in
AT&#38;T naming. <CODE>as</CODE> accepts either naming for these instructions.
</P>
<P>
<A NAME="IDX603"></A>
<A NAME="IDX604"></A>
Far call/jump instructions are <SAMP>`lcall'</SAMP> and <SAMP>`ljmp'</SAMP> in
AT&#38;T syntax, but are <SAMP>`call far'</SAMP> and <SAMP>`jump far'</SAMP> in Intel
convention.
</P>
<H2><A NAME="SEC200" HREF="as_toc.html#TOC200">Register Naming</A></H2>
<P>
<A NAME="IDX605"></A>
<A NAME="IDX606"></A>
Register operands are always prefixes with <SAMP>`%'</SAMP>. The 80386 registers
consist of
</P>
<UL>
<LI>
the 8 32-bit registers <SAMP>`%eax'</SAMP> (the accumulator), <SAMP>`%ebx'</SAMP>,
<SAMP>`%ecx'</SAMP>, <SAMP>`%edx'</SAMP>, <SAMP>`%edi'</SAMP>, <SAMP>`%esi'</SAMP>, <SAMP>`%ebp'</SAMP> (the
frame pointer), and <SAMP>`%esp'</SAMP> (the stack pointer).
<LI>
the 8 16-bit low-ends of these: <SAMP>`%ax'</SAMP>, <SAMP>`%bx'</SAMP>, <SAMP>`%cx'</SAMP>,
<SAMP>`%dx'</SAMP>, <SAMP>`%di'</SAMP>, <SAMP>`%si'</SAMP>, <SAMP>`%bp'</SAMP>, and <SAMP>`%sp'</SAMP>.
<LI>
the 8 8-bit registers: <SAMP>`%ah'</SAMP>, <SAMP>`%al'</SAMP>, <SAMP>`%bh'</SAMP>,
<SAMP>`%bl'</SAMP>, <SAMP>`%ch'</SAMP>, <SAMP>`%cl'</SAMP>, <SAMP>`%dh'</SAMP>, and <SAMP>`%dl'</SAMP> (These
are the high-bytes and low-bytes of <SAMP>`%ax'</SAMP>, <SAMP>`%bx'</SAMP>,
<SAMP>`%cx'</SAMP>, and <SAMP>`%dx'</SAMP>)
<LI>
the 6 section registers <SAMP>`%cs'</SAMP> (code section), <SAMP>`%ds'</SAMP>
(data section), <SAMP>`%ss'</SAMP> (stack section), <SAMP>`%es'</SAMP>, <SAMP>`%fs'</SAMP>,
and <SAMP>`%gs'</SAMP>.
<LI>
the 3 processor control registers <SAMP>`%cr0'</SAMP>, <SAMP>`%cr2'</SAMP>, and
<SAMP>`%cr3'</SAMP>.
<LI>
the 6 debug registers <SAMP>`%db0'</SAMP>, <SAMP>`%db1'</SAMP>, <SAMP>`%db2'</SAMP>,
<SAMP>`%db3'</SAMP>, <SAMP>`%db6'</SAMP>, and <SAMP>`%db7'</SAMP>.
<LI>
the 2 test registers <SAMP>`%tr6'</SAMP> and <SAMP>`%tr7'</SAMP>.
<LI>
the 8 floating point register stack <SAMP>`%st'</SAMP> or equivalently
<SAMP>`%st(0)'</SAMP>, <SAMP>`%st(1)'</SAMP>, <SAMP>`%st(2)'</SAMP>, <SAMP>`%st(3)'</SAMP>,
<SAMP>`%st(4)'</SAMP>, <SAMP>`%st(5)'</SAMP>, <SAMP>`%st(6)'</SAMP>, and <SAMP>`%st(7)'</SAMP>.
</UL>
<H2><A NAME="SEC201" HREF="as_toc.html#TOC201">Opcode Prefixes</A></H2>
<P>
<A NAME="IDX607"></A>
<A NAME="IDX608"></A>
<A NAME="IDX609"></A>
Opcode prefixes are used to modify the following opcode. They are used
to repeat string instructions, to provide section overrides, to perform
bus lock operations, and to give operand and address size (16-bit
operands are specified in an instruction by prefixing what would
normally be 32-bit operands with a "operand size" opcode prefix).
Opcode prefixes are usually given as single-line instructions with no
operands, and must directly precede the instruction they act upon. For
example, the <SAMP>`scas'</SAMP> (scan string) instruction is repeated with:
<PRE>
repne
scas
</PRE>
<P>
Here is a list of opcode prefixes:
</P>
<P>
<A NAME="IDX610"></A>
<UL>
<LI>
Section override prefixes <SAMP>`cs'</SAMP>, <SAMP>`ds'</SAMP>, <SAMP>`ss'</SAMP>, <SAMP>`es'</SAMP>,
<SAMP>`fs'</SAMP>, <SAMP>`gs'</SAMP>. These are automatically added by specifying
using the <VAR>section</VAR>:<VAR>memory-operand</VAR> form for memory references.
<A NAME="IDX611"></A>
<LI>
Operand/Address size prefixes <SAMP>`data16'</SAMP> and <SAMP>`addr16'</SAMP>
change 32-bit operands/addresses into 16-bit operands/addresses. Note
that 16-bit addressing modes (i.e. 8086 and 80286 addressing modes)
are not supported (yet).
<A NAME="IDX612"></A>
<A NAME="IDX613"></A>
<LI>
The bus lock prefix <SAMP>`lock'</SAMP> inhibits interrupts during
execution of the instruction it precedes. (This is only valid with
certain instructions; see a 80386 manual for details).
<A NAME="IDX614"></A>
<LI>
The wait for coprocessor prefix <SAMP>`wait'</SAMP> waits for the
coprocessor to complete the current instruction. This should never be
needed for the 80386/80387 combination.
<A NAME="IDX615"></A>
<LI>
The <SAMP>`rep'</SAMP>, <SAMP>`repe'</SAMP>, and <SAMP>`repne'</SAMP> prefixes are added
to string instructions to make them repeat <SAMP>`%ecx'</SAMP> times.
</UL>
<H2><A NAME="SEC202" HREF="as_toc.html#TOC202">Memory References</A></H2>
<P>
<A NAME="IDX616"></A>
<A NAME="IDX617"></A>
An Intel syntax indirect memory reference of the form
</P>
<PRE>
<VAR>section</VAR>:[<VAR>base</VAR> + <VAR>index</VAR>*<VAR>scale</VAR> + <VAR>disp</VAR>]
</PRE>
<P>
is translated into the AT&#38;T syntax
</P>
<PRE>
<VAR>section</VAR>:<VAR>disp</VAR>(<VAR>base</VAR>, <VAR>index</VAR>, <VAR>scale</VAR>)
</PRE>
<P>
where <VAR>base</VAR> and <VAR>index</VAR> are the optional 32-bit base and
index registers, <VAR>disp</VAR> is the optional displacement, and
<VAR>scale</VAR>, taking the values 1, 2, 4, and 8, multiplies <VAR>index</VAR>
to calculate the address of the operand. If no <VAR>scale</VAR> is
specified, <VAR>scale</VAR> is taken to be 1. <VAR>section</VAR> specifies the
optional section register for the memory operand, and may override the
default section register (see a 80386 manual for section register
defaults). Note that section overrides in AT&#38;T syntax <EM>must</EM> have
be preceded by a <SAMP>`%'</SAMP>. If you specify a section override which
coincides with the default section register, <CODE>as</CODE> does <EM>not</EM>
output any section register override prefixes to assemble the given
instruction. Thus, section overrides can be specified to emphasize which
section register is used for a given memory operand.
</P>
<P>
Here are some examples of Intel and AT&#38;T style memory references:
</P>
<DL COMPACT>
<DT>AT&#38;T: <SAMP>`-4(%ebp)'</SAMP>, Intel: <SAMP>`[ebp - 4]'</SAMP>
<DD>
<VAR>base</VAR> is <SAMP>`%ebp'</SAMP>; <VAR>disp</VAR> is <SAMP>`-4'</SAMP>. <VAR>section</VAR> is
missing, and the default section is used (<SAMP>`%ss'</SAMP> for addressing with
<SAMP>`%ebp'</SAMP> as the base register). <VAR>index</VAR>, <VAR>scale</VAR> are both missing.
<DT>AT&#38;T: <SAMP>`foo(,%eax,4)'</SAMP>, Intel: <SAMP>`[foo + eax*4]'</SAMP>
<DD>
<VAR>index</VAR> is <SAMP>`%eax'</SAMP> (scaled by a <VAR>scale</VAR> 4); <VAR>disp</VAR> is
<SAMP>`foo'</SAMP>. All other fields are missing. The section register here
defaults to <SAMP>`%ds'</SAMP>.
<DT>AT&#38;T: <SAMP>`foo(,1)'</SAMP>; Intel <SAMP>`[foo]'</SAMP>
<DD>
This uses the value pointed to by <SAMP>`foo'</SAMP> as a memory operand.
Note that <VAR>base</VAR> and <VAR>index</VAR> are both missing, but there is only
<EM>one</EM> <SAMP>`,'</SAMP>. This is a syntactic exception.
<DT>AT&#38;T: <SAMP>`%gs:foo'</SAMP>; Intel <SAMP>`gs:foo'</SAMP>
<DD>
This selects the contents of the variable <SAMP>`foo'</SAMP> with section
register <VAR>section</VAR> being <SAMP>`%gs'</SAMP>.
</DL>
<P>
Absolute (as opposed to PC relative) call and jump operands must be
prefixed with <SAMP>`*'</SAMP>. If no <SAMP>`*'</SAMP> is specified, <CODE>as</CODE>
always chooses PC relative addressing for jump/call labels.
</P>
<P>
Any instruction that has a memory operand <EM>must</EM> specify its size (byte,
word, or long) with an opcode suffix (<SAMP>`b'</SAMP>, <SAMP>`w'</SAMP>, or <SAMP>`l'</SAMP>,
respectively).
</P>
<H2><A NAME="SEC203" HREF="as_toc.html#TOC203">Handling of Jump Instructions</A></H2>
<P>
<A NAME="IDX618"></A>
<A NAME="IDX619"></A>
Jump instructions are always optimized to use the smallest possible
displacements. This is accomplished by using byte (8-bit) displacement
jumps whenever the target is sufficiently close. If a byte displacement
is insufficient a long (32-bit) displacement is used. We do not support
word (16-bit) displacement jumps (i.e. prefixing the jump instruction
with the <SAMP>`addr16'</SAMP> opcode prefix), since the 80386 insists upon masking
<SAMP>`%eip'</SAMP> to 16 bits after the word displacement is added.
</P>
<P>
Note that the <SAMP>`jcxz'</SAMP>, <SAMP>`jecxz'</SAMP>, <SAMP>`loop'</SAMP>, <SAMP>`loopz'</SAMP>,
<SAMP>`loope'</SAMP>, <SAMP>`loopnz'</SAMP> and <SAMP>`loopne'</SAMP> instructions only come in byte
displacements, so that if you use these instructions (<CODE>gcc</CODE> does
not use them) you may get an error message (and incorrect code). The AT&#38;T
80386 assembler tries to get around this problem by expanding <SAMP>`jcxz foo'</SAMP>
to
</P>
<PRE>
jcxz cx_zero
jmp cx_nonzero
cx_zero: jmp foo
cx_nonzero:
</PRE>
<H2><A NAME="SEC204" HREF="as_toc.html#TOC204">Floating Point</A></H2>
<P>
<A NAME="IDX620"></A>
<A NAME="IDX621"></A>
All 80387 floating point types except packed BCD are supported.
(BCD support may be added without much difficulty). These data
types are 16-, 32-, and 64- bit integers, and single (32-bit),
double (64-bit), and extended (80-bit) precision floating point.
Each supported type has an opcode suffix and a constructor
associated with it. Opcode suffixes specify operand's data
types. Constructors build these data types into memory.
</P>
<P>
<A NAME="IDX622"></A>
<A NAME="IDX623"></A>
<A NAME="IDX624"></A>
<A NAME="IDX625"></A>
<UL>
<LI>
Floating point constructors are <SAMP>`.float'</SAMP> or <SAMP>`.single'</SAMP>,
<SAMP>`.double'</SAMP>, and <SAMP>`.tfloat'</SAMP> for 32-, 64-, and 80-bit formats.
These correspond to opcode suffixes <SAMP>`s'</SAMP>, <SAMP>`l'</SAMP>, and <SAMP>`t'</SAMP>.
<SAMP>`t'</SAMP> stands for temporary real, and that the 80387 only supports
this format via the <SAMP>`fldt'</SAMP> (load temporary real to stack top) and
<SAMP>`fstpt'</SAMP> (store temporary real and pop stack) instructions.
<A NAME="IDX626"></A>
<A NAME="IDX627"></A>
<A NAME="IDX628"></A>
<A NAME="IDX629"></A>
<LI>
Integer constructors are <SAMP>`.word'</SAMP>, <SAMP>`.long'</SAMP> or <SAMP>`.int'</SAMP>, and
<SAMP>`.quad'</SAMP> for the 16-, 32-, and 64-bit integer formats. The corresponding
opcode suffixes are <SAMP>`s'</SAMP> (single), <SAMP>`l'</SAMP> (long), and <SAMP>`q'</SAMP>
(quad). As with the temporary real format the 64-bit <SAMP>`q'</SAMP> format is
only present in the <SAMP>`fildq'</SAMP> (load quad integer to stack top) and
<SAMP>`fistpq'</SAMP> (store quad integer and pop stack) instructions.
</UL>
<P>
Register to register operations do not require opcode suffixes,
so that <SAMP>`fst %st, %st(1)'</SAMP> is equivalent to <SAMP>`fstl %st, %st(1)'</SAMP>.
</P>
<H2><A NAME="SEC205" HREF="as_toc.html#TOC205">Writing 16-bit Code</A></H2>
<P>
<A NAME="IDX630"></A>
<A NAME="IDX631"></A>
<A NAME="IDX632"></A>
<A NAME="IDX633"></A>
<A NAME="IDX634"></A>
While GAS normally writes only "pure" 32-bit i386 code, it has limited
support for writing code to run in real mode or in 16-bit protected mode
code segments. To do this, insert a <SAMP>`.code16'</SAMP> directive before the
assembly language instructions to be run in 16-bit mode. You can switch
GAS back to writing normal 32-bit code with the <SAMP>`.code32'</SAMP> directive.
</P>
<P>
GAS understands exactly the same assembly language syntax in 16-bit mode as
in 32-bit mode. The function of any given instruction is exactly the same
regardless of mode, as long as the resulting object code is executed in the
mode for which GAS wrote it. So, for example, the <SAMP>`ret'</SAMP> mnemonic
produces a 32-bit return instruction regardless of whether it is to be run
in 16-bit or 32-bit mode. (If GAS is in 16-bit mode, it will add an
operand size prefix to the instruction to force it to be a 32-bit return.)
</P>
<P>
This means, for one thing, that you can use GNU CC to write code to be run
in real mode or 16-bit protected mode. Just insert the statement
<SAMP>`asm(".code16");'</SAMP> at the beginning of your C source file, and while
GNU CC will still be generating 32-bit code, GAS will automatically add
all the necessary size prefixes to make that code run in 16-bit mode. Of
course, since GNU CC only writes small-model code (it doesn't know how to
attach segment selectors to pointers like native x86 compilers do), any
16-bit code you write with GNU CC will essentially be limited to a 64K
address space. Also, there will be a code size and performance penalty
due to all the extra address and operand size prefixes GAS has to add to
the instructions.
</P>
<P>
Note that placing GAS in 16-bit mode does not mean that the resulting
code will necessarily run on a 16-bit pre-80386 processor. To write code
that runs on such a processor, you would have to refrain from using
<EM>any</EM> 32-bit constructs which require GAS to output address or
operand size prefixes. At the moment this would be rather difficult,
because GAS currently supports <EM>only</EM> 32-bit addressing modes: when
writing 16-bit code, it <EM>always</EM> outputs address size prefixes for any
instruction that uses a non-register addressing mode. So you can write
code that runs on 16-bit processors, but only if that code never references
memory.
</P>
<H2><A NAME="SEC206" HREF="as_toc.html#TOC206">Notes</A></H2>
<P>
<A NAME="IDX635"></A>
<A NAME="IDX636"></A>
<A NAME="IDX637"></A>
There is some trickery concerning the <SAMP>`mul'</SAMP> and <SAMP>`imul'</SAMP>
instructions that deserves mention. The 16-, 32-, and 64-bit expanding
multiplies (base opcode <SAMP>`0xf6'</SAMP>; extension 4 for <SAMP>`mul'</SAMP> and 5
for <SAMP>`imul'</SAMP>) can be output only in the one operand form. Thus,
<SAMP>`imul %ebx, %eax'</SAMP> does <EM>not</EM> select the expanding multiply;
the expanding multiply would clobber the <SAMP>`%edx'</SAMP> register, and this
would confuse <CODE>gcc</CODE> output. Use <SAMP>`imul %ebx'</SAMP> to get the
64-bit product in <SAMP>`%edx:%eax'</SAMP>.
</P>
<P>
We have added a two operand form of <SAMP>`imul'</SAMP> when the first operand
is an immediate mode expression and the second operand is a register.
This is just a shorthand, so that, multiplying <SAMP>`%eax'</SAMP> by 69, for
example, can be done with <SAMP>`imul $69, %eax'</SAMP> rather than <SAMP>`imul
$69, %eax, %eax'</SAMP>.
</P>
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<TITLE>Using as - Intel 80960 Dependent Features</TITLE>
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<H1><A NAME="SEC207" HREF="as_toc.html#TOC207">Intel 80960 Dependent Features</A></H1>
<P>
<A NAME="IDX638"></A>
</P>
<H2><A NAME="SEC208" HREF="as_toc.html#TOC208">i960 Command-line Options</A></H2>
<P>
<A NAME="IDX639"></A>
<A NAME="IDX640"></A>
<DL COMPACT>
<DT><CODE>-ACA | -ACA_A | -ACB | -ACC | -AKA | -AKB | -AKC | -AMC</CODE>
<DD>
<A NAME="IDX641"></A>
<A NAME="IDX642"></A>
<A NAME="IDX643"></A>
Select the 80960 architecture. Instructions or features not supported
by the selected architecture cause fatal errors.
<SAMP>`-ACA'</SAMP> is equivalent to <SAMP>`-ACA_A'</SAMP>; <SAMP>`-AKC'</SAMP> is equivalent to
<SAMP>`-AMC'</SAMP>. Synonyms are provided for compatibility with other tools.
If you do not specify any of these options, <CODE>as</CODE> generates code
for any instruction or feature that is supported by <EM>some</EM> version of the
960 (even if this means mixing architectures!). In principle,
<CODE>as</CODE> attempts to deduce the minimal sufficient processor type if
none is specified; depending on the object code format, the processor type may
be recorded in the object file. If it is critical that the <CODE>as</CODE>
output match a specific architecture, specify that architecture explicitly.
<A NAME="IDX644"></A>
<A NAME="IDX645"></A>
<A NAME="IDX646"></A>
<DT><CODE>-b</CODE>
<DD>
Add code to collect information about conditional branches taken, for
later optimization using branch prediction bits. (The conditional branch
instructions have branch prediction bits in the CA, CB, and CC
architectures.) If <VAR>BR</VAR> represents a conditional branch instruction,
the following represents the code generated by the assembler when
<SAMP>`-b'</SAMP> is specified:
<PRE>
call <VAR>increment routine</VAR>
.word 0 # pre-counter
Label: <VAR>BR</VAR>
call <VAR>increment routine</VAR>
.word 0 # post-counter
</PRE>
The counter following a branch records the number of times that branch
was <EM>not</EM> taken; the differenc between the two counters is the
number of times the branch <EM>was</EM> taken.
<A NAME="IDX647"></A>
<A NAME="IDX648"></A>
A table of every such <CODE>Label</CODE> is also generated, so that the
external postprocessor <CODE>gbr960</CODE> (supplied by Intel) can locate all
the counters. This table is always labelled <SAMP>`__BRANCH_TABLE__'</SAMP>;
this is a local symbol to permit collecting statistics for many separate
object files. The table is word aligned, and begins with a two-word
header. The first word, initialized to 0, is used in maintaining linked
lists of branch tables. The second word is a count of the number of
entries in the table, which follow immediately: each is a word, pointing
to one of the labels illustrated above.
The first word of the header is used to locate multiple branch tables,
since each object file may contain one. Normally the links are
maintained with a call to an initialization routine, placed at the
beginning of each function in the file. The GNU C compiler
generates these calls automatically when you give it a <SAMP>`-b'</SAMP> option.
For further details, see the documentation of <SAMP>`gbr960'</SAMP>.
<A NAME="IDX649"></A>
<DT><CODE>-no-relax</CODE>
<DD>
Normally, Compare-and-Branch instructions with targets that require
displacements greater than 13 bits (or that have external targets) are
replaced with the corresponding compare (or <SAMP>`chkbit'</SAMP>) and branch
instructions. You can use the <SAMP>`-no-relax'</SAMP> option to specify that
<CODE>as</CODE> should generate errors instead, if the target displacement
is larger than 13 bits.
This option does not affect the Compare-and-Jump instructions; the code
emitted for them is <EM>always</EM> adjusted when necessary (depending on
displacement size), regardless of whether you use <SAMP>`-no-relax'</SAMP>.
</DL>
<H2><A NAME="SEC209" HREF="as_toc.html#TOC209">Floating Point</A></H2>
<P>
<A NAME="IDX650"></A>
<A NAME="IDX651"></A>
<CODE>as</CODE> generates IEEE floating-point numbers for the directives
<SAMP>`.float'</SAMP>, <SAMP>`.double'</SAMP>, <SAMP>`.extended'</SAMP>, and <SAMP>`.single'</SAMP>.
</P>
<H2><A NAME="SEC210" HREF="as_toc.html#TOC210">i960 Machine Directives</A></H2>
<P>
<A NAME="IDX652"></A>
<A NAME="IDX653"></A>
</P>
<DL COMPACT>
<DT><CODE>.bss <VAR>symbol</VAR>, <VAR>length</VAR>, <VAR>align</VAR></CODE>
<DD>
<A NAME="IDX654"></A>
Reserve <VAR>length</VAR> bytes in the bss section for a local <VAR>symbol</VAR>,
aligned to the power of two specified by <VAR>align</VAR>. <VAR>length</VAR> and
<VAR>align</VAR> must be positive absolute expressions. This directive
differs from <SAMP>`.lcomm'</SAMP> only in that it permits you to specify
an alignment. See section <A HREF="as_7.html#SEC101"><CODE>.lcomm <VAR>symbol</CODE> , <VAR>length</VAR></VAR></A>.
</DL>
<DL COMPACT>
<DT><CODE>.extended <VAR>flonums</VAR></CODE>
<DD>
<A NAME="IDX655"></A>
<CODE>.extended</CODE> expects zero or more flonums, separated by commas; for
each flonum, <SAMP>`.extended'</SAMP> emits an IEEE extended-format (80-bit)
floating-point number.
<A NAME="IDX656"></A>
<DT><CODE>.leafproc <VAR>call-lab</VAR>, <VAR>bal-lab</VAR></CODE>
<DD>
You can use the <SAMP>`.leafproc'</SAMP> directive in conjunction with the
optimized <CODE>callj</CODE> instruction to enable faster calls of leaf
procedures. If a procedure is known to call no other procedures, you
may define an entry point that skips procedure prolog code (and that does
not depend on system-supplied saved context), and declare it as the
<VAR>bal-lab</VAR> using <SAMP>`.leafproc'</SAMP>. If the procedure also has an
entry point that goes through the normal prolog, you can specify that
entry point as <VAR>call-lab</VAR>.
A <SAMP>`.leafproc'</SAMP> declaration is meant for use in conjunction with the
optimized call instruction <SAMP>`callj'</SAMP>; the directive records the data
needed later to choose between converting the <SAMP>`callj'</SAMP> into a
<CODE>bal</CODE> or a <CODE>call</CODE>.
<VAR>call-lab</VAR> is optional; if only one argument is present, or if the
two arguments are identical, the single argument is assumed to be the
<CODE>bal</CODE> entry point.
<A NAME="IDX657"></A>
<DT><CODE>.sysproc <VAR>name</VAR>, <VAR>index</VAR></CODE>
<DD>
The <SAMP>`.sysproc'</SAMP> directive defines a name for a system procedure.
After you define it using <SAMP>`.sysproc'</SAMP>, you can use <VAR>name</VAR> to
refer to the system procedure identified by <VAR>index</VAR> when calling
procedures with the optimized call instruction <SAMP>`callj'</SAMP>.
Both arguments are required; <VAR>index</VAR> must be between 0 and 31
(inclusive).
</DL>
<H2><A NAME="SEC211" HREF="as_toc.html#TOC211">i960 Opcodes</A></H2>
<P>
<A NAME="IDX658"></A>
<A NAME="IDX659"></A>
All Intel 960 machine instructions are supported;
see section <A HREF="as_17.html#SEC208">i960 Command-line Options</A> for a discussion of
selecting the instruction subset for a particular 960
architecture.
</P>
<P>
Some opcodes are processed beyond simply emitting a single corresponding
instruction: <SAMP>`callj'</SAMP>, and Compare-and-Branch or Compare-and-Jump
instructions with target displacements larger than 13 bits.
</P>
<H3><A NAME="SEC212" HREF="as_toc.html#TOC212"><CODE>callj</CODE></A></H3>
<P>
<A NAME="IDX660"></A>
<A NAME="IDX661"></A>
You can write <CODE>callj</CODE> to have the assembler or the linker determine
the most appropriate form of subroutine call: <SAMP>`call'</SAMP>,
<SAMP>`bal'</SAMP>, or <SAMP>`calls'</SAMP>. If the assembly source contains
enough information--a <SAMP>`.leafproc'</SAMP> or <SAMP>`.sysproc'</SAMP> directive
defining the operand--then <CODE>as</CODE> translates the
<CODE>callj</CODE>; if not, it simply emits the <CODE>callj</CODE>, leaving it
for the linker to resolve.
</P>
<H3><A NAME="SEC213" HREF="as_toc.html#TOC213">Compare-and-Branch</A></H3>
<P>
<A NAME="IDX662"></A>
<A NAME="IDX663"></A>
The 960 architectures provide combined Compare-and-Branch instructions
that permit you to store the branch target in the lower 13 bits of the
instruction word itself. However, if you specify a branch target far
enough away that its address won't fit in 13 bits, the assembler can
either issue an error, or convert your Compare-and-Branch instruction
into separate instructions to do the compare and the branch.
</P>
<P>
<A NAME="IDX664"></A>
<A NAME="IDX665"></A>
Whether <CODE>as</CODE> gives an error or expands the instruction depends
on two choices you can make: whether you use the <SAMP>`-no-relax'</SAMP> option,
and whether you use a "Compare and Branch" instruction or a "Compare
and Jump" instruction. The "Jump" instructions are <EM>always</EM>
expanded if necessary; the "Branch" instructions are expanded when
necessary <EM>unless</EM> you specify <CODE>-no-relax</CODE>---in which case
<CODE>as</CODE> gives an error instead.
</P>
<P>
These are the Compare-and-Branch instructions, their "Jump" variants,
and the instruction pairs they may expand into:
</P>
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<TITLE>Using as - M680x0 Dependent Features</TITLE>
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<P><HR><P>
<H1><A NAME="SEC214" HREF="as_toc.html#TOC214">M680x0 Dependent Features</A></H1>
<P>
<A NAME="IDX666"></A>
</P>
<H2><A NAME="SEC215" HREF="as_toc.html#TOC215">M680x0 Options</A></H2>
<P>
<A NAME="IDX667"></A>
<A NAME="IDX668"></A>
The Motorola 680x0 version of <CODE>as</CODE> has a few machine
dependent options.
</P>
<P>
<A NAME="IDX669"></A>
You can use the <SAMP>`-l'</SAMP> option to shorten the size of references to undefined
symbols. If you do not use the <SAMP>`-l'</SAMP> option, references to undefined
symbols are wide enough for a full <CODE>long</CODE> (32 bits). (Since
<CODE>as</CODE> cannot know where these symbols end up, <CODE>as</CODE> can
only allocate space for the linker to fill in later. Since <CODE>as</CODE>
does not know how far away these symbols are, it allocates as much space as it
can.) If you use this option, the references are only one word wide (16 bits).
This may be useful if you want the object file to be as small as possible, and
you know that the relevant symbols are always less than 17 bits away.
</P>
<P>
<A NAME="IDX670"></A>
For some configurations, especially those where the compiler normally
does not prepend an underscore to the names of user variables, the
assembler requires a <SAMP>`%'</SAMP> before any use of a register name. This
is intended to let the assembler distinguish between C variables and
functions named <SAMP>`a0'</SAMP> through <SAMP>`a7'</SAMP>, and so on. The <SAMP>`%'</SAMP> is
always accepted, but is not required for certain configurations, notably
<SAMP>`sun3'</SAMP>. The <SAMP>`--register-prefix-optional'</SAMP> option may be used
to permit omitting the <SAMP>`%'</SAMP> even for configurations for which it is
normally required. If this is done, it will generally be impossible to
refer to C variables and functions with the same names as register
names.
</P>
<P>
<A NAME="IDX671"></A>
Normally the character <SAMP>`|'</SAMP> is treated as a comment character, which
means that it can not be used in expressions. The <SAMP>`--bitwise-or'</SAMP>
option turns <SAMP>`|'</SAMP> into a normal character. In this mode, you must
either use C style comments, or start comments with a <SAMP>`#'</SAMP> character
at the beginning of a line.
</P>
<P>
<A NAME="IDX672"></A>
<A NAME="IDX673"></A>
If you use an addressing mode with a base register without specifying
the size, <CODE>as</CODE> will normally use the full 32 bit value.
For example, the addressing mode <SAMP>`%a0@(%d0)'</SAMP> is equivalent to
<SAMP>`%a0@(%d0:l)'</SAMP>. You may use the <SAMP>`--base-size-default-16'</SAMP>
option to tell <CODE>as</CODE> to default to using the 16 bit value.
In this case, <SAMP>`%a0@(%d0)'</SAMP> is equivalent to <SAMP>`%a0@(%d0:w)'</SAMP>.
You may use the <SAMP>`--base-size-default-32'</SAMP> option to restore the
default behaviour.
</P>
<P>
<A NAME="IDX674"></A>
<A NAME="IDX675"></A>
If you use an addressing mode with a displacement, and the value of the
displacement is not known, <CODE>as</CODE> will normally assume that
the value is 32 bits. For example, if the symbol <SAMP>`disp'</SAMP> has not
been defined, <CODE>as</CODE> will assemble the addressing mode
<SAMP>`%a0@(disp,%d0)'</SAMP> as though <SAMP>`disp'</SAMP> is a 32 bit value. You may
use the <SAMP>`--disp-size-default-16'</SAMP> option to tell <CODE>as</CODE>
to instead assume that the displacement is 16 bits. In this case,
<CODE>as</CODE> will assemble <SAMP>`%a0@(disp,%d0)'</SAMP> as though
<SAMP>`disp'</SAMP> is a 16 bit value. You may use the
<SAMP>`--disp-size-default-32'</SAMP> option to restore the default behaviour.
</P>
<P>
<A NAME="IDX676"></A>
<A NAME="IDX677"></A>
<A NAME="IDX678"></A>
<CODE>as</CODE> can assemble code for several different members of the
Motorola 680x0 family. The default depends upon how <CODE>as</CODE>
was configured when it was built; normally, the default is to assemble
code for the 68020 microprocessor. The following options may be used to
change the default. These options control which instructions and
addressing modes are permitted. The members of the 680x0 family are
very similar. For detailed information about the differences, see the
Motorola manuals.
</P>
<DL COMPACT>
<DT><SAMP>`-m68000'</SAMP>
<DD>
<DT><SAMP>`-m68ec000'</SAMP>
<DD>
<DT><SAMP>`-m68hc000'</SAMP>
<DD>
<DT><SAMP>`-m68hc001'</SAMP>
<DD>
<DT><SAMP>`-m68008'</SAMP>
<DD>
<DT><SAMP>`-m68302'</SAMP>
<DD>
<DT><SAMP>`-m68306'</SAMP>
<DD>
<DT><SAMP>`-m68307'</SAMP>
<DD>
<DT><SAMP>`-m68322'</SAMP>
<DD>
<DT><SAMP>`-m68356'</SAMP>
<DD>
Assemble for the 68000. <SAMP>`-m68008'</SAMP>, <SAMP>`-m68302'</SAMP>, and so on are synonyms
for <SAMP>`-m68000'</SAMP>, since the chips are the same from the point of view
of the assembler.
<DT><SAMP>`-m68010'</SAMP>
<DD>
Assemble for the 68010.
<DT><SAMP>`-m68020'</SAMP>
<DD>
<DT><SAMP>`-m68ec020'</SAMP>
<DD>
Assemble for the 68020. This is normally the default.
<DT><SAMP>`-m68030'</SAMP>
<DD>
<DT><SAMP>`-m68ec030'</SAMP>
<DD>
Assemble for the 68030.
<DT><SAMP>`-m68040'</SAMP>
<DD>
<DT><SAMP>`-m68ec040'</SAMP>
<DD>
Assemble for the 68040.
<DT><SAMP>`-m68060'</SAMP>
<DD>
<DT><SAMP>`-m68ec060'</SAMP>
<DD>
Assemble for the 68060.
<DT><SAMP>`-mcpu32'</SAMP>
<DD>
<DT><SAMP>`-m68330'</SAMP>
<DD>
<DT><SAMP>`-m68331'</SAMP>
<DD>
<DT><SAMP>`-m68332'</SAMP>
<DD>
<DT><SAMP>`-m68333'</SAMP>
<DD>
<DT><SAMP>`-m68334'</SAMP>
<DD>
<DT><SAMP>`-m68336'</SAMP>
<DD>
<DT><SAMP>`-m68340'</SAMP>
<DD>
<DT><SAMP>`-m68341'</SAMP>
<DD>
<DT><SAMP>`-m68349'</SAMP>
<DD>
<DT><SAMP>`-m68360'</SAMP>
<DD>
Assemble for the CPU32 family of chips.
<DT><SAMP>`-m5200'</SAMP>
<DD>
Assemble for the ColdFire family of chips.
<DT><SAMP>`-m68881'</SAMP>
<DD>
<DT><SAMP>`-m68882'</SAMP>
<DD>
Assemble 68881 floating point instructions. This is the default for the
68020, 68030, and the CPU32. The 68040 and 68060 always support
floating point instructions.
<DT><SAMP>`-mno-68881'</SAMP>
<DD>
Do not assemble 68881 floating point instructions. This is the default
for 68000 and the 68010. The 68040 and 68060 always support floating
point instructions, even if this option is used.
<DT><SAMP>`-m68851'</SAMP>
<DD>
Assemble 68851 MMU instructions. This is the default for the 68020,
68030, and 68060. The 68040 accepts a somewhat different set of MMU
instructions; <SAMP>`-m68851'</SAMP> and <SAMP>`-m68040'</SAMP> should not be used
together.
<DT><SAMP>`-mno-68851'</SAMP>
<DD>
Do not assemble 68851 MMU instructions. This is the default for the
68000, 68010, and the CPU32. The 68040 accepts a somewhat different set
of MMU instructions.
</DL>
<H2><A NAME="SEC216" HREF="as_toc.html#TOC216">Syntax</A></H2>
<P>
<A NAME="IDX679"></A>
This syntax for the Motorola 680x0 was developed at MIT.
</P>
<P>
<A NAME="IDX680"></A>
<A NAME="IDX681"></A>
<A NAME="IDX682"></A>
<A NAME="IDX683"></A>
The 680x0 version of <CODE>as</CODE> uses instructions names and
syntax compatible with the Sun assembler. Intervening periods are
ignored; for example, <SAMP>`movl'</SAMP> is equivalent to <SAMP>`mov.l'</SAMP>.
</P>
<P>
In the following table <VAR>apc</VAR> stands for any of the address registers
(<SAMP>`%a0'</SAMP> through <SAMP>`%a7'</SAMP>), the program counter (<SAMP>`%pc'</SAMP>), the
zero-address relative to the program counter (<SAMP>`%zpc'</SAMP>), a suppressed
address register (<SAMP>`%za0'</SAMP> through <SAMP>`%za7'</SAMP>), or it may be omitted
entirely. The use of <VAR>size</VAR> means one of <SAMP>`w'</SAMP> or <SAMP>`l'</SAMP>, and
it may be omitted, along with the leading colon, unless a scale is also
specified. The use of <VAR>scale</VAR> means one of <SAMP>`1'</SAMP>, <SAMP>`2'</SAMP>,
<SAMP>`4'</SAMP>, or <SAMP>`8'</SAMP>, and it may always be omitted along with the
leading colon.
</P>
<P>
<A NAME="IDX684"></A>
<A NAME="IDX685"></A>
The following addressing modes are understood:
<DL COMPACT>
<DT><EM>Immediate</EM>
<DD>
<SAMP>`#<VAR>number</VAR>'</SAMP>
<DT><EM>Data Register</EM>
<DD>
<SAMP>`%d0'</SAMP> through <SAMP>`%d7'</SAMP>
<DT><EM>Address Register</EM>
<DD>
<SAMP>`%a0'</SAMP> through <SAMP>`%a7'</SAMP><BR>
<SAMP>`%a7'</SAMP> is also known as <SAMP>`%sp'</SAMP>, i.e. the Stack Pointer. <CODE>%a6</CODE>
is also known as <SAMP>`%fp'</SAMP>, the Frame Pointer.
<DT><EM>Address Register Indirect</EM>
<DD>
<SAMP>`%a0@'</SAMP> through <SAMP>`%a7@'</SAMP>
<DT><EM>Address Register Postincrement</EM>
<DD>
<SAMP>`%a0@+'</SAMP> through <SAMP>`%a7@+'</SAMP>
<DT><EM>Address Register Predecrement</EM>
<DD>
<SAMP>`%a0@-'</SAMP> through <SAMP>`%a7@-'</SAMP>
<DT><EM>Indirect Plus Offset</EM>
<DD>
<SAMP>`<VAR>apc</VAR>@(<VAR>number</VAR>)'</SAMP>
<DT><EM>Index</EM>
<DD>
<SAMP>`<VAR>apc</VAR>@(<VAR>number</VAR>,<VAR>register</VAR>:<VAR>size</VAR>:<VAR>scale</VAR>)'</SAMP>
The <VAR>number</VAR> may be omitted.
<DT><EM>Postindex</EM>
<DD>
<SAMP>`<VAR>apc</VAR>@(<VAR>number</VAR>)@(<VAR>onumber</VAR>,<VAR>register</VAR>:<VAR>size</VAR>:<VAR>scale</VAR>)'</SAMP>
The <VAR>onumber</VAR> or the <VAR>register</VAR>, but not both, may be omitted.
<DT><EM>Preindex</EM>
<DD>
<SAMP>`<VAR>apc</VAR>@(<VAR>number</VAR>,<VAR>register</VAR>:<VAR>size</VAR>:<VAR>scale</VAR>)@(<VAR>onumber</VAR>)'</SAMP>
The <VAR>number</VAR> may be omitted. Omitting the <VAR>register</VAR> produces
the Postindex addressing mode.
<DT><EM>Absolute</EM>
<DD>
<SAMP>`<VAR>symbol</VAR>'</SAMP>, or <SAMP>`<VAR>digits</VAR>'</SAMP>, optionally followed by
<SAMP>`:b'</SAMP>, <SAMP>`:w'</SAMP>, or <SAMP>`:l'</SAMP>.
</DL>
<H2><A NAME="SEC217" HREF="as_toc.html#TOC217">Motorola Syntax</A></H2>
<P>
<A NAME="IDX686"></A>
<A NAME="IDX687"></A>
</P>
<P>
The standard Motorola syntax for this chip differs from the syntax
already discussed (see section <A HREF="as_18.html#SEC216">Syntax</A>). <CODE>as</CODE> can
accept Motorola syntax for operands, even if MIT syntax is used for
other operands in the same instruction. The two kinds of syntax are
fully compatible.
</P>
<P>
In the following table <VAR>apc</VAR> stands for any of the address registers
(<SAMP>`%a0'</SAMP> through <SAMP>`%a7'</SAMP>), the program counter (<SAMP>`%pc'</SAMP>), the
zero-address relative to the program counter (<SAMP>`%zpc'</SAMP>), or a
suppressed address register (<SAMP>`%za0'</SAMP> through <SAMP>`%za7'</SAMP>). The use
of <VAR>size</VAR> means one of <SAMP>`w'</SAMP> or <SAMP>`l'</SAMP>, and it may always be
omitted along with the leading dot. The use of <VAR>scale</VAR> means one of
<SAMP>`1'</SAMP>, <SAMP>`2'</SAMP>, <SAMP>`4'</SAMP>, or <SAMP>`8'</SAMP>, and it may always be omitted
along with the leading asterisk.
</P>
<P>
The following additional addressing modes are understood:
</P>
<DL COMPACT>
<DT><EM>Address Register Indirect</EM>
<DD>
<SAMP>`(%a0)'</SAMP> through <SAMP>`(%a7)'</SAMP><BR>
<SAMP>`%a7'</SAMP> is also known as <SAMP>`%sp'</SAMP>, i.e. the Stack Pointer. <CODE>%a6</CODE>
is also known as <SAMP>`%fp'</SAMP>, the Frame Pointer.
<DT><EM>Address Register Postincrement</EM>
<DD>
<SAMP>`(%a0)+'</SAMP> through <SAMP>`(%a7)+'</SAMP>
<DT><EM>Address Register Predecrement</EM>
<DD>
<SAMP>`-(%a0)'</SAMP> through <SAMP>`-(%a7)'</SAMP>
<DT><EM>Indirect Plus Offset</EM>
<DD>
<SAMP>`<VAR>number</VAR>(<VAR>%a0</VAR>)'</SAMP> through <SAMP>`<VAR>number</VAR>(<VAR>%a7</VAR>)'</SAMP>,
or <SAMP>`<VAR>number</VAR>(<VAR>%pc</VAR>)'</SAMP>.
The <VAR>number</VAR> may also appear within the parentheses, as in
<SAMP>`(<VAR>number</VAR>,<VAR>%a0</VAR>)'</SAMP>. When used with the <VAR>pc</VAR>, the
<VAR>number</VAR> may be omitted (with an address register, omitting the
<VAR>number</VAR> produces Address Register Indirect mode).
<DT><EM>Index</EM>
<DD>
<SAMP>`<VAR>number</VAR>(<VAR>apc</VAR>,<VAR>register</VAR>.<VAR>size</VAR>*<VAR>scale</VAR>)'</SAMP>
The <VAR>number</VAR> may be omitted, or it may appear within the
parentheses. The <VAR>apc</VAR> may be omitted. The <VAR>register</VAR> and the
<VAR>apc</VAR> may appear in either order. If both <VAR>apc</VAR> and
<VAR>register</VAR> are address registers, and the <VAR>size</VAR> and <VAR>scale</VAR>
are omitted, then the first register is taken as the base register, and
the second as the index register.
<DT><EM>Postindex</EM>
<DD>
<SAMP>`([<VAR>number</VAR>,<VAR>apc</VAR>],<VAR>register</VAR>.<VAR>size</VAR>*<VAR>scale</VAR>,<VAR>onumber</VAR>)'</SAMP>
The <VAR>onumber</VAR>, or the <VAR>register</VAR>, or both, may be omitted.
Either the <VAR>number</VAR> or the <VAR>apc</VAR> may be omitted, but not both.
<DT><EM>Preindex</EM>
<DD>
<SAMP>`([<VAR>number</VAR>,<VAR>apc</VAR>,<VAR>register</VAR>.<VAR>size</VAR>*<VAR>scale</VAR>],<VAR>onumber</VAR>)'</SAMP>
The <VAR>number</VAR>, or the <VAR>apc</VAR>, or the <VAR>register</VAR>, or any two of
them, may be omitted. The <VAR>onumber</VAR> may be omitted. The
<VAR>register</VAR> and the <VAR>apc</VAR> may appear in either order. If both
<VAR>apc</VAR> and <VAR>register</VAR> are address registers, and the <VAR>size</VAR>
and <VAR>scale</VAR> are omitted, then the first register is taken as the
base register, and the second as the index register.
</DL>
<H2><A NAME="SEC218" HREF="as_toc.html#TOC218">Floating Point</A></H2>
<P>
<A NAME="IDX688"></A>
<A NAME="IDX689"></A>
Packed decimal (P) format floating literals are not supported.
Feel free to add the code!
</P>
<P>
The floating point formats generated by directives are these.
</P>
<DL COMPACT>
<DT><CODE>.float</CODE>
<DD>
<A NAME="IDX690"></A>
<CODE>Single</CODE> precision floating point constants.
<A NAME="IDX691"></A>
<DT><CODE>.double</CODE>
<DD>
<CODE>Double</CODE> precision floating point constants.
<A NAME="IDX692"></A>
<A NAME="IDX693"></A>
<DT><CODE>.extend</CODE>
<DD>
<DT><CODE>.ldouble</CODE>
<DD>
<CODE>Extended</CODE> precision (<CODE>long double</CODE>) floating point constants.
</DL>
<H2><A NAME="SEC219" HREF="as_toc.html#TOC219">680x0 Machine Directives</A></H2>
<P>
<A NAME="IDX694"></A>
<A NAME="IDX695"></A>
In order to be compatible with the Sun assembler the 680x0 assembler
understands the following directives.
</P>
<DL COMPACT>
<DT><CODE>.data1</CODE>
<DD>
<A NAME="IDX696"></A>
This directive is identical to a <CODE>.data 1</CODE> directive.
<A NAME="IDX697"></A>
<DT><CODE>.data2</CODE>
<DD>
This directive is identical to a <CODE>.data 2</CODE> directive.
<A NAME="IDX698"></A>
<DT><CODE>.even</CODE>
<DD>
This directive is a special case of the <CODE>.align</CODE> directive; it
aligns the output to an even byte boundary.
<A NAME="IDX699"></A>
<DT><CODE>.skip</CODE>
<DD>
This directive is identical to a <CODE>.space</CODE> directive.
</DL>
<H2><A NAME="SEC220" HREF="as_toc.html#TOC220">Opcodes</A></H2>
<P>
<A NAME="IDX700"></A>
<A NAME="IDX701"></A>
<A NAME="IDX702"></A>
</P>
<H3><A NAME="SEC221" HREF="as_toc.html#TOC221">Branch Improvement</A></H3>
<P>
<A NAME="IDX703"></A>
<A NAME="IDX704"></A>
<A NAME="IDX705"></A>
<A NAME="IDX706"></A>
Certain pseudo opcodes are permitted for branch instructions.
They expand to the shortest branch instruction that reach the
target. Generally these mnemonics are made by substituting <SAMP>`j'</SAMP> for
<SAMP>`b'</SAMP> at the start of a Motorola mnemonic.
</P>
<P>
The following table summarizes the pseudo-operations. A <CODE>*</CODE> flags
cases that are more fully described after the table:
</P>
<PRE>
Displacement
+-------------------------------------------------
| 68020 68000/10
Pseudo-Op |BYTE WORD LONG LONG non-PC relative
+-------------------------------------------------
jbsr |bsrs bsr bsrl jsr jsr
jra |bras bra bral jmp jmp
* jXX |bXXs bXX bXXl bNXs;jmpl bNXs;jmp
* dbXX |dbXX dbXX dbXX; bra; jmpl
* fjXX |fbXXw fbXXw fbXXl fbNXw;jmp
XX: condition
NX: negative of condition XX
</PRE>
<P>
<CODE>*</CODE>---see full description below
</P>
<DL COMPACT>
<DT><CODE>jbsr</CODE>
<DD>
<DT><CODE>jra</CODE>
<DD>
These are the simplest jump pseudo-operations; they always map to one
particular machine instruction, depending on the displacement to the
branch target.
<DT><CODE>j<VAR>XX</VAR></CODE>
<DD>
Here, <SAMP>`j<VAR>XX</VAR>'</SAMP> stands for an entire family of pseudo-operations,
where <VAR>XX</VAR> is a conditional branch or condition-code test. The full
list of pseudo-ops in this family is:
<PRE>
jhi jls jcc jcs jne jeq jvc
jvs jpl jmi jge jlt jgt jle
</PRE>
For the cases of non-PC relative displacements and long displacements on
the 68000 or 68010, <CODE>as</CODE> issues a longer code fragment in terms of
<VAR>NX</VAR>, the opposite condition to <VAR>XX</VAR>. For example, for the
non-PC relative case:
<PRE>
j<VAR>XX</VAR> foo
</PRE>
gives
<PRE>
b<VAR>NX</VAR>s oof
jmp foo
oof:
</PRE>
<DT><CODE>db<VAR>XX</VAR></CODE>
<DD>
The full family of pseudo-operations covered here is
<PRE>
dbhi dbls dbcc dbcs dbne dbeq dbvc
dbvs dbpl dbmi dbge dblt dbgt dble
dbf dbra dbt
</PRE>
Other than for word and byte displacements, when the source reads
<SAMP>`db<VAR>XX</VAR> foo'</SAMP>, <CODE>as</CODE> emits
<PRE>
db<VAR>XX</VAR> oo1
bra oo2
oo1:jmpl foo
oo2:
</PRE>
<DT><CODE>fj<VAR>XX</VAR></CODE>
<DD>
This family includes
<PRE>
fjne fjeq fjge fjlt fjgt fjle fjf
fjt fjgl fjgle fjnge fjngl fjngle fjngt
fjnle fjnlt fjoge fjogl fjogt fjole fjolt
fjor fjseq fjsf fjsne fjst fjueq fjuge
fjugt fjule fjult fjun
</PRE>
For branch targets that are not PC relative, <CODE>as</CODE> emits
<PRE>
fb<VAR>NX</VAR> oof
jmp foo
oof:
</PRE>
when it encounters <SAMP>`fj<VAR>XX</VAR> foo'</SAMP>.
</DL>
<H3><A NAME="SEC222" HREF="as_toc.html#TOC222">Special Characters</A></H3>
<P>
<A NAME="IDX707"></A>
<A NAME="IDX708"></A>
<A NAME="IDX709"></A>
<A NAME="IDX710"></A>
<A NAME="IDX711"></A>
<A NAME="IDX712"></A>
The immediate character is <SAMP>`#'</SAMP> for Sun compatibility. The
line-comment character is <SAMP>`|'</SAMP> (unless the <SAMP>`--bitwise-or'</SAMP>
option is used). If a <SAMP>`#'</SAMP> appears at the beginning of a line, it
is treated as a comment unless it looks like <SAMP>`# line file'</SAMP>, in
which case it is treated normally.
</P>
<P><HR><P>
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<TITLE>Using as - MIPS Dependent Features</TITLE>
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<P><HR><P>
<H1><A NAME="SEC223" HREF="as_toc.html#TOC223">MIPS Dependent Features</A></H1>
<P>
<A NAME="IDX713"></A>
GNU <CODE>as</CODE> for MIPS architectures supports several
different MIPS processors, and MIPS ISA levels I through IV. For
information about the MIPS instruction set, see <CITE>MIPS RISC
Architecture</CITE>, by Kane and Heindrich (Prentice-Hall). For an overview
of MIPS assembly conventions, see "Appendix D: Assembly Language
Programming" in the same work.
</P>
<H2><A NAME="SEC224" HREF="as_toc.html#TOC224">Assembler options</A></H2>
<P>
The MIPS configurations of GNU <CODE>as</CODE> support these
special options:
</P>
<DL COMPACT>
<DT><CODE>-G <VAR>num</VAR></CODE>
<DD>
<A NAME="IDX714"></A>
This option sets the largest size of an object that can be referenced
implicitly with the <CODE>gp</CODE> register. It is only accepted for targets
that use ECOFF format. The default value is 8.
<A NAME="IDX715"></A>
<A NAME="IDX716"></A>
<A NAME="IDX717"></A>
<A NAME="IDX718"></A>
<A NAME="IDX719"></A>
<A NAME="IDX720"></A>
<DT><CODE>-EB</CODE>
<DD>
<DT><CODE>-EL</CODE>
<DD>
Any MIPS configuration of <CODE>as</CODE> can select big-endian or
little-endian output at run time (unlike the other GNU development
tools, which must be configured for one or the other). Use <SAMP>`-EB'</SAMP>
to select big-endian output, and <SAMP>`-EL'</SAMP> for little-endian.
<A NAME="IDX721"></A>
<DT><CODE>-mips1</CODE>
<DD>
<DT><CODE>-mips2</CODE>
<DD>
<DT><CODE>-mips3</CODE>
<DD>
<DT><CODE>-mips4</CODE>
<DD>
Generate code for a particular MIPS Instruction Set Architecture level.
<SAMP>`-mips1'</SAMP> corresponds to the R2000 and R3000 processors,
<SAMP>`-mips2'</SAMP> to the R6000 processor, <SAMP>`-mips3'</SAMP> to the
R4000 processor, and <SAMP>`-mips4'</SAMP> to the R8000 and
R10000 processors. You can also switch instruction sets during the
assembly; see section <A HREF="as_19.html#SEC227">Directives to override the ISA level</A>.
<DT><CODE>-mips16</CODE>
<DD>
<DT><CODE>-no-mips16</CODE>
<DD>
Generate code for the MIPS 16 processor. This is equivalent to putting
<SAMP>`.set mips16'</SAMP> at the start of the assembly file. <SAMP>`-no-mips16'</SAMP>
turns off this option.
<DT><CODE>-m4650</CODE>
<DD>
<DT><CODE>-no-m4650</CODE>
<DD>
Generate code for the MIPS R4650 chip. This tells the assembler to accept
the <SAMP>`mad'</SAMP> and <SAMP>`madu'</SAMP> instruction, and to not schedule <SAMP>`nop'</SAMP>
instructions around accesses to the <SAMP>`HI'</SAMP> and <SAMP>`LO'</SAMP> registers.
<SAMP>`-no-m4650'</SAMP> turns off this option.
<DT><CODE>-m4010</CODE>
<DD>
<DT><CODE>-no-m4010</CODE>
<DD>
Generate code for the LSI R4010 chip. This tells the assembler to
accept the R4010 specific instructions (<SAMP>`addciu'</SAMP>, <SAMP>`ffc'</SAMP>,
etc.), and to not schedule <SAMP>`nop'</SAMP> instructions around accesses to
the <SAMP>`HI'</SAMP> and <SAMP>`LO'</SAMP> registers. <SAMP>`-no-m4010'</SAMP> turns off this
option.
<DT><CODE>-mcpu=<VAR>CPU</VAR></CODE>
<DD>
Generate code for a particular MIPS cpu. This has little effect on the
assembler, but it is passed by <CODE>gcc</CODE>.
<A NAME="IDX722"></A>
<DT><CODE>-nocpp</CODE>
<DD>
This option is ignored. It is accepted for command-line compatibility with
other assemblers, which use it to turn off C style preprocessing. With
GNU <CODE>as</CODE>, there is no need for <SAMP>`-nocpp'</SAMP>, because the
GNU assembler itself never runs the C preprocessor.
<DT><CODE>--trap</CODE>
<DD>
<DT><CODE>--no-break</CODE>
<DD>
<CODE>as</CODE> automatically macro expands certain division and
multiplication instructions to check for overflow and division by zero. This
option causes <CODE>as</CODE> to generate code to take a trap exception
rather than a break exception when an error is detected. The trap instructions
are only supported at Instruction Set Architecture level 2 and higher.
<DT><CODE>--break</CODE>
<DD>
<DT><CODE>--no-trap</CODE>
<DD>
Generate code to take a break exception rather than a trap exception when an
error is detected. This is the default.
</DL>
<H2><A NAME="SEC225" HREF="as_toc.html#TOC225">MIPS ECOFF object code</A></H2>
<P>
<A NAME="IDX723"></A>
<A NAME="IDX724"></A>
Assembling for a MIPS ECOFF target supports some additional sections
besides the usual <CODE>.text</CODE>, <CODE>.data</CODE> and <CODE>.bss</CODE>. The
additional sections are <CODE>.rdata</CODE>, used for read-only data,
<CODE>.sdata</CODE>, used for small data, and <CODE>.sbss</CODE>, used for small
common objects.
</P>
<P>
<A NAME="IDX725"></A>
<A NAME="IDX726"></A>
When assembling for ECOFF, the assembler uses the <CODE>$gp</CODE> (<CODE>$28</CODE>)
register to form the address of a "small object". Any object in the
<CODE>.sdata</CODE> or <CODE>.sbss</CODE> sections is considered "small" in this sense.
For external objects, or for objects in the <CODE>.bss</CODE> section, you can use
the <CODE>gcc</CODE> <SAMP>`-G'</SAMP> option to control the size of objects addressed via
<CODE>$gp</CODE>; the default value is 8, meaning that a reference to any object
eight bytes or smaller uses <CODE>$gp</CODE>. Passing <SAMP>`-G 0'</SAMP> to
<CODE>as</CODE> prevents it from using the <CODE>$gp</CODE> register on the basis
of object size (but the assembler uses <CODE>$gp</CODE> for objects in <CODE>.sdata</CODE>
or <CODE>sbss</CODE> in any case). The size of an object in the <CODE>.bss</CODE> section
is set by the <CODE>.comm</CODE> or <CODE>.lcomm</CODE> directive that defines it. The
size of an external object may be set with the <CODE>.extern</CODE> directive. For
example, <SAMP>`.extern sym,4'</SAMP> declares that the object at <CODE>sym</CODE> is 4 bytes
in length, whie leaving <CODE>sym</CODE> otherwise undefined.
</P>
<P>
Using small ECOFF objects requires linker support, and assumes that the
<CODE>$gp</CODE> register is correctly initialized (normally done automatically by
the startup code). MIPS ECOFF assembly code must not modify the
<CODE>$gp</CODE> register.
</P>
<H2><A NAME="SEC226" HREF="as_toc.html#TOC226">Directives for debugging information</A></H2>
<P>
<A NAME="IDX727"></A>
MIPS ECOFF <CODE>as</CODE> supports several directives used for
generating debugging information which are not support by traditional MIPS
assemblers. These are <CODE>.def</CODE>, <CODE>.endef</CODE>, <CODE>.dim</CODE>, <CODE>.file</CODE>,
<CODE>.scl</CODE>, <CODE>.size</CODE>, <CODE>.tag</CODE>, <CODE>.type</CODE>, <CODE>.val</CODE>,
<CODE>.stabd</CODE>, <CODE>.stabn</CODE>, and <CODE>.stabs</CODE>. The debugging information
generated by the three <CODE>.stab</CODE> directives can only be read by GDB,
not by traditional MIPS debuggers (this enhancement is required to fully
support C++ debugging). These directives are primarily used by compilers, not
assembly language programmers!
</P>
<H2><A NAME="SEC227" HREF="as_toc.html#TOC227">Directives to override the ISA level</A></H2>
<P>
<A NAME="IDX728"></A>
<A NAME="IDX729"></A>
GNU <CODE>as</CODE> supports an additional directive to change
the MIPS Instruction Set Architecture level on the fly: <CODE>.set
mips<VAR>n</VAR></CODE>. <VAR>n</VAR> should be a number from 0 to 4. A value from 1
to 4 makes the assembler accept instructions for the corresponding
ISA level, from that point on in the assembly. <CODE>.set
mips<VAR>n</VAR></CODE> affects not only which instructions are permitted, but also
how certain macros are expanded. <CODE>.set mips0</CODE> restores the
ISA level to its original level: either the level you selected with
command line options, or the default for your configuration. You can
use this feature to permit specific R4000 instructions while
assembling in 32 bit mode. Use this directive with care!
</P>
<P>
The directive <SAMP>`.set mips16'</SAMP> puts the assembler into MIPS 16 mode,
in which it will assemble instructions for the MIPS 16 processor. Use
<SAMP>`.set nomips16'</SAMP> to return to normal 32 bit mode.
</P>
<P>
Traditional MIPS assemblers do not support this directive.
</P>
<H2><A NAME="SEC228" HREF="as_toc.html#TOC228">Directives for extending MIPS 16 bit instructions</A></H2>
<P>
<A NAME="IDX730"></A>
<A NAME="IDX731"></A>
By default, MIPS 16 instructions are automatically extended to 32 bits
when necessary. The directive <SAMP>`.set noautoextend'</SAMP> will turn this
off. When <SAMP>`.set noautoextend'</SAMP> is in effect, any 32 bit instruction
must be explicitly extended with the <SAMP>`.e'</SAMP> modifier (e.g.,
<SAMP>`li.e $4,1000'</SAMP>). The directive <SAMP>`.set autoextend'</SAMP> may be used
to once again automatically extend instructions when necessary.
</P>
<P>
This directive is only meaningful when in MIPS 16 mode. Traditional
MIPS assemblers do not support this directive.
</P>
<H2><A NAME="SEC229" HREF="as_toc.html#TOC229">Directive to mark data as an instruction</A></H2>
<P>
<A NAME="IDX732"></A>
The <CODE>.insn</CODE> directive tells <CODE>as</CODE> that the following
data is actually instructions. This makes a difference in MIPS 16 mode:
when loading the address of a label which precedes instructions,
<CODE>as</CODE> automatically adds 1 to the value, so that jumping to
the loaded address will do the right thing.
</P>
<H2><A NAME="SEC230" HREF="as_toc.html#TOC230">Directives to save and restore options</A></H2>
<P>
<A NAME="IDX733"></A>
<A NAME="IDX734"></A>
<A NAME="IDX735"></A>
The directives <CODE>.set push</CODE> and <CODE>.set pop</CODE> may be used to save
and restore the current settings for all the options which are
controlled by <CODE>.set</CODE>. The <CODE>.set push</CODE> directive saves the
current settings on a stack. The <CODE>.set pop</CODE> directive pops the
stack and restores the settings.
</P>
<P>
These directives can be useful inside an macro which must change an
option such as the ISA level or instruction reordering but does not want
to change the state of the code which invoked the macro.
</P>
<P>
Traditional MIPS assemblers do not support these directives.
</P>
<P><HR><P>
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<TITLE>Using as - Command-Line Options</TITLE>
</HEAD>
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<P><HR><P>
<H1><A NAME="SEC9" HREF="as_toc.html#TOC9">Command-Line Options</A></H1>
<P>
<A NAME="IDX41"></A>
This chapter describes command-line options available in <EM>all</EM>
versions of the GNU assembler; see section <A HREF="as_8.html#SEC138">Machine Dependent Features</A>, for options specific
to particular machine architectures.
</P>
<P>
If you are invoking <CODE>as</CODE> via the GNU C compiler (version 2), you
can use the <SAMP>`-Wa'</SAMP> option to pass arguments through to the
assembler. The assembler arguments must be separated from each other
(and the <SAMP>`-Wa'</SAMP>) by commas. For example:
</P>
<PRE>
gcc -c -g -O -Wa,-alh,-L file.c
</PRE>
<P>
emits a listing to standard output with high-level
and assembly source.
</P>
<P>
Usually you do not need to use this <SAMP>`-Wa'</SAMP> mechanism, since many compiler
command-line options are automatically passed to the assembler by the compiler.
(You can call the GNU compiler driver with the <SAMP>`-v'</SAMP> option to see
precisely what options it passes to each compilation pass, including the
assembler.)
</P>
<H2><A NAME="SEC10" HREF="as_toc.html#TOC10">Enable Listings: <CODE>-a[cdhlns]</CODE></A></H2>
<P>
<A NAME="IDX42"></A>
<A NAME="IDX43"></A>
<A NAME="IDX44"></A>
<A NAME="IDX45"></A>
<A NAME="IDX46"></A>
<A NAME="IDX47"></A>
<A NAME="IDX48"></A>
<A NAME="IDX49"></A>
<A NAME="IDX50"></A>
</P>
<P>
These options enable listing output from the assembler. By itself,
<SAMP>`-a'</SAMP> requests high-level, assembly, and symbols listing.
You can use other letters to select specific options for the list:
<SAMP>`-ah'</SAMP> requests a high-level language listing,
<SAMP>`-al'</SAMP> requests an output-program assembly listing, and
<SAMP>`-as'</SAMP> requests a symbol table listing.
High-level listings require that a compiler debugging option like
<SAMP>`-g'</SAMP> be used, and that assembly listings (<SAMP>`-al'</SAMP>) be requested
also.
</P>
<P>
Use the <SAMP>`-ac'</SAMP> option to omit false conditionals from a listing. Any lines
which are not assembled because of a false <CODE>.if</CODE> (or <CODE>.ifdef</CODE>, or any
other conditional), or a true <CODE>.if</CODE> followed by an <CODE>.else</CODE>, will be
omitted from the listing.
</P>
<P>
Use the <SAMP>`-ad'</SAMP> option to omit debugging directives from the
listing.
</P>
<P>
Once you have specified one of these options, you can further control
listing output and its appearance using the directives <CODE>.list</CODE>,
<CODE>.nolist</CODE>, <CODE>.psize</CODE>, <CODE>.eject</CODE>, <CODE>.title</CODE>, and
<CODE>.sbttl</CODE>.
The <SAMP>`-an'</SAMP> option turns off all forms processing.
If you do not request listing output with one of the <SAMP>`-a'</SAMP> options, the
listing-control directives have no effect.
</P>
<P>
The letters after <SAMP>`-a'</SAMP> may be combined into one option,
<EM>e.g.</EM>, <SAMP>`-aln'</SAMP>.
</P>
<H2><A NAME="SEC11" HREF="as_toc.html#TOC11"><CODE>-D</CODE></A></H2>
<P>
<A NAME="IDX51"></A>
This option has no effect whatsoever, but it is accepted to make it more
likely that scripts written for other assemblers also work with
<CODE>as</CODE>.
</P>
<H2><A NAME="SEC12" HREF="as_toc.html#TOC12">Work Faster: <CODE>-f</CODE></A></H2>
<P>
<A NAME="IDX52"></A>
<A NAME="IDX53"></A>
<A NAME="IDX54"></A>
<SAMP>`-f'</SAMP> should only be used when assembling programs written by a
(trusted) compiler. <SAMP>`-f'</SAMP> stops the assembler from doing whitespace
and comment preprocessing on
the input file(s) before assembling them. See section <A HREF="as_3.html#SEC26">Preprocessing</A>.
</P>
<BLOCKQUOTE>
<P>
<EM>Warning:</EM> if you use <SAMP>`-f'</SAMP> when the files actually need to be
preprocessed (if they contain comments, for example), <CODE>as</CODE> does
not work correctly.
</BLOCKQUOTE>
<H2><A NAME="SEC13" HREF="as_toc.html#TOC13"><CODE>.include</CODE> search path: <CODE>-I</CODE> <VAR>path</VAR></A></H2>
<P>
<A NAME="IDX55"></A>
<A NAME="IDX56"></A>
<A NAME="IDX57"></A>
<A NAME="IDX58"></A>
Use this option to add a <VAR>path</VAR> to the list of directories
<CODE>as</CODE> searches for files specified in <CODE>.include</CODE>
directives (see section <A HREF="as_7.html#SEC97"><CODE>.include "<VAR>file</CODE>"</VAR></A>). You may use <CODE>-I</CODE> as
many times as necessary to include a variety of paths. The current
working directory is always searched first; after that, <CODE>as</CODE>
searches any <SAMP>`-I'</SAMP> directories in the same order as they were
specified (left to right) on the command line.
</P>
<H2><A NAME="SEC14" HREF="as_toc.html#TOC14">Difference Tables: <CODE>-K</CODE></A></H2>
<P>
<A NAME="IDX59"></A>
</P>
<P>
<A NAME="IDX60"></A>
<A NAME="IDX61"></A>
<CODE>as</CODE> sometimes alters the code emitted for directives of the form
<SAMP>`.word <VAR>sym1</VAR>-<VAR>sym2</VAR>'</SAMP>; see section <A HREF="as_7.html#SEC136"><CODE>.word <VAR>expressions</CODE></VAR></A>.
You can use the <SAMP>`-K'</SAMP> option if you want a warning issued when this
is done.
</P>
<H2><A NAME="SEC15" HREF="as_toc.html#TOC15">Include Local Labels: <CODE>-L</CODE></A></H2>
<P>
<A NAME="IDX62"></A>
<A NAME="IDX63"></A>
Labels beginning with <SAMP>`L'</SAMP> (upper case only) are called <EM>local
labels</EM>. See section <A HREF="as_5.html#SEC48">Symbol Names</A>. Normally you do not see such labels when
debugging, because they are intended for the use of programs (like
compilers) that compose assembler programs, not for your notice.
Normally both <CODE>as</CODE> and <CODE>ld</CODE> discard such labels, so you do not
normally debug with them.
</P>
<P>
This option tells <CODE>as</CODE> to retain those <SAMP>`L...'</SAMP> symbols
in the object file. Usually if you do this you also tell the linker
<CODE>ld</CODE> to preserve symbols whose names begin with <SAMP>`L'</SAMP>.
</P>
<P>
By default, a local label is any label beginning with <SAMP>`L'</SAMP>, but each
target is allowed to redefine the local label prefix.
On the HPPA local labels begin with <SAMP>`L$'</SAMP>.
<SAMP>`;'</SAMP> for the ARM family;
</P>
<H2><A NAME="SEC16" HREF="as_toc.html#TOC16">Assemble in MRI Compatibility Mode: <CODE>-M</CODE></A></H2>
<P>
<A NAME="IDX64"></A>
<A NAME="IDX65"></A>
The <CODE>-M</CODE> or <CODE>--mri</CODE> option selects MRI compatibility mode. This
changes the syntax and pseudo-op handling of <CODE>as</CODE> to make it
compatible with the <CODE>ASM68K</CODE> or the <CODE>ASM960</CODE> (depending upon the
configured target) assembler from Microtec Research. The exact nature of the
MRI syntax will not be documented here; see the MRI manuals for more
information. Note in particular that the handling of macros and macro
arguments is somewhat different. The purpose of this option is to permit
assembling existing MRI assembler code using <CODE>as</CODE>.
</P>
<P>
The MRI compatibility is not complete. Certain operations of the MRI assembler
depend upon its object file format, and can not be supported using other object
file formats. Supporting these would require enhancing each object file format
individually. These are:
</P>
<UL>
<LI>global symbols in common section
The m68k MRI assembler supports common sections which are merged by the linker.
Other object file formats do not support this. <CODE>as</CODE> handles
common sections by treating them as a single common symbol. It permits local
symbols to be defined within a common section, but it can not support global
symbols, since it has no way to describe them.
<LI>complex relocations
The MRI assemblers support relocations against a negated section address, and
relocations which combine the start addresses of two or more sections. These
are not support by other object file formats.
<LI><CODE>END</CODE> pseudo-op specifying start address
The MRI <CODE>END</CODE> pseudo-op permits the specification of a start address.
This is not supported by other object file formats. The start address may
instead be specified using the <CODE>-e</CODE> option to the linker, or in a linker
script.
<LI><CODE>IDNT</CODE>, <CODE>.ident</CODE> and <CODE>NAME</CODE> pseudo-ops
The MRI <CODE>IDNT</CODE>, <CODE>.ident</CODE> and <CODE>NAME</CODE> pseudo-ops assign a module
name to the output file. This is not supported by other object file formats.
<LI><CODE>ORG</CODE> pseudo-op
The m68k MRI <CODE>ORG</CODE> pseudo-op begins an absolute section at a given
address. This differs from the usual <CODE>as</CODE> <CODE>.org</CODE> pseudo-op,
which changes the location within the current section. Absolute sections are
not supported by other object file formats. The address of a section may be
assigned within a linker script.
</UL>
<P>
There are some other features of the MRI assembler which are not supported by
<CODE>as</CODE>, typically either because they are difficult or because they
seem of little consequence. Some of these may be supported in future releases.
</P>
<UL>
<LI>EBCDIC strings
EBCDIC strings are not supported.
<LI>packed binary coded decimal
Packed binary coded decimal is not supported. This means that the <CODE>DC.P</CODE>
and <CODE>DCB.P</CODE> pseudo-ops are not supported.
<LI><CODE>FEQU</CODE> pseudo-op
The m68k <CODE>FEQU</CODE> pseudo-op is not supported.
<LI><CODE>NOOBJ</CODE> pseudo-op
The m68k <CODE>NOOBJ</CODE> pseudo-op is not supported.
<LI><CODE>OPT</CODE> branch control options
The m68k <CODE>OPT</CODE> branch control options---<CODE>B</CODE>, <CODE>BRS</CODE>, <CODE>BRB</CODE>,
<CODE>BRL</CODE>, and <CODE>BRW</CODE>---are ignored. <CODE>as</CODE> automatically
relaxes all branches, whether forward or backward, to an appropriate size, so
these options serve no purpose.
<LI><CODE>OPT</CODE> list control options
The following m68k <CODE>OPT</CODE> list control options are ignored: <CODE>C</CODE>,
<CODE>CEX</CODE>, <CODE>CL</CODE>, <CODE>CRE</CODE>, <CODE>E</CODE>, <CODE>G</CODE>, <CODE>I</CODE>, <CODE>M</CODE>,
<CODE>MEX</CODE>, <CODE>MC</CODE>, <CODE>MD</CODE>, <CODE>X</CODE>.
<LI>other <CODE>OPT</CODE> options
The following m68k <CODE>OPT</CODE> options are ignored: <CODE>NEST</CODE>, <CODE>O</CODE>,
<CODE>OLD</CODE>, <CODE>OP</CODE>, <CODE>P</CODE>, <CODE>PCO</CODE>, <CODE>PCR</CODE>, <CODE>PCS</CODE>, <CODE>R</CODE>.
<LI><CODE>OPT</CODE> <CODE>D</CODE> option is default
The m68k <CODE>OPT</CODE> <CODE>D</CODE> option is the default, unlike the MRI assembler.
<CODE>OPT NOD</CODE> may be used to turn it off.
<LI><CODE>XREF</CODE> pseudo-op.
The m68k <CODE>XREF</CODE> pseudo-op is ignored.
<LI><CODE>.debug</CODE> pseudo-op
The i960 <CODE>.debug</CODE> pseudo-op is not supported.
<LI><CODE>.extended</CODE> pseudo-op
The i960 <CODE>.extended</CODE> pseudo-op is not supported.
<LI><CODE>.list</CODE> pseudo-op.
The various options of the i960 <CODE>.list</CODE> pseudo-op are not supported.
<LI><CODE>.optimize</CODE> pseudo-op
The i960 <CODE>.optimize</CODE> pseudo-op is not supported.
<LI><CODE>.output</CODE> pseudo-op
The i960 <CODE>.output</CODE> pseudo-op is not supported.
<LI><CODE>.setreal</CODE> pseudo-op
The i960 <CODE>.setreal</CODE> pseudo-op is not supported.
</UL>
<H2><A NAME="SEC17" HREF="as_toc.html#TOC17">Dependency tracking: <CODE>--MD</CODE></A></H2>
<P>
<A NAME="IDX66"></A>
<A NAME="IDX67"></A>
<A NAME="IDX68"></A>
</P>
<P>
<CODE>as</CODE> can generate a dependency file for the file it creates. This
file consists of a single rule suitable for <CODE>make</CODE> describing the
dependencies of the main source file.
</P>
<P>
The rule is written to the file named in its argument.
</P>
<P>
This feature is used in the automatic updating of makefiles.
</P>
<H2><A NAME="SEC18" HREF="as_toc.html#TOC18">Name the Object File: <CODE>-o</CODE></A></H2>
<P>
<A NAME="IDX69"></A>
<A NAME="IDX70"></A>
<A NAME="IDX71"></A>
There is always one object file output when you run <CODE>as</CODE>. By
default it has the name
<TT>`a.out'</TT> (or <TT>`b.out'</TT>, for Intel 960 targets only).
You use this option (which takes exactly one filename) to give the
object file a different name.
</P>
<P>
Whatever the object file is called, <CODE>as</CODE> overwrites any
existing file of the same name.
</P>
<H2><A NAME="SEC19" HREF="as_toc.html#TOC19">Join Data and Text Sections: <CODE>-R</CODE></A></H2>
<P>
<A NAME="IDX72"></A>
<A NAME="IDX73"></A>
<A NAME="IDX74"></A>
<A NAME="IDX75"></A>
<A NAME="IDX76"></A>
<CODE>-R</CODE> tells <CODE>as</CODE> to write the object file as if all
data-section data lives in the text section. This is only done at
the very last moment: your binary data are the same, but data
section parts are relocated differently. The data section part of
your object file is zero bytes long because all its bytes are
appended to the text section. (See section <A HREF="as_4.html#SEC39">Sections and Relocation</A>.)
</P>
<P>
When you specify <CODE>-R</CODE> it would be possible to generate shorter
address displacements (because we do not have to cross between text and
data section). We refrain from doing this simply for compatibility with
older versions of <CODE>as</CODE>. In future, <CODE>-R</CODE> may work this way.
</P>
<P>
When <CODE>as</CODE> is configured for COFF output,
this option is only useful if you use sections named <SAMP>`.text'</SAMP> and
<SAMP>`.data'</SAMP>.
</P>
<P>
<CODE>-R</CODE> is not supported for any of the HPPA targets. Using
<CODE>-R</CODE> generates a warning from <CODE>as</CODE>.
</P>
<H2><A NAME="SEC20" HREF="as_toc.html#TOC20">Display Assembly Statistics: <CODE>--statistics</CODE></A></H2>
<P>
<A NAME="IDX77"></A>
<A NAME="IDX78"></A>
<A NAME="IDX79"></A>
<A NAME="IDX80"></A>
Use <SAMP>`--statistics'</SAMP> to display two statistics about the resources used by
<CODE>as</CODE>: the maximum amount of space allocated during the assembly
(in bytes), and the total execution time taken for the assembly (in CPU
seconds).
</P>
<H2><A NAME="SEC21" HREF="as_toc.html#TOC21">Compatible output: <CODE>--traditional-format</CODE></A></H2>
<P>
<A NAME="IDX81"></A>
For some targets, the output of <CODE>as</CODE> is different in some ways
from the output of some existing assembler. This switch requests
<CODE>as</CODE> to use the traditional format instead.
</P>
<P>
For example, it disables the exception frame optimizations which
<CODE>as</CODE> normally does by default on <CODE>gcc</CODE> output.
</P>
<H2><A NAME="SEC22" HREF="as_toc.html#TOC22">Announce Version: <CODE>-v</CODE></A></H2>
<P>
<A NAME="IDX82"></A>
<A NAME="IDX83"></A>
<A NAME="IDX84"></A>
<A NAME="IDX85"></A>
You can find out what version of as is running by including the
option <SAMP>`-v'</SAMP> (which you can also spell as <SAMP>`-version'</SAMP>) on the
command line.
</P>
<H2><A NAME="SEC23" HREF="as_toc.html#TOC23">Suppress Warnings: <CODE>-W</CODE></A></H2>
<P>
<A NAME="IDX86"></A>
<A NAME="IDX87"></A>
<A NAME="IDX88"></A>
<CODE>as</CODE> should never give a warning or error message when
assembling compiler output. But programs written by people often
cause <CODE>as</CODE> to give a warning that a particular assumption was
made. All such warnings are directed to the standard error file.
If you use this option, no warnings are issued. This option only
affects the warning messages: it does not change any particular of how
<CODE>as</CODE> assembles your file. Errors, which stop the assembly, are
still reported.
</P>
<H2><A NAME="SEC24" HREF="as_toc.html#TOC24">Generate Object File in Spite of Errors: <CODE>-Z</CODE></A></H2>
<P>
<A NAME="IDX89"></A>
<A NAME="IDX90"></A>
After an error message, <CODE>as</CODE> normally produces no output. If for
some reason you are interested in object file output even after
<CODE>as</CODE> gives an error message on your program, use the <SAMP>`-Z'</SAMP>
option. If there are any errors, <CODE>as</CODE> continues anyways, and
writes an object file after a final warning message of the form <SAMP>`<VAR>n</VAR>
errors, <VAR>m</VAR> warnings, generating bad object file.'</SAMP>
</P>
<P><HR><P>
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<TITLE>Using as - Hitachi SH Dependent Features</TITLE>
</HEAD>
<BODY>
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<P><HR><P>
<H1><A NAME="SEC231" HREF="as_toc.html#TOC231">Hitachi SH Dependent Features</A></H1>
<P>
<A NAME="IDX736"></A>
</P>
<H2><A NAME="SEC232" HREF="as_toc.html#TOC232">Options</A></H2>
<P>
<A NAME="IDX737"></A>
<A NAME="IDX738"></A>
<CODE>as</CODE> has no additional command-line options for the Hitachi
SH family.
</P>
<H2><A NAME="SEC233" HREF="as_toc.html#TOC233">Syntax</A></H2>
<H3><A NAME="SEC234" HREF="as_toc.html#TOC234">Special Characters</A></H3>
<P>
<A NAME="IDX739"></A>
<A NAME="IDX740"></A>
<SAMP>`!'</SAMP> is the line comment character.
</P>
<P>
<A NAME="IDX741"></A>
<A NAME="IDX742"></A>
<A NAME="IDX743"></A>
You can use <SAMP>`;'</SAMP> instead of a newline to separate statements.
</P>
<P>
<A NAME="IDX744"></A>
<A NAME="IDX745"></A>
Since <SAMP>`$'</SAMP> has no special meaning, you may use it in symbol names.
</P>
<H3><A NAME="SEC235" HREF="as_toc.html#TOC235">Register Names</A></H3>
<P>
<A NAME="IDX746"></A>
<A NAME="IDX747"></A>
You can use the predefined symbols <SAMP>`r0'</SAMP>, <SAMP>`r1'</SAMP>, <SAMP>`r2'</SAMP>,
<SAMP>`r3'</SAMP>, <SAMP>`r4'</SAMP>, <SAMP>`r5'</SAMP>, <SAMP>`r6'</SAMP>, <SAMP>`r7'</SAMP>, <SAMP>`r8'</SAMP>,
<SAMP>`r9'</SAMP>, <SAMP>`r10'</SAMP>, <SAMP>`r11'</SAMP>, <SAMP>`r12'</SAMP>, <SAMP>`r13'</SAMP>, <SAMP>`r14'</SAMP>,
and <SAMP>`r15'</SAMP> to refer to the SH registers.
</P>
<P>
The SH also has these control registers:
</P>
<DL COMPACT>
<DT><CODE>pr</CODE>
<DD>
procedure register (holds return address)
<DT><CODE>pc</CODE>
<DD>
program counter
<DT><CODE>mach</CODE>
<DD>
<DT><CODE>macl</CODE>
<DD>
high and low multiply accumulator registers
<DT><CODE>sr</CODE>
<DD>
status register
<DT><CODE>gbr</CODE>
<DD>
global base register
<DT><CODE>vbr</CODE>
<DD>
vector base register (for interrupt vectors)
</DL>
<H3><A NAME="SEC236" HREF="as_toc.html#TOC236">Addressing Modes</A></H3>
<P>
<A NAME="IDX748"></A>
<A NAME="IDX749"></A>
<CODE>as</CODE> understands the following addressing modes for the SH.
<CODE>R<VAR>n</VAR></CODE> in the following refers to any of the numbered
registers, but <EM>not</EM> the control registers.
</P>
<DL COMPACT>
<DT><CODE>R<VAR>n</VAR></CODE>
<DD>
Register direct
<DT><CODE>@R<VAR>n</VAR></CODE>
<DD>
Register indirect
<DT><CODE>@-R<VAR>n</VAR></CODE>
<DD>
Register indirect with pre-decrement
<DT><CODE>@R<VAR>n</VAR>+</CODE>
<DD>
Register indirect with post-increment
<DT><CODE>@(<VAR>disp</VAR>, R<VAR>n</VAR>)</CODE>
<DD>
Register indirect with displacement
<DT><CODE>@(R0, R<VAR>n</VAR>)</CODE>
<DD>
Register indexed
<DT><CODE>@(<VAR>disp</VAR>, GBR)</CODE>
<DD>
<CODE>GBR</CODE> offset
<DT><CODE>@(R0, GBR)</CODE>
<DD>
GBR indexed
<DT><CODE><VAR>addr</VAR></CODE>
<DD>
<DT><CODE>@(<VAR>disp</VAR>, PC)</CODE>
<DD>
PC relative address (for branch or for addressing memory). The
<CODE>as</CODE> implementation allows you to use the simpler form
<VAR>addr</VAR> anywhere a PC relative address is called for; the alternate
form is supported for compatibility with other assemblers.
<DT><CODE>#<VAR>imm</VAR></CODE>
<DD>
Immediate data
</DL>
<H2><A NAME="SEC237" HREF="as_toc.html#TOC237">Floating Point</A></H2>
<P>
<A NAME="IDX750"></A>
<A NAME="IDX751"></A>
The SH family has no hardware floating point, but the <CODE>.float</CODE>
directive generates IEEE floating-point numbers for compatibility
with other development tools.
</P>
<H2><A NAME="SEC238" HREF="as_toc.html#TOC238">SH Machine Directives</A></H2>
<P>
<A NAME="IDX752"></A>
<A NAME="IDX753"></A>
<A NAME="IDX754"></A>
<A NAME="IDX755"></A>
</P>
<DL COMPACT>
<DT><CODE>uaword</CODE>
<DD>
<DT><CODE>ualong</CODE>
<DD>
<CODE>as</CODE> will issue a warning when a misaligned <CODE>.word</CODE> or
<CODE>.long</CODE> directive is used. You may use <CODE>.uaword</CODE> or
<CODE>.ualong</CODE> to indicate that the value is intentionally misaligned.
</DL>
<H2><A NAME="SEC239" HREF="as_toc.html#TOC239">Opcodes</A></H2>
<P>
<A NAME="IDX756"></A>
<A NAME="IDX757"></A>
<A NAME="IDX758"></A>
<A NAME="IDX759"></A>
For detailed information on the SH machine instruction set, see
<CITE>SH-Microcomputer User's Manual</CITE> (Hitachi Micro Systems, Inc.).
</P>
<P>
<CODE>as</CODE> implements all the standard SH opcodes. No additional
pseudo-instructions are needed on this family. Note, however, that
because <CODE>as</CODE> supports a simpler form of PC-relative
addressing, you may simply write (for example)
</P>
<PRE>
mov.l bar,r0
</PRE>
<P>
where other assemblers might require an explicit displacement to
<CODE>bar</CODE> from the program counter:
</P>
<PRE>
mov.l @(<VAR>disp</VAR>, PC)
</PRE>
<P><HR><P>
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<TITLE>Using as - SPARC Dependent Features</TITLE>
</HEAD>
<BODY>
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<P><HR><P>
<H1><A NAME="SEC240" HREF="as_toc.html#TOC240">SPARC Dependent Features</A></H1>
<P>
<A NAME="IDX760"></A>
</P>
<H2><A NAME="SEC241" HREF="as_toc.html#TOC241">Options</A></H2>
<P>
<A NAME="IDX761"></A>
<A NAME="IDX762"></A>
<A NAME="IDX763"></A>
<A NAME="IDX764"></A>
The SPARC chip family includes several successive levels, using the same
core instruction set, but including a few additional instructions at
each level. There are exceptions to this however. For details on what
instructions each variant supports, please see the chip's architecture
reference manual.
</P>
<P>
By default, <CODE>as</CODE> assumes the core instruction set (SPARC
v6), but "bumps" the architecture level as needed: it switches to
successively higher architectures as it encounters instructions that
only exist in the higher levels.
</P>
<P>
If not configured for SPARC v9 (<CODE>sparc64-*-*</CODE>) GAS will not bump
passed sparclite by default, an option must be passed to enable the
v9 instructions.
</P>
<P>
GAS treats sparclite as being compatible with v8, unless an architecture
is explicitly requested. SPARC v9 is always incompatible with sparclite.
</P>
<DL COMPACT>
<DT><CODE>-Av6 | -Av7 | -Av8 | -Asparclet | -Asparclite</CODE>
<DD>
<A NAME="IDX765"></A>
<A NAME="IDX766"></A>
<A NAME="IDX767"></A>
<A NAME="IDX768"></A>
<A NAME="IDX769"></A>
<A NAME="IDX770"></A>
<A NAME="IDX771"></A>
<DT><CODE>-Av8plus | -Av8plusa | -Av9 | -Av9a</CODE>
<DD>
Use one of the <SAMP>`-A'</SAMP> options to select one of the SPARC
architectures explicitly. If you select an architecture explicitly,
<CODE>as</CODE> reports a fatal error if it encounters an instruction
or feature requiring an incompatible or higher level.
<SAMP>`-Av8plus'</SAMP> and <SAMP>`-Av8plusa'</SAMP> select a 32 bit environment.
<SAMP>`-Av9'</SAMP> and <SAMP>`-Av9a'</SAMP> select a 64 bit environment and are not
available unless GAS is explicitly configured with 64 bit environment
support.
<SAMP>`-Av8plusa'</SAMP> and <SAMP>`-Av9a'</SAMP> enable the SPARC V9 instruction set with
UltraSPARC extensions.
<DT><CODE>-xarch=v8plus | -xarch=v8plusa</CODE>
<DD>
For compatibility with the Solaris v9 assembler. These options are
equivalent to -Av8plus and -Av8plusa, respectively.
<DT><CODE>-bump</CODE>
<DD>
Warn whenever it is necessary to switch to another level.
If an architecture level is explicitly requested, GAS will not issue
warnings until that level is reached, and will then bump the level
as required (except between incompatible levels).
<DT><CODE>-32 | -64</CODE>
<DD>
Select the word size, either 32 bits or 64 bits.
These options are only available with the ELF object file format,
and require that the necessary BFD support has been included.
</DL>
<H2><A NAME="SEC242" HREF="as_toc.html#TOC242">Enforcing aligned data</A></H2>
<P>
<A NAME="IDX772"></A>
<A NAME="IDX773"></A>
SPARC GAS normally permits data to be misaligned. For example, it
permits the <CODE>.long</CODE> pseudo-op to be used on a byte boundary.
However, the native SunOS and Solaris assemblers issue an error when
they see misaligned data.
</P>
<P>
<A NAME="IDX774"></A>
You can use the <CODE>--enforce-aligned-data</CODE> option to make SPARC GAS
also issue an error about misaligned data, just as the SunOS and Solaris
assemblers do.
</P>
<P>
The <CODE>--enforce-aligned-data</CODE> option is not the default because gcc
issues misaligned data pseudo-ops when it initializes certain packed
data structures (structures defined using the <CODE>packed</CODE> attribute).
You may have to assemble with GAS in order to initialize packed data
structures in your own code.
</P>
<H2><A NAME="SEC243" HREF="as_toc.html#TOC243">Floating Point</A></H2>
<P>
<A NAME="IDX775"></A>
<A NAME="IDX776"></A>
The Sparc uses IEEE floating-point numbers.
</P>
<H2><A NAME="SEC244" HREF="as_toc.html#TOC244">Sparc Machine Directives</A></H2>
<P>
<A NAME="IDX777"></A>
<A NAME="IDX778"></A>
The Sparc version of <CODE>as</CODE> supports the following additional
machine directives:
</P>
<DL COMPACT>
<DT><CODE>.align</CODE>
<DD>
<A NAME="IDX779"></A>
This must be followed by the desired alignment in bytes.
<A NAME="IDX780"></A>
<DT><CODE>.common</CODE>
<DD>
This must be followed by a symbol name, a positive number, and
<CODE>"bss"</CODE>. This behaves somewhat like <CODE>.comm</CODE>, but the
syntax is different.
<A NAME="IDX781"></A>
<DT><CODE>.half</CODE>
<DD>
This is functionally identical to <CODE>.short</CODE>.
<A NAME="IDX782"></A>
<DT><CODE>.proc</CODE>
<DD>
This directive is ignored. Any text following it on the same
line is also ignored.
<A NAME="IDX783"></A>
<DT><CODE>.reserve</CODE>
<DD>
This must be followed by a symbol name, a positive number, and
<CODE>"bss"</CODE>. This behaves somewhat like <CODE>.lcomm</CODE>, but the
syntax is different.
<A NAME="IDX784"></A>
<DT><CODE>.seg</CODE>
<DD>
This must be followed by <CODE>"text"</CODE>, <CODE>"data"</CODE>, or
<CODE>"data1"</CODE>. It behaves like <CODE>.text</CODE>, <CODE>.data</CODE>, or
<CODE>.data 1</CODE>.
<A NAME="IDX785"></A>
<DT><CODE>.skip</CODE>
<DD>
This is functionally identical to the <CODE>.space</CODE> directive.
<A NAME="IDX786"></A>
<DT><CODE>.word</CODE>
<DD>
On the Sparc, the <CODE>.word</CODE> directive produces 32 bit values,
instead of the 16 bit values it produces on many other machines.
<A NAME="IDX787"></A>
<DT><CODE>.xword</CODE>
<DD>
On the Sparc V9 processor, the <CODE>.xword</CODE> directive produces
64 bit values.
</DL>
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<TITLE>Using as - Z8000 Dependent Features</TITLE>
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<P><HR><P>
<H1><A NAME="SEC245" HREF="as_toc.html#TOC245">Z8000 Dependent Features</A></H1>
<P>
<A NAME="IDX788"></A>
The Z8000 as supports both members of the Z8000 family: the
unsegmented Z8002, with 16 bit addresses, and the segmented Z8001 with
24 bit addresses.
</P>
<P>
When the assembler is in unsegmented mode (specified with the
<CODE>unsegm</CODE> directive), an address takes up one word (16 bit)
sized register. When the assembler is in segmented mode (specified with
the <CODE>segm</CODE> directive), a 24-bit address takes up a long (32 bit)
register. See section <A HREF="as_22.html#SEC251">Assembler Directives for the Z8000</A>,
for a list of other Z8000 specific assembler directives.
</P>
<H2><A NAME="SEC246" HREF="as_toc.html#TOC246">Options</A></H2>
<P>
<A NAME="IDX789"></A>
<A NAME="IDX790"></A>
<CODE>as</CODE> has no additional command-line options for the Zilog
Z8000 family.
</P>
<H2><A NAME="SEC247" HREF="as_toc.html#TOC247">Syntax</A></H2>
<H3><A NAME="SEC248" HREF="as_toc.html#TOC248">Special Characters</A></H3>
<P>
<A NAME="IDX791"></A>
<A NAME="IDX792"></A>
<SAMP>`!'</SAMP> is the line comment character.
</P>
<P>
<A NAME="IDX793"></A>
<A NAME="IDX794"></A>
<A NAME="IDX795"></A>
You can use <SAMP>`;'</SAMP> instead of a newline to separate statements.
</P>
<H3><A NAME="SEC249" HREF="as_toc.html#TOC249">Register Names</A></H3>
<P>
<A NAME="IDX796"></A>
<A NAME="IDX797"></A>
The Z8000 has sixteen 16 bit registers, numbered 0 to 15. You can refer
to different sized groups of registers by register number, with the
prefix <SAMP>`r'</SAMP> for 16 bit registers, <SAMP>`rr'</SAMP> for 32 bit registers and
<SAMP>`rq'</SAMP> for 64 bit registers. You can also refer to the contents of
the first eight (of the sixteen 16 bit registers) by bytes. They are
named <SAMP>`r<VAR>n</VAR>h'</SAMP> and <SAMP>`r<VAR>n</VAR>l'</SAMP>.
</P>
<PRE>
<EM>byte registers</EM>
r0l r0h r1h r1l r2h r2l r3h r3l
r4h r4l r5h r5l r6h r6l r7h r7l
<EM>word registers</EM>
r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 r10 r11 r12 r13 r14 r15
<EM>long word registers</EM>
rr0 rr2 rr4 rr6 rr8 rr10 rr12 rr14
<EM>quad word registers</EM>
rq0 rq4 rq8 rq12
</PRE>
<H3><A NAME="SEC250" HREF="as_toc.html#TOC250">Addressing Modes</A></H3>
<P>
<A NAME="IDX798"></A>
<A NAME="IDX799"></A>
as understands the following addressing modes for the Z8000:
</P>
<DL COMPACT>
<DT><CODE>r<VAR>n</VAR></CODE>
<DD>
Register direct
<DT><CODE>@r<VAR>n</VAR></CODE>
<DD>
Indirect register
<DT><CODE><VAR>addr</VAR></CODE>
<DD>
Direct: the 16 bit or 24 bit address (depending on whether the assembler
is in segmented or unsegmented mode) of the operand is in the instruction.
<DT><CODE>address(r<VAR>n</VAR>)</CODE>
<DD>
Indexed: the 16 or 24 bit address is added to the 16 bit register to produce
the final address in memory of the operand.
<DT><CODE>r<VAR>n</VAR>(#<VAR>imm</VAR>)</CODE>
<DD>
Base Address: the 16 or 24 bit register is added to the 16 bit sign
extended immediate displacement to produce the final address in memory
of the operand.
<DT><CODE>r<VAR>n</VAR>(r<VAR>m</VAR>)</CODE>
<DD>
Base Index: the 16 or 24 bit register r<VAR>n</VAR> is added to the sign
extended 16 bit index register r<VAR>m</VAR> to produce the final address in
memory of the operand.
<DT><CODE>#<VAR>xx</VAR></CODE>
<DD>
Immediate data <VAR>xx</VAR>.
</DL>
<H2><A NAME="SEC251" HREF="as_toc.html#TOC251">Assembler Directives for the Z8000</A></H2>
<P>
<A NAME="IDX800"></A>
<A NAME="IDX801"></A>
The Z8000 port of as includes these additional assembler directives,
for compatibility with other Z8000 assemblers. As shown, these do not
begin with <SAMP>`.'</SAMP> (unlike the ordinary as directives).
</P>
<DL COMPACT>
<DT><CODE>segm</CODE>
<DD>
<A NAME="IDX802"></A>
Generates code for the segmented Z8001.
<A NAME="IDX803"></A>
<DT><CODE>unsegm</CODE>
<DD>
Generates code for the unsegmented Z8002.
<A NAME="IDX804"></A>
<DT><CODE>name</CODE>
<DD>
Synonym for <CODE>.file</CODE>
<A NAME="IDX805"></A>
<DT><CODE>global</CODE>
<DD>
Synonym for <CODE>.global</CODE>
<A NAME="IDX806"></A>
<DT><CODE>wval</CODE>
<DD>
Synonym for <CODE>.word</CODE>
<A NAME="IDX807"></A>
<DT><CODE>lval</CODE>
<DD>
Synonym for <CODE>.long</CODE>
<A NAME="IDX808"></A>
<DT><CODE>bval</CODE>
<DD>
Synonym for <CODE>.byte</CODE>
<A NAME="IDX809"></A>
<DT><CODE>sval</CODE>
<DD>
Assemble a string. <CODE>sval</CODE> expects one string literal, delimited by
single quotes. It assembles each byte of the string into consecutive
addresses. You can use the escape sequence <SAMP>`%<VAR>xx</VAR>'</SAMP> (where
<VAR>xx</VAR> represents a two-digit hexadecimal number) to represent the
character whose ASCII value is <VAR>xx</VAR>. Use this feature to
describe single quote and other characters that may not appear in string
literals as themselves. For example, the C statement <SAMP>`char *a =
"he said \"it's 50% off\"";'</SAMP> is represented in Z8000 assembly language
(shown with the assembler output in hex at the left) as
@begingroup
@let@nonarrowing=@comment
<PRE>
68652073 sval 'he said %22it%27s 50%25 off%22%00'
61696420
22697427
73203530
25206F66
662200
</PRE>
@endgroup
<A NAME="IDX810"></A>
<DT><CODE>rsect</CODE>
<DD>
synonym for <CODE>.section</CODE>
<A NAME="IDX811"></A>
<DT><CODE>block</CODE>
<DD>
synonym for <CODE>.space</CODE>
<A NAME="IDX812"></A>
<DT><CODE>even</CODE>
<DD>
special case of <CODE>.align</CODE>; aligns output to even byte boundary.
</DL>
<H2><A NAME="SEC252" HREF="as_toc.html#TOC252">Opcodes</A></H2>
<P>
<A NAME="IDX813"></A>
<A NAME="IDX814"></A>
<A NAME="IDX815"></A>
<A NAME="IDX816"></A>
For detailed information on the Z8000 machine instruction set, see
<CITE>Z8000 Technical Manual</CITE>.
</P>
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<TITLE>Using as - VAX Dependent Features</TITLE>
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<P><HR><P>
<H1><A NAME="SEC253" HREF="as_toc.html#TOC253">VAX Dependent Features</A></H1>
<P>
<A NAME="IDX817"></A>
</P>
<H2><A NAME="SEC254" HREF="as_toc.html#TOC254">VAX Command-Line Options</A></H2>
<P>
<A NAME="IDX818"></A>
<A NAME="IDX819"></A>
The Vax version of <CODE>as</CODE> accepts any of the following options,
gives a warning message that the option was ignored and proceeds.
These options are for compatibility with scripts designed for other
people's assemblers.
</P>
<DL COMPACT>
<DT><CODE><CODE>-D</CODE> (Debug)</CODE>
<DD>
<A NAME="IDX820"></A>
<A NAME="IDX821"></A>
<A NAME="IDX822"></A>
<DT><CODE><CODE>-S</CODE> (Symbol Table)</CODE>
<DD>
<DT><CODE><CODE>-T</CODE> (Token Trace)</CODE>
<DD>
These are obsolete options used to debug old assemblers.
<A NAME="IDX823"></A>
<DT><CODE><CODE>-d</CODE> (Displacement size for JUMPs)</CODE>
<DD>
This option expects a number following the <SAMP>`-d'</SAMP>. Like options
that expect filenames, the number may immediately follow the
<SAMP>`-d'</SAMP> (old standard) or constitute the whole of the command line
argument that follows <SAMP>`-d'</SAMP> (GNU standard).
<A NAME="IDX824"></A>
<DT><CODE><CODE>-V</CODE> (Virtualize Interpass Temporary File)</CODE>
<DD>
Some other assemblers use a temporary file. This option
commanded them to keep the information in active memory rather
than in a disk file. <CODE>as</CODE> always does this, so this
option is redundant.
<A NAME="IDX825"></A>
<DT><CODE><CODE>-J</CODE> (JUMPify Longer Branches)</CODE>
<DD>
Many 32-bit computers permit a variety of branch instructions
to do the same job. Some of these instructions are short (and
fast) but have a limited range; others are long (and slow) but
can branch anywhere in virtual memory. Often there are 3
flavors of branch: short, medium and long. Some other
assemblers would emit short and medium branches, unless told by
this option to emit short and long branches.
<A NAME="IDX826"></A>
<DT><CODE><CODE>-t</CODE> (Temporary File Directory)</CODE>
<DD>
Some other assemblers may use a temporary file, and this option
takes a filename being the directory to site the temporary
file. Since <CODE>as</CODE> does not use a temporary disk file, this
option makes no difference. <SAMP>`-t'</SAMP> needs exactly one
filename.
</DL>
<P>
<A NAME="IDX827"></A>
<A NAME="IDX828"></A>
<A NAME="IDX829"></A>
<A NAME="IDX830"></A>
<A NAME="IDX831"></A>
<A NAME="IDX832"></A>
<A NAME="IDX833"></A>
The Vax version of the assembler accepts two options when
compiled for VMS. They are <SAMP>`-h'</SAMP>, and <SAMP>`-+'</SAMP>. The
<SAMP>`-h'</SAMP> option prevents <CODE>as</CODE> from modifying the
symbol-table entries for symbols that contain lowercase
characters (I think). The <SAMP>`-+'</SAMP> option causes <CODE>as</CODE> to
print warning messages if the FILENAME part of the object file,
or any symbol name is larger than 31 characters. The <SAMP>`-+'</SAMP>
option also inserts some code following the <SAMP>`_main'</SAMP>
symbol so that the object file is compatible with Vax-11
"C".
</P>
<H2><A NAME="SEC255" HREF="as_toc.html#TOC255">VAX Floating Point</A></H2>
<P>
<A NAME="IDX834"></A>
<A NAME="IDX835"></A>
Conversion of flonums to floating point is correct, and
compatible with previous assemblers. Rounding is
towards zero if the remainder is exactly half the least significant bit.
</P>
<P>
<CODE>D</CODE>, <CODE>F</CODE>, <CODE>G</CODE> and <CODE>H</CODE> floating point formats
are understood.
</P>
<P>
Immediate floating literals (<EM>e.g.</EM> <SAMP>`S`$6.9'</SAMP>)
are rendered correctly. Again, rounding is towards zero in the
boundary case.
</P>
<P>
<A NAME="IDX836"></A>
<A NAME="IDX837"></A>
The <CODE>.float</CODE> directive produces <CODE>f</CODE> format numbers.
The <CODE>.double</CODE> directive produces <CODE>d</CODE> format numbers.
</P>
<H2><A NAME="SEC256" HREF="as_toc.html#TOC256">Vax Machine Directives</A></H2>
<P>
<A NAME="IDX838"></A>
<A NAME="IDX839"></A>
The Vax version of the assembler supports four directives for
generating Vax floating point constants. They are described in the
table below.
</P>
<P>
<A NAME="IDX840"></A>
<DL COMPACT>
<DT><CODE>.dfloat</CODE>
<DD>
<A NAME="IDX841"></A>
This expects zero or more flonums, separated by commas, and
assembles Vax <CODE>d</CODE> format 64-bit floating point constants.
<A NAME="IDX842"></A>
<DT><CODE>.ffloat</CODE>
<DD>
This expects zero or more flonums, separated by commas, and
assembles Vax <CODE>f</CODE> format 32-bit floating point constants.
<A NAME="IDX843"></A>
<DT><CODE>.gfloat</CODE>
<DD>
This expects zero or more flonums, separated by commas, and
assembles Vax <CODE>g</CODE> format 64-bit floating point constants.
<A NAME="IDX844"></A>
<DT><CODE>.hfloat</CODE>
<DD>
This expects zero or more flonums, separated by commas, and
assembles Vax <CODE>h</CODE> format 128-bit floating point constants.
</DL>
<H2><A NAME="SEC257" HREF="as_toc.html#TOC257">VAX Opcodes</A></H2>
<P>
<A NAME="IDX845"></A>
<A NAME="IDX846"></A>
<A NAME="IDX847"></A>
All DEC mnemonics are supported. Beware that <CODE>case...</CODE>
instructions have exactly 3 operands. The dispatch table that
follows the <CODE>case...</CODE> instruction should be made with
<CODE>.word</CODE> statements. This is compatible with all unix
assemblers we know of.
</P>
<H2><A NAME="SEC258" HREF="as_toc.html#TOC258">VAX Branch Improvement</A></H2>
<P>
<A NAME="IDX848"></A>
<A NAME="IDX849"></A>
<A NAME="IDX850"></A>
Certain pseudo opcodes are permitted. They are for branch
instructions. They expand to the shortest branch instruction that
reaches the target. Generally these mnemonics are made by
substituting <SAMP>`j'</SAMP> for <SAMP>`b'</SAMP> at the start of a DEC mnemonic.
This feature is included both for compatibility and to help
compilers. If you do not need this feature, avoid these
opcodes. Here are the mnemonics, and the code they can expand into.
</P>
<DL COMPACT>
<DT><CODE>jbsb</CODE>
<DD>
<SAMP>`Jsb'</SAMP> is already an instruction mnemonic, so we chose <SAMP>`jbsb'</SAMP>.
<DL COMPACT>
<DT>(byte displacement)
<DD>
<KBD>bsbb ...</KBD>
<DT>(word displacement)
<DD>
<KBD>bsbw ...</KBD>
<DT>(long displacement)
<DD>
<KBD>jsb ...</KBD>
</DL>
<DT><CODE>jbr</CODE>
<DD>
<DT><CODE>jr</CODE>
<DD>
Unconditional branch.
<DL COMPACT>
<DT>(byte displacement)
<DD>
<KBD>brb ...</KBD>
<DT>(word displacement)
<DD>
<KBD>brw ...</KBD>
<DT>(long displacement)
<DD>
<KBD>jmp ...</KBD>
</DL>
<DT><CODE>j<VAR>COND</VAR></CODE>
<DD>
<VAR>COND</VAR> may be any one of the conditional branches
<CODE>neq</CODE>, <CODE>nequ</CODE>, <CODE>eql</CODE>, <CODE>eqlu</CODE>, <CODE>gtr</CODE>,
<CODE>geq</CODE>, <CODE>lss</CODE>, <CODE>gtru</CODE>, <CODE>lequ</CODE>, <CODE>vc</CODE>, <CODE>vs</CODE>,
<CODE>gequ</CODE>, <CODE>cc</CODE>, <CODE>lssu</CODE>, <CODE>cs</CODE>.
<VAR>COND</VAR> may also be one of the bit tests
<CODE>bs</CODE>, <CODE>bc</CODE>, <CODE>bss</CODE>, <CODE>bcs</CODE>, <CODE>bsc</CODE>, <CODE>bcc</CODE>,
<CODE>bssi</CODE>, <CODE>bcci</CODE>, <CODE>lbs</CODE>, <CODE>lbc</CODE>.
<VAR>NOTCOND</VAR> is the opposite condition to <VAR>COND</VAR>.
<DL COMPACT>
<DT>(byte displacement)
<DD>
<KBD>b<VAR>COND</VAR> ...</KBD>
<DT>(word displacement)
<DD>
<KBD>b<VAR>NOTCOND</VAR> foo ; brw ... ; foo:</KBD>
<DT>(long displacement)
<DD>
<KBD>b<VAR>NOTCOND</VAR> foo ; jmp ... ; foo:</KBD>
</DL>
<DT><CODE>jacb<VAR>X</VAR></CODE>
<DD>
<VAR>X</VAR> may be one of <CODE>b d f g h l w</CODE>.
<DL COMPACT>
<DT>(word displacement)
<DD>
<KBD><VAR>OPCODE</VAR> ...</KBD>
<DT>(long displacement)
<DD>
<PRE>
<VAR>OPCODE</VAR> ..., foo ;
brb bar ;
foo: jmp ... ;
bar:
</PRE>
</DL>
<DT><CODE>jaob<VAR>YYY</VAR></CODE>
<DD>
<VAR>YYY</VAR> may be one of <CODE>lss leq</CODE>.
<DT><CODE>jsob<VAR>ZZZ</VAR></CODE>
<DD>
<VAR>ZZZ</VAR> may be one of <CODE>geq gtr</CODE>.
<DL COMPACT>
<DT>(byte displacement)
<DD>
<KBD><VAR>OPCODE</VAR> ...</KBD>
<DT>(word displacement)
<DD>
<PRE>
<VAR>OPCODE</VAR> ..., foo ;
brb bar ;
foo: brw <VAR>destination</VAR> ;
bar:
</PRE>
<DT>(long displacement)
<DD>
<PRE>
<VAR>OPCODE</VAR> ..., foo ;
brb bar ;
foo: jmp <VAR>destination</VAR> ;
bar:
</PRE>
</DL>
<DT><CODE>aobleq</CODE>
<DD>
<DT><CODE>aoblss</CODE>
<DD>
<DT><CODE>sobgeq</CODE>
<DD>
<DT><CODE>sobgtr</CODE>
<DD>
<DL COMPACT>
<DT>(byte displacement)
<DD>
<KBD><VAR>OPCODE</VAR> ...</KBD>
<DT>(word displacement)
<DD>
<PRE>
<VAR>OPCODE</VAR> ..., foo ;
brb bar ;
foo: brw <VAR>destination</VAR> ;
bar:
</PRE>
<DT>(long displacement)
<DD>
<PRE>
<VAR>OPCODE</VAR> ..., foo ;
brb bar ;
foo: jmp <VAR>destination</VAR> ;
bar:
</PRE>
</DL>
</DL>
<H2><A NAME="SEC259" HREF="as_toc.html#TOC259">VAX Operands</A></H2>
<P>
<A NAME="IDX851"></A>
<A NAME="IDX852"></A>
<A NAME="IDX853"></A>
<A NAME="IDX854"></A>
The immediate character is <SAMP>`$'</SAMP> for Unix compatibility, not
<SAMP>`#'</SAMP> as DEC writes it.
</P>
<P>
<A NAME="IDX855"></A>
<A NAME="IDX856"></A>
The indirect character is <SAMP>`*'</SAMP> for Unix compatibility, not
<SAMP>`@'</SAMP> as DEC writes it.
</P>
<P>
<A NAME="IDX857"></A>
<A NAME="IDX858"></A>
The displacement sizing character is <SAMP>``'</SAMP> (an accent grave) for
Unix compatibility, not <SAMP>`^'</SAMP> as DEC writes it. The letter
preceding <SAMP>``'</SAMP> may have either case. <SAMP>`G'</SAMP> is not
understood, but all other letters (<CODE>b i l s w</CODE>) are understood.
</P>
<P>
<A NAME="IDX859"></A>
<A NAME="IDX860"></A>
Register names understood are <CODE>r0 r1 r2 ... r15 ap fp sp
pc</CODE>. Upper and lower case letters are equivalent.
</P>
<P>
For instance
<PRE>
tstb *w`$4(r5)
</PRE>
<P>
Any expression is permitted in an operand. Operands are comma
separated.
</P>
<H2><A NAME="SEC260" HREF="as_toc.html#TOC260">Not Supported on VAX</A></H2>
<P>
<A NAME="IDX861"></A>
<A NAME="IDX862"></A>
Vax bit fields can not be assembled with <CODE>as</CODE>. Someone
can add the required code if they really need it.
</P>
<P><HR><P>
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<P><HR><P>
<H1><A NAME="SEC261" HREF="as_toc.html#TOC261">v850 Dependent Features</A></H1>
<P>
<A NAME="IDX863"></A>
</P>
<H2><A NAME="SEC262" HREF="as_toc.html#TOC262">Options</A></H2>
<P>
<A NAME="IDX864"></A>
<A NAME="IDX865"></A>
<CODE>as</CODE> supports the following additional command-line options
for the V850 processor family:
</P>
<P>
<A NAME="IDX866"></A>
<A NAME="IDX867"></A>
<DL COMPACT>
<DT><CODE>-wsigned_overflow</CODE>
<DD>
<A NAME="IDX868"></A>
Causes warnings to be produced when signed immediate values overflow the
space available for then within their opcodes. By default this option
is disabled as it is possible to receive spurious warnings due to using
exact bit patterns as immediate constants.
<A NAME="IDX869"></A>
<DT><CODE>-wunsigned_overflow</CODE>
<DD>
Causes warnings to be produced when unsigned immediate values overflow
the space available for then within their opcodes. By default this
option is disabled as it is possible to receive spurious warnings due to
using exact bit patterns as immediate constants.
<A NAME="IDX870"></A>
<DT><CODE>-mv850</CODE>
<DD>
Specifies that the assembled code should be marked as being targeted at
the V850 processor. This allows the linker to detect attempts to link
such code with code assembled for other processors.
</DL>
<H2><A NAME="SEC263" HREF="as_toc.html#TOC263">Syntax</A></H2>
<H3><A NAME="SEC264" HREF="as_toc.html#TOC264">Special Characters</A></H3>
<P>
<A NAME="IDX871"></A>
<A NAME="IDX872"></A>
<SAMP>`#'</SAMP> is the line comment character.
<H3><A NAME="SEC265" HREF="as_toc.html#TOC265">Register Names</A></H3>
<P>
<A NAME="IDX873"></A>
<A NAME="IDX874"></A>
<CODE>as</CODE> supports the following names for registers:
<DL COMPACT>
<DT><CODE>general register 0</CODE>
<DD>
<A NAME="IDX875"></A>
r0, zero
<DT><CODE>general register 1</CODE>
<DD>
r1
<DT><CODE>general register 2</CODE>
<DD>
r2, hp
<A NAME="IDX876"></A>
<DT><CODE>general register 3</CODE>
<DD>
r3, sp
<A NAME="IDX877"></A>
<DT><CODE>general register 4</CODE>
<DD>
r4, gp
<A NAME="IDX878"></A>
<DT><CODE>general register 5</CODE>
<DD>
r5, tp
<DT><CODE>general register 6</CODE>
<DD>
r6
<DT><CODE>general register 7</CODE>
<DD>
r7
<DT><CODE>general register 8</CODE>
<DD>
r8
<DT><CODE>general register 9</CODE>
<DD>
r9
<DT><CODE>general register 10</CODE>
<DD>
r10
<DT><CODE>general register 11</CODE>
<DD>
r11
<DT><CODE>general register 12</CODE>
<DD>
r12
<DT><CODE>general register 13</CODE>
<DD>
r13
<DT><CODE>general register 14</CODE>
<DD>
r14
<DT><CODE>general register 15</CODE>
<DD>
r15
<DT><CODE>general register 16</CODE>
<DD>
r16
<DT><CODE>general register 17</CODE>
<DD>
r17
<DT><CODE>general register 18</CODE>
<DD>
r18
<DT><CODE>general register 19</CODE>
<DD>
r19
<DT><CODE>general register 20</CODE>
<DD>
r20
<DT><CODE>general register 21</CODE>
<DD>
r21
<DT><CODE>general register 22</CODE>
<DD>
r22
<DT><CODE>general register 23</CODE>
<DD>
r23
<DT><CODE>general register 24</CODE>
<DD>
r24
<DT><CODE>general register 25</CODE>
<DD>
r25
<DT><CODE>general register 26</CODE>
<DD>
r26
<DT><CODE>general register 27</CODE>
<DD>
r27
<DT><CODE>general register 28</CODE>
<DD>
r28
<DT><CODE>general register 29</CODE>
<DD>
r29
<A NAME="IDX879"></A>
<DT><CODE>general register 30</CODE>
<DD>
r30, ep
<A NAME="IDX880"></A>
<DT><CODE>general register 31</CODE>
<DD>
r31, lp
<A NAME="IDX881"></A>
<DT><CODE>system register 0</CODE>
<DD>
eipc
<A NAME="IDX882"></A>
<DT><CODE>system register 1</CODE>
<DD>
eipsw
<A NAME="IDX883"></A>
<DT><CODE>system register 2</CODE>
<DD>
fepc
<A NAME="IDX884"></A>
<DT><CODE>system register 3</CODE>
<DD>
fepsw
<A NAME="IDX885"></A>
<DT><CODE>system register 4</CODE>
<DD>
ecr
<A NAME="IDX886"></A>
<DT><CODE>system register 5</CODE>
<DD>
psw
</DL>
<H2><A NAME="SEC266" HREF="as_toc.html#TOC266">Floating Point</A></H2>
<P>
<A NAME="IDX887"></A>
<A NAME="IDX888"></A>
The V850 family uses IEEE floating-point numbers.
</P>
<H2><A NAME="SEC267" HREF="as_toc.html#TOC267">V850 Machine Directives</A></H2>
<P>
<A NAME="IDX889"></A>
<A NAME="IDX890"></A>
<DL COMPACT>
<DT><CODE>.offset <VAR>&#60;expression&#62;</VAR></CODE>
<DD>
<A NAME="IDX891"></A>
Moves the offset into the current section to the specified amount.
<A NAME="IDX892"></A>
<DT><CODE>.section "name", &#60;type&#62;</CODE>
<DD>
This is an extension to the standard .section directive. It sets the
current section to be &#60;type&#62; and creates an alias for this section
called "name".
<A NAME="IDX893"></A>
<DT><CODE>.v850</CODE>
<DD>
Specifies that the assembled code should be marked as being targeted at
the V850 processor. This allows the linker to detect attempts to link
such code with code assembled for other processors.
</DL>
<H2><A NAME="SEC268" HREF="as_toc.html#TOC268">Opcodes</A></H2>
<P>
<A NAME="IDX894"></A>
<A NAME="IDX895"></A>
<CODE>as</CODE> implements all the standard V850 opcodes.
</P>
<P>
<CODE>as</CODE> also implements the following pseudo ops:
</P>
<DL COMPACT>
<DT><CODE>hi0()</CODE>
<DD>
<A NAME="IDX896"></A>
Computes the higher 16 bits of the given expression and stores it into
the immediate operand field of the given instruction. For example:
<SAMP>`mulhi hi0(here - there), r5, r6'</SAMP>
computes the difference between the address of labels 'here' and
'there', takes the upper 16 bits of this difference, shifts it down 16
bits and then mutliplies it by the lower 16 bits in register 5, putting
the result into register 6.
<A NAME="IDX897"></A>
<DT><CODE>lo()</CODE>
<DD>
Computes the lower 16 bits of the given expression and stores it into
the immediate operand field of the given instruction. For example:
<SAMP>`addi lo(here - there), r5, r6'</SAMP>
computes the difference between the address of labels 'here' and
'there', takes the lower 16 bits of this difference and adds it to
register 5, putting the result into register 6.
<A NAME="IDX898"></A>
<DT><CODE>hi()</CODE>
<DD>
Computes the higher 16 bits of the given expression and then adds the
value of the most significant bit of the lower 16 bits of the expression
and stores the result into the immediate operand field of the given
instruction. For example the following code can be used to compute the
address of the label 'here' and store it into register 6:
<SAMP>`movhi hi(here), r0, r6'</SAMP>
<SAMP>`movea lo(here), r6, r6'</SAMP>
The reason for this special behaviour is that movea performs a sign
extention on its immediate operand. So for example if the address of
'here' was 0xFFFFFFFF then without the special behaviour of the hi()
pseudo-op the movhi instruction would put 0xFFFF0000 into r6, then the
movea instruction would takes its immediate operand, 0xFFFF, sign extend
it to 32 bits, 0xFFFFFFFF, and then add it into r6 giving 0xFFFEFFFF
which is wrong (the fifth nibble is E). With the hi() pseudo op adding
in the top bit of the lo() pseudo op, the movhi instruction actually
stores 0 into r6 (0xFFFF + 1 = 0x0000), so that the movea instruction
stores 0xFFFFFFFF into r6 - the right value.
<A NAME="IDX899"></A>
<DT><CODE>sdaoff()</CODE>
<DD>
Computes the offset of the named variable from the start of the Small
Data Area (whoes address is held in register 4, the GP register) and
stores the result as a 16 bit signed value in the immediate operand
field of the given instruction. For example:
<SAMP>`ld.w sdaoff(_a_variable)[gp],r6'</SAMP>
loads the contents of the location pointed to by the label '_a_variable'
into register 6, provided that the label is located somewhere within +/-
32K of the address held in the GP register. [Note the linker assumes
that the GP register contains a fixed address set to the address of the
label called '__gp'. This can either be set up automatically by the
linker, or specifically set by using the <SAMP>`--defsym __gp=&#60;value&#62;'</SAMP>
command line option].
<A NAME="IDX900"></A>
<DT><CODE>tdaoff()</CODE>
<DD>
Computes the offset of the named variable from the start of the Tiny
Data Area (whoes address is held in register 30, the EP register) and
stores the result as a
7 or 8 bit unsigned value in the immediate
operand field of the given instruction. For example:
<SAMP>`sld.w tdaoff(_a_variable)[ep],r6'</SAMP>
loads the contents of the location pointed to by the label '_a_variable'
into register 6, provided that the label is located somewhere within +256
bytes of the address held in the EP register. [Note the linker assumes
that the EP register contains a fixed address set to the address of the
label called '__ep'. This can either be set up automatically by the
linker, or specifically set by using the <SAMP>`--defsym __ep=&#60;value&#62;'</SAMP>
command line option].
<A NAME="IDX901"></A>
<DT><CODE>zdaoff()</CODE>
<DD>
Computes the offset of the named variable from address 0 and stores the
result as a 16 bit signed value in the immediate operand field of the
given instruction. For example:
<SAMP>`movea zdaoff(_a_variable),zero,r6'</SAMP>
puts the address of the label '_a_variable' into register 6, assuming
that the label is somewhere within the first 32K of memory. (Strictly
speaking it also possible to access the last 32K of memory as well, as
the offsets are signed).
</DL>
<P>
For information on the V850 instruction set, see <CITE>V850
Family 32-/16-Bit single-Chip Microcontroller Architecture Manual</CITE> from NEC.
Ltd.
</P>
<P>
@raisesections
</P>
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<TITLE>Using as - Reporting Bugs</TITLE>
</HEAD>
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<P><HR><P>
<H1><A NAME="SEC269" HREF="as_toc.html#TOC269">Reporting Bugs</A></H1>
<P>
<A NAME="IDX902"></A>
<A NAME="IDX903"></A>
</P>
<P>
Your bug reports play an essential role in making <CODE>as</CODE> reliable.
</P>
<P>
Reporting a bug may help you by bringing a solution to your problem, or it may
not. But in any case the principal function of a bug report is to help the
entire community by making the next version of <CODE>as</CODE> work better.
Bug reports are your contribution to the maintenance of <CODE>as</CODE>.
</P>
<P>
In order for a bug report to serve its purpose, you must include the
information that enables us to fix the bug.
</P>
<H2><A NAME="SEC270" HREF="as_toc.html#TOC270">Have you found a bug?</A></H2>
<P>
<A NAME="IDX904"></A>
</P>
<P>
If you are not sure whether you have found a bug, here are some guidelines:
</P>
<UL>
<LI>
<A NAME="IDX905"></A>
<A NAME="IDX906"></A>
<A NAME="IDX907"></A>
If the assembler gets a fatal signal, for any input whatever, that is a
<CODE>as</CODE> bug. Reliable assemblers never crash.
<A NAME="IDX908"></A>
<LI>
If <CODE>as</CODE> produces an error message for valid input, that is a bug.
<A NAME="IDX909"></A>
<LI>
If <CODE>as</CODE> does not produce an error message for invalid input, that
is a bug. However, you should note that your idea of "invalid input" might
be our idea of "an extension" or "support for traditional practice".
<LI>
If you are an experienced user of assemblers, your suggestions for improvement
of <CODE>as</CODE> are welcome in any case.
</UL>
<H2><A NAME="SEC271" HREF="as_toc.html#TOC271">How to report bugs</A></H2>
<P>
<A NAME="IDX910"></A>
<A NAME="IDX911"></A>
</P>
<P>
A number of companies and individuals offer support for GNU products. If
you obtained <CODE>as</CODE> from a support organization, we recommend you
contact that organization first.
</P>
<P>
You can find contact information for many support companies and
individuals in the file <TT>`etc/SERVICE'</TT> in the GNU Emacs
distribution.
</P>
<P>
In any event, we also recommend that you send bug reports for <CODE>as</CODE>
to <SAMP>`bug-gnu-utils@gnu.org'</SAMP>.
</P>
<P>
The fundamental principle of reporting bugs usefully is this:
<STRONG>report all the facts</STRONG>. If you are not sure whether to state a
fact or leave it out, state it!
</P>
<P>
Often people omit facts because they think they know what causes the problem
and assume that some details do not matter. Thus, you might assume that the
name of a symbol you use in an example does not matter. Well, probably it does
not, but one cannot be sure. Perhaps the bug is a stray memory reference which
happens to fetch from the location where that name is stored in memory;
perhaps, if the name were different, the contents of that location would fool
the assembler into doing the right thing despite the bug. Play it safe and
give a specific, complete example. That is the easiest thing for you to do,
and the most helpful.
</P>
<P>
Keep in mind that the purpose of a bug report is to enable us to fix the bug if
it is new to us. Therefore, always write your bug reports on the assumption
that the bug has not been reported previously.
</P>
<P>
Sometimes people give a few sketchy facts and ask, "Does this ring a
bell?" Those bug reports are useless, and we urge everyone to
<EM>refuse to respond to them</EM> except to chide the sender to report
bugs properly.
</P>
<P>
To enable us to fix the bug, you should include all these things:
</P>
<UL>
<LI>
The version of <CODE>as</CODE>. <CODE>as</CODE> announces it if you start
it with the <SAMP>`--version'</SAMP> argument.
Without this, we will not know whether there is any point in looking for
the bug in the current version of <CODE>as</CODE>.
<LI>
Any patches you may have applied to the <CODE>as</CODE> source.
<LI>
The type of machine you are using, and the operating system name and
version number.
<LI>
What compiler (and its version) was used to compile <CODE>as</CODE>---e.g.
"<CODE>gcc-2.7</CODE>".
<LI>
The command arguments you gave the assembler to assemble your example and
observe the bug. To guarantee you will not omit something important, list them
all. A copy of the Makefile (or the output from make) is sufficient.
If we were to try to guess the arguments, we would probably guess wrong
and then we might not encounter the bug.
<LI>
A complete input file that will reproduce the bug. If the bug is observed when
the assembler is invoked via a compiler, send the assembler source, not the
high level language source. Most compilers will produce the assembler source
when run with the <SAMP>`-S'</SAMP> option. If you are using <CODE>gcc</CODE>, use
the options <SAMP>`-v --save-temps'</SAMP>; this will save the assembler source in a
file with an extension of <TT>`.s'</TT>, and also show you exactly how
<CODE>as</CODE> is being run.
<LI>
A description of what behavior you observe that you believe is
incorrect. For example, "It gets a fatal signal."
Of course, if the bug is that <CODE>as</CODE> gets a fatal signal, then we
will certainly notice it. But if the bug is incorrect output, we might not
notice unless it is glaringly wrong. You might as well not give us a chance to
make a mistake.
Even if the problem you experience is a fatal signal, you should still say so
explicitly. Suppose something strange is going on, such as, your copy of
<CODE>as</CODE> is out of synch, or you have encountered a bug in the C
library on your system. (This has happened!) Your copy might crash and ours
would not. If you told us to expect a crash, then when ours fails to crash, we
would know that the bug was not happening for us. If you had not told us to
expect a crash, then we would not be able to draw any conclusion from our
observations.
<LI>
If you wish to suggest changes to the <CODE>as</CODE> source, send us context
diffs, as generated by <CODE>diff</CODE> with the <SAMP>`-u'</SAMP>, <SAMP>`-c'</SAMP>, or <SAMP>`-p'</SAMP>
option. Always send diffs from the old file to the new file. If you even
discuss something in the <CODE>as</CODE> source, refer to it by context, not
by line number.
The line numbers in our development sources will not match those in your
sources. Your line numbers would convey no useful information to us.
</UL>
<P>
Here are some things that are not necessary:
</P>
<UL>
<LI>
A description of the envelope of the bug.
Often people who encounter a bug spend a lot of time investigating
which changes to the input file will make the bug go away and which
changes will not affect it.
This is often time consuming and not very useful, because the way we
will find the bug is by running a single example under the debugger
with breakpoints, not by pure deduction from a series of examples.
We recommend that you save your time for something else.
Of course, if you can find a simpler example to report <EM>instead</EM>
of the original one, that is a convenience for us. Errors in the
output will be easier to spot, running under the debugger will take
less time, and so on.
However, simplification is not vital; if you do not want to do this,
report the bug anyway and send us the entire test case you used.
<LI>
A patch for the bug.
A patch for the bug does help us if it is a good one. But do not omit
the necessary information, such as the test case, on the assumption that
a patch is all we need. We might see problems with your patch and decide
to fix the problem another way, or we might not understand it at all.
Sometimes with a program as complicated as <CODE>as</CODE> it is very hard to
construct an example that will make the program follow a certain path through
the code. If you do not send us the example, we will not be able to construct
one, so we will not be able to verify that the bug is fixed.
And if we cannot understand what bug you are trying to fix, or why your
patch should be an improvement, we will not install it. A test case will
help us to understand.
<LI>
A guess about what the bug is or what it depends on.
Such guesses are usually wrong. Even we cannot guess right about such
things without first using the debugger to find the facts.
</UL>
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<TITLE>Using as - Acknowledgements</TITLE>
</HEAD>
<BODY>
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<P><HR><P>
<H1><A NAME="SEC272" HREF="as_toc.html#TOC272">Acknowledgements</A></H1>
<P>
If you have contributed to <CODE>as</CODE> and your name isn't listed here,
it is not meant as a slight. We just don't know about it. Send mail to the
maintainer, and we'll correct the situation. Currently
the maintainer is Ken Raeburn (email address <CODE>raeburn@cygnus.com</CODE>).
</P>
<P>
Dean Elsner wrote the original GNU assembler for the VAX.<A NAME="DOCF1" HREF="as_foot.html#FOOT1">(1)</A>
</P>
<P>
Jay Fenlason maintained GAS for a while, adding support for GDB-specific debug
information and the 68k series machines, most of the preprocessing pass, and
extensive changes in <TT>`messages.c'</TT>, <TT>`input-file.c'</TT>, <TT>`write.c'</TT>.
</P>
<P>
K. Richard Pixley maintained GAS for a while, adding various enhancements and
many bug fixes, including merging support for several processors, breaking GAS
up to handle multiple object file format back ends (including heavy rewrite,
testing, an integration of the coff and b.out back ends), adding configuration
including heavy testing and verification of cross assemblers and file splits
and renaming, converted GAS to strictly ANSI C including full prototypes, added
support for m680[34]0 and cpu32, did considerable work on i960 including a COFF
port (including considerable amounts of reverse engineering), a SPARC opcode
file rewrite, DECstation, rs6000, and hp300hpux host ports, updated "know"
assertions and made them work, much other reorganization, cleanup, and lint.
</P>
<P>
Ken Raeburn wrote the high-level BFD interface code to replace most of the code
in format-specific I/O modules.
</P>
<P>
The original VMS support was contributed by David L. Kashtan. Eric Youngdale
has done much work with it since.
</P>
<P>
The Intel 80386 machine description was written by Eliot Dresselhaus.
</P>
<P>
Minh Tran-Le at IntelliCorp contributed some AIX 386 support.
</P>
<P>
The Motorola 88k machine description was contributed by Devon Bowen of Buffalo
University and Torbjorn Granlund of the Swedish Institute of Computer Science.
</P>
<P>
Keith Knowles at the Open Software Foundation wrote the original MIPS back end
(<TT>`tc-mips.c'</TT>, <TT>`tc-mips.h'</TT>), and contributed Rose format support
(which hasn't been merged in yet). Ralph Campbell worked with the MIPS code to
support a.out format.
</P>
<P>
Support for the Zilog Z8k and Hitachi H8/300 and H8/500 processors (tc-z8k,
tc-h8300, tc-h8500), and IEEE 695 object file format (obj-ieee), was written by
Steve Chamberlain of Cygnus Support. Steve also modified the COFF back end to
use BFD for some low-level operations, for use with the H8/300 and AMD 29k
targets.
</P>
<P>
John Gilmore built the AMD 29000 support, added <CODE>.include</CODE> support, and
simplified the configuration of which versions accept which directives. He
updated the 68k machine description so that Motorola's opcodes always produced
fixed-size instructions (e.g. <CODE>jsr</CODE>), while synthetic instructions
remained shrinkable (<CODE>jbsr</CODE>). John fixed many bugs, including true tested
cross-compilation support, and one bug in relaxation that took a week and
required the proverbial one-bit fix.
</P>
<P>
Ian Lance Taylor of Cygnus Support merged the Motorola and MIT syntax for the
68k, completed support for some COFF targets (68k, i386 SVR3, and SCO Unix),
added support for MIPS ECOFF and ELF targets, wrote the initial RS/6000 and
PowerPC assembler, and made a few other minor patches.
</P>
<P>
Steve Chamberlain made <CODE>as</CODE> able to generate listings.
</P>
<P>
Hewlett-Packard contributed support for the HP9000/300.
</P>
<P>
Jeff Law wrote GAS and BFD support for the native HPPA object format (SOM)
along with a fairly extensive HPPA testsuite (for both SOM and ELF object
formats). This work was supported by both the Center for Software Science at
the University of Utah and Cygnus Support.
</P>
<P>
Support for ELF format files has been worked on by Mark Eichin of Cygnus
Support (original, incomplete implementation for SPARC), Pete Hoogenboom and
Jeff Law at the University of Utah (HPPA mainly), Michael Meissner of the Open
Software Foundation (i386 mainly), and Ken Raeburn of Cygnus Support (sparc,
and some initial 64-bit support).
</P>
<P>
Richard Henderson rewrote the Alpha assembler. Klaus Kaempf wrote GAS and BFD
support for openVMS/Alpha.
</P>
<P>
Several engineers at Cygnus Support have also provided many small bug fixes and
configuration enhancements.
</P>
<P>
Many others have contributed large or small bugfixes and enhancements. If
you have contributed significant work and are not mentioned on this list, and
want to be, let us know. Some of the history has been lost; we are not
intentionally leaving anyone out.
</P>
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<TITLE>Using as - Syntax</TITLE>
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Go to the <A HREF="as_1.html">first</A>, <A HREF="as_2.html">previous</A>, <A HREF="as_4.html">next</A>, <A HREF="as_27.html">last</A> section, <A HREF="as_toc.html">table of contents</A>.
<P><HR><P>
<H1><A NAME="SEC25" HREF="as_toc.html#TOC25">Syntax</A></H1>
<P>
<A NAME="IDX91"></A>
<A NAME="IDX92"></A>
This chapter describes the machine-independent syntax allowed in a
source file. <CODE>as</CODE> syntax is similar to what many other
assemblers use; it is inspired by the BSD 4.2
assembler, except that <CODE>as</CODE> does not assemble Vax bit-fields.
</P>
<H2><A NAME="SEC26" HREF="as_toc.html#TOC26">Preprocessing</A></H2>
<P>
<A NAME="IDX93"></A>
The <CODE>as</CODE> internal preprocessor:
<UL>
<LI>
<A NAME="IDX94"></A>
adjusts and removes extra whitespace. It leaves one space or tab before
the keywords on a line, and turns any other whitespace on the line into
a single space.
<A NAME="IDX95"></A>
<LI>
removes all comments, replacing them with a single space, or an
appropriate number of newlines.
<A NAME="IDX96"></A>
<LI>
converts character constants into the appropriate numeric values.
</UL>
<P>
It does not do macro processing, include file handling, or
anything else you may get from your C compiler's preprocessor. You can
do include file processing with the <CODE>.include</CODE> directive
(see section <A HREF="as_7.html#SEC97"><CODE>.include "<VAR>file</CODE>"</VAR></A>). You can use the GNU C compiler driver
to get other "CPP" style preprocessing, by giving the input file a
<SAMP>`.S'</SAMP> suffix. See section `Options Controlling the Kind of Output' in <CITE>Using GNU CC</CITE>.
</P>
<P>
Excess whitespace, comments, and character constants
cannot be used in the portions of the input text that are not
preprocessed.
</P>
<P>
<A NAME="IDX97"></A>
<A NAME="IDX98"></A>
<A NAME="IDX99"></A>
<A NAME="IDX100"></A>
If the first line of an input file is <CODE>#NO_APP</CODE> or if you use the
<SAMP>`-f'</SAMP> option, whitespace and comments are not removed from the input file.
Within an input file, you can ask for whitespace and comment removal in
specific portions of the by putting a line that says <CODE>#APP</CODE> before the
text that may contain whitespace or comments, and putting a line that says
<CODE>#NO_APP</CODE> after this text. This feature is mainly intend to support
<CODE>asm</CODE> statements in compilers whose output is otherwise free of comments
and whitespace.
</P>
<H2><A NAME="SEC27" HREF="as_toc.html#TOC27">Whitespace</A></H2>
<P>
<A NAME="IDX101"></A>
<EM>Whitespace</EM> is one or more blanks or tabs, in any order.
Whitespace is used to separate symbols, and to make programs neater for
people to read. Unless within character constants
(see section <A HREF="as_3.html#SEC32">Character Constants</A>), any whitespace means the same
as exactly one space.
</P>
<H2><A NAME="SEC28" HREF="as_toc.html#TOC28">Comments</A></H2>
<P>
<A NAME="IDX102"></A>
There are two ways of rendering comments to <CODE>as</CODE>. In both
cases the comment is equivalent to one space.
</P>
<P>
Anything from <SAMP>`/*'</SAMP> through the next <SAMP>`*/'</SAMP> is a comment.
This means you may not nest these comments.
</P>
<PRE>
/*
The only way to include a newline ('\n') in a comment
is to use this sort of comment.
*/
/* This sort of comment does not nest. */
</PRE>
<P>
<A NAME="IDX103"></A>
Anything from the <EM>line comment</EM> character to the next newline
is considered a comment and is ignored. The line comment character is
<SAMP>`;'</SAMP> for the AMD 29K family;
<SAMP>`;'</SAMP> on the ARC;
<SAMP>`;'</SAMP> for the H8/300 family;
<SAMP>`!'</SAMP> for the H8/500 family;
<SAMP>`;'</SAMP> for the HPPA;
<SAMP>`#'</SAMP> on the i960;
<SAMP>`!'</SAMP> for the Hitachi SH;
<SAMP>`!'</SAMP> on the SPARC;
<SAMP>`#'</SAMP> on the m32r;
<SAMP>`|'</SAMP> on the 680x0;
<SAMP>`#'</SAMP> on the Vax;
<SAMP>`!'</SAMP> for the Z8000;
<SAMP>`#'</SAMP> on the V850;
see section <A HREF="as_8.html#SEC138">Machine Dependent Features</A>.
</P>
<P>
On some machines there are two different line comment characters. One
character only begins a comment if it is the first non-whitespace character on
a line, while the other always begins a comment.
</P>
<P>
The V850 assembler also supports a double dash as starting a comment that
extends to the end of the line.
</P>
<P>
<SAMP>`--'</SAMP>;
</P>
<P>
<A NAME="IDX104"></A>
<A NAME="IDX105"></A>
<A NAME="IDX106"></A>
To be compatible with past assemblers, lines that begin with <SAMP>`#'</SAMP> have a
special interpretation. Following the <SAMP>`#'</SAMP> should be an absolute
expression (see section <A HREF="as_6.html#SEC60">Expressions</A>): the logical line number of the <EM>next</EM>
line. Then a string (see section <A HREF="as_3.html#SEC33">Strings</A>) is allowed: if present it is a
new logical file name. The rest of the line, if any, should be whitespace.
</P>
<P>
If the first non-whitespace characters on the line are not numeric,
the line is ignored. (Just like a comment.)
</P>
<PRE>
# This is an ordinary comment.
# 42-6 "new_file_name" # New logical file name
# This is logical line # 36.
</PRE>
<P>
This feature is deprecated, and may disappear from future versions
of <CODE>as</CODE>.
</P>
<H2><A NAME="SEC29" HREF="as_toc.html#TOC29">Symbols</A></H2>
<P>
<A NAME="IDX107"></A>
A <EM>symbol</EM> is one or more characters chosen from the set of all
letters (both upper and lower case), digits and the three characters
<SAMP>`_.$'</SAMP>.
On most machines, you can also use <CODE>$</CODE> in symbol names; exceptions
are noted in section <A HREF="as_8.html#SEC138">Machine Dependent Features</A>.
No symbol may begin with a digit. Case is significant.
There is no length limit: all characters are significant. Symbols are
delimited by characters not in that set, or by the beginning of a file
(since the source program must end with a newline, the end of a file is
not a possible symbol delimiter). See section <A HREF="as_5.html#SEC45">Symbols</A>.
<A NAME="IDX108"></A>
</P>
<H2><A NAME="SEC30" HREF="as_toc.html#TOC30">Statements</A></H2>
<P>
<A NAME="IDX109"></A>
<A NAME="IDX110"></A>
<A NAME="IDX111"></A>
A <EM>statement</EM> ends at a newline character (<SAMP>`\n'</SAMP>) or an "at"
sign (<SAMP>`@'</SAMP>). The newline or at sign is considered part of the
preceding statement. Newlines and at signs within character constants
are an exception: they do not end statements.
A <EM>statement</EM> ends at a newline character (<SAMP>`\n'</SAMP>) or an exclamation
point (<SAMP>`!'</SAMP>). The newline or exclamation point is considered part of the
preceding statement. Newlines and exclamation points within character
constants are an exception: they do not end statements.
A <EM>statement</EM> ends at a newline character (<SAMP>`\n'</SAMP>); or (for the
H8/300) a dollar sign (<SAMP>`$'</SAMP>); or (for the
Hitachi-SH or the
H8/500) a semicolon
(<SAMP>`;'</SAMP>). The newline or separator character is considered part of
the preceding statement. Newlines and separators within character
constants are an exception: they do not end statements.
A <EM>statement</EM> ends at a newline character (<SAMP>`\n'</SAMP>) or line
separator character. (The line separator is usually <SAMP>`;'</SAMP>, unless
this conflicts with the comment character; see section <A HREF="as_8.html#SEC138">Machine Dependent Features</A>.) The
newline or separator character is considered part of the preceding
statement. Newlines and separators within character constants are an
exception: they do not end statements.
</P>
<P>
<A NAME="IDX112"></A>
<A NAME="IDX113"></A>
It is an error to end any statement with end-of-file: the last
character of any input file should be a newline.
</P>
<P>
<A NAME="IDX114"></A>
<A NAME="IDX115"></A>
<A NAME="IDX116"></A>
You may write a statement on more than one line if you put a
backslash (<KBD>\</KBD>) immediately in front of any newlines within the
statement. When <CODE>as</CODE> reads a backslashed newline both
characters are ignored. You can even put backslashed newlines in
the middle of symbol names without changing the meaning of your
source program.
</P>
<P>
An empty statement is allowed, and may include whitespace. It is ignored.
</P>
<P>
<A NAME="IDX117"></A>
<A NAME="IDX118"></A>
A statement begins with zero or more labels, optionally followed by a
key symbol which determines what kind of statement it is. The key
symbol determines the syntax of the rest of the statement. If the
symbol begins with a dot <SAMP>`.'</SAMP> then the statement is an assembler
directive: typically valid for any computer. If the symbol begins with
a letter the statement is an assembly language <EM>instruction</EM>: it
assembles into a machine language instruction.
Different versions of <CODE>as</CODE> for different computers
recognize different instructions. In fact, the same symbol may
represent a different instruction in a different computer's assembly
language.
</P>
<P>
<A NAME="IDX119"></A>
<A NAME="IDX120"></A>
A label is a symbol immediately followed by a colon (<CODE>:</CODE>).
Whitespace before a label or after a colon is permitted, but you may not
have whitespace between a label's symbol and its colon. See section <A HREF="as_5.html#SEC46">Labels</A>.
</P>
<P>
For HPPA targets, labels need not be immediately followed by a colon, but
the definition of a label must begin in column zero. This also implies that
only one label may be defined on each line.
</P>
<PRE>
label: .directive followed by something
another_label: # This is an empty statement.
instruction operand_1, operand_2, ...
</PRE>
<H2><A NAME="SEC31" HREF="as_toc.html#TOC31">Constants</A></H2>
<P>
<A NAME="IDX121"></A>
A constant is a number, written so that its value is known by
inspection, without knowing any context. Like this:
<PRE>
.byte 74, 0112, 092, 0x4A, 0X4a, 'J, '\J # All the same value.
.ascii "Ring the bell\7" # A string constant.
.octa 0x123456789abcdef0123456789ABCDEF0 # A bignum.
.float 0f-314159265358979323846264338327\
95028841971.693993751E-40 # - pi, a flonum.
</PRE>
<H3><A NAME="SEC32" HREF="as_toc.html#TOC32">Character Constants</A></H3>
<P>
<A NAME="IDX122"></A>
<A NAME="IDX123"></A>
There are two kinds of character constants. A <EM>character</EM> stands
for one character in one byte and its value may be used in
numeric expressions. String constants (properly called string
<EM>literals</EM>) are potentially many bytes and their values may not be
used in arithmetic expressions.
</P>
<H4><A NAME="SEC33" HREF="as_toc.html#TOC33">Strings</A></H4>
<P>
<A NAME="IDX124"></A>
<A NAME="IDX125"></A>
A <EM>string</EM> is written between double-quotes. It may contain
double-quotes or null characters. The way to get special characters
into a string is to <EM>escape</EM> these characters: precede them with
a backslash <SAMP>`\'</SAMP> character. For example <SAMP>`\\'</SAMP> represents
one backslash: the first <CODE>\</CODE> is an escape which tells
<CODE>as</CODE> to interpret the second character literally as a backslash
(which prevents <CODE>as</CODE> from recognizing the second <CODE>\</CODE> as an
escape character). The complete list of escapes follows.
</P>
<P>
<A NAME="IDX126"></A>
<A NAME="IDX127"></A>
<DL COMPACT>
<DT><KBD>\b</KBD>
<DD>
<A NAME="IDX128"></A>
<A NAME="IDX129"></A>
Mnemonic for backspace; for ASCII this is octal code 010.
<A NAME="IDX130"></A>
<A NAME="IDX131"></A>
<DT><KBD>\f</KBD>
<DD>
Mnemonic for FormFeed; for ASCII this is octal code 014.
<A NAME="IDX132"></A>
<A NAME="IDX133"></A>
<DT><KBD>\n</KBD>
<DD>
Mnemonic for newline; for ASCII this is octal code 012.
<A NAME="IDX134"></A>
<A NAME="IDX135"></A>
<DT><KBD>\r</KBD>
<DD>
Mnemonic for carriage-Return; for ASCII this is octal code 015.
<A NAME="IDX136"></A>
<A NAME="IDX137"></A>
<DT><KBD>\t</KBD>
<DD>
Mnemonic for horizontal Tab; for ASCII this is octal code 011.
<A NAME="IDX138"></A>
<A NAME="IDX139"></A>
<DT><KBD>\ <VAR>digit</VAR> <VAR>digit</VAR> <VAR>digit</VAR></KBD>
<DD>
An octal character code. The numeric code is 3 octal digits.
For compatibility with other Unix systems, 8 and 9 are accepted as digits:
for example, <CODE>\008</CODE> has the value 010, and <CODE>\009</CODE> the value 011.
<A NAME="IDX140"></A>
<A NAME="IDX141"></A>
<DT><KBD>\<CODE>x</CODE> <VAR>hex-digits...</VAR></KBD>
<DD>
A hex character code. All trailing hex digits are combined. Either upper or
lower case <CODE>x</CODE> works.
<A NAME="IDX142"></A>
<A NAME="IDX143"></A>
<DT><KBD>\\</KBD>
<DD>
Represents one <SAMP>`\'</SAMP> character.
<A NAME="IDX144"></A>
<A NAME="IDX145"></A>
<DT><KBD>\"</KBD>
<DD>
Represents one <SAMP>`"'</SAMP> character. Needed in strings to represent
this character, because an unescaped <SAMP>`"'</SAMP> would end the string.
<DT><KBD>\ <VAR>anything-else</VAR></KBD>
<DD>
Any other character when escaped by <KBD>\</KBD> gives a warning, but
assembles as if the <SAMP>`\'</SAMP> was not present. The idea is that if
you used an escape sequence you clearly didn't want the literal
interpretation of the following character. However <CODE>as</CODE> has no
other interpretation, so <CODE>as</CODE> knows it is giving you the wrong
code and warns you of the fact.
</DL>
<P>
Which characters are escapable, and what those escapes represent,
varies widely among assemblers. The current set is what we think
the BSD 4.2 assembler recognizes, and is a subset of what most C
compilers recognize. If you are in doubt, do not use an escape
sequence.
</P>
<H4><A NAME="SEC34" HREF="as_toc.html#TOC34">Characters</A></H4>
<P>
<A NAME="IDX146"></A>
<A NAME="IDX147"></A>
<A NAME="IDX148"></A>
A single character may be written as a single quote immediately
followed by that character. The same escapes apply to characters as
to strings. So if you want to write the character backslash, you
must write <KBD>'\\</KBD> where the first <CODE>\</CODE> escapes the second
<CODE>\</CODE>. As you can see, the quote is an acute accent, not a
grave accent. A newline
(or at sign <SAMP>`@'</SAMP>)
(or dollar sign <SAMP>`$'</SAMP>, for the H8/300; or semicolon <SAMP>`;'</SAMP> for the
Hitachi SH or
H8/500)
immediately following an acute accent is taken as a literal character
and does not count as the end of a statement. The value of a character
constant in a numeric expression is the machine's byte-wide code for
that character. <CODE>as</CODE> assumes your character code is ASCII:
<KBD>'A</KBD> means 65, <KBD>'B</KBD> means 66, and so on.
</P>
<H3><A NAME="SEC35" HREF="as_toc.html#TOC35">Number Constants</A></H3>
<P>
<A NAME="IDX149"></A>
<A NAME="IDX150"></A>
<CODE>as</CODE> distinguishes three kinds of numbers according to how they
are stored in the target machine. <EM>Integers</EM> are numbers that
would fit into an <CODE>int</CODE> in the C language. <EM>Bignums</EM> are
integers, but they are stored in more than 32 bits. <EM>Flonums</EM>
are floating point numbers, described below.
</P>
<H4><A NAME="SEC36" HREF="as_toc.html#TOC36">Integers</A></H4>
<P>
<A NAME="IDX151"></A>
<A NAME="IDX152"></A>
</P>
<P>
<A NAME="IDX153"></A>
<A NAME="IDX154"></A>
A binary integer is <SAMP>`0b'</SAMP> or <SAMP>`0B'</SAMP> followed by zero or more of
the binary digits <SAMP>`01'</SAMP>.
</P>
<P>
<A NAME="IDX155"></A>
<A NAME="IDX156"></A>
An octal integer is <SAMP>`0'</SAMP> followed by zero or more of the octal
digits (<SAMP>`01234567'</SAMP>).
</P>
<P>
<A NAME="IDX157"></A>
<A NAME="IDX158"></A>
A decimal integer starts with a non-zero digit followed by zero or
more digits (<SAMP>`0123456789'</SAMP>).
</P>
<P>
<A NAME="IDX159"></A>
<A NAME="IDX160"></A>
A hexadecimal integer is <SAMP>`0x'</SAMP> or <SAMP>`0X'</SAMP> followed by one or
more hexadecimal digits chosen from <SAMP>`0123456789abcdefABCDEF'</SAMP>.
</P>
<P>
Integers have the usual values. To denote a negative integer, use
the prefix operator <SAMP>`-'</SAMP> discussed under expressions
(see section <A HREF="as_6.html#SEC65">Prefix Operator</A>).
</P>
<H4><A NAME="SEC37" HREF="as_toc.html#TOC37">Bignums</A></H4>
<P>
<A NAME="IDX161"></A>
<A NAME="IDX162"></A>
A <EM>bignum</EM> has the same syntax and semantics as an integer
except that the number (or its negative) takes more than 32 bits to
represent in binary. The distinction is made because in some places
integers are permitted while bignums are not.
</P>
<H4><A NAME="SEC38" HREF="as_toc.html#TOC38">Flonums</A></H4>
<P>
<A NAME="IDX163"></A>
<A NAME="IDX164"></A>
<A NAME="IDX165"></A>
</P>
<P>
<A NAME="IDX166"></A>
A <EM>flonum</EM> represents a floating point number. The translation is
indirect: a decimal floating point number from the text is converted by
<CODE>as</CODE> to a generic binary floating point number of more than
sufficient precision. This generic floating point number is converted
to a particular computer's floating point format (or formats) by a
portion of <CODE>as</CODE> specialized to that computer.
</P>
<P>
A flonum is written by writing (in order)
<UL>
<LI>
The digit <SAMP>`0'</SAMP>.
(<SAMP>`0'</SAMP> is optional on the HPPA.)
<LI>
A letter, to tell <CODE>as</CODE> the rest of the number is a flonum.
<KBD>e</KBD> is recommended. Case is not important.
On the H8/300, H8/500,
Hitachi SH,
and AMD 29K architectures, the letter must be
one of the letters <SAMP>`DFPRSX'</SAMP> (in upper or lower case).
On the ARC, the letter must be one of the letters <SAMP>`DFRS'</SAMP>
(in upper or lower case).
On the Intel 960 architecture, the letter must be
one of the letters <SAMP>`DFT'</SAMP> (in upper or lower case).
On the HPPA architecture, the letter must be <SAMP>`E'</SAMP> (upper case only).
<LI>
An optional sign: either <SAMP>`+'</SAMP> or <SAMP>`-'</SAMP>.
<LI>
An optional <EM>integer part</EM>: zero or more decimal digits.
<LI>
An optional <EM>fractional part</EM>: <SAMP>`.'</SAMP> followed by zero
or more decimal digits.
<LI>
An optional exponent, consisting of:
<UL>
<LI>
An <SAMP>`E'</SAMP> or <SAMP>`e'</SAMP>.
<LI>
Optional sign: either <SAMP>`+'</SAMP> or <SAMP>`-'</SAMP>.
<LI>
One or more decimal digits.
</UL>
</UL>
<P>
At least one of the integer part or the fractional part must be
present. The floating point number has the usual base-10 value.
</P>
<P>
<CODE>as</CODE> does all processing using integers. Flonums are computed
independently of any floating point hardware in the computer running
<CODE>as</CODE>.
</P>
<P><HR><P>
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<TITLE>Using as - Sections and Relocation</TITLE>
</HEAD>
<BODY>
Go to the <A HREF="as_1.html">first</A>, <A HREF="as_3.html">previous</A>, <A HREF="as_5.html">next</A>, <A HREF="as_27.html">last</A> section, <A HREF="as_toc.html">table of contents</A>.
<P><HR><P>
<H1><A NAME="SEC39" HREF="as_toc.html#TOC39">Sections and Relocation</A></H1>
<P>
<A NAME="IDX167"></A>
<A NAME="IDX168"></A>
</P>
<H2><A NAME="SEC40" HREF="as_toc.html#TOC40">Background</A></H2>
<P>
Roughly, a section is a range of addresses, with no gaps; all data
"in" those addresses is treated the same for some particular purpose.
For example there may be a "read only" section.
</P>
<P>
<A NAME="IDX169"></A>
<A NAME="IDX170"></A>
The linker <CODE>ld</CODE> reads many object files (partial programs) and
combines their contents to form a runnable program. When <CODE>as</CODE>
emits an object file, the partial program is assumed to start at address 0.
<CODE>ld</CODE> assigns the final addresses for the partial program, so that
different partial programs do not overlap. This is actually an
oversimplification, but it suffices to explain how <CODE>as</CODE> uses
sections.
</P>
<P>
<CODE>ld</CODE> moves blocks of bytes of your program to their run-time
addresses. These blocks slide to their run-time addresses as rigid
units; their length does not change and neither does the order of bytes
within them. Such a rigid unit is called a <EM>section</EM>. Assigning
run-time addresses to sections is called <EM>relocation</EM>. It includes
the task of adjusting mentions of object-file addresses so they refer to
the proper run-time addresses.
For the H8/300 and H8/500,
and for the Hitachi SH,
<CODE>as</CODE> pads sections if needed to
ensure they end on a word (sixteen bit) boundary.
</P>
<P>
<A NAME="IDX171"></A>
An object file written by <CODE>as</CODE> has at least three sections, any
of which may be empty. These are named <EM>text</EM>, <EM>data</EM> and
<EM>bss</EM> sections.
</P>
<P>
When it generates COFF output,
<CODE>as</CODE> can also generate whatever other named sections you specify
using the <SAMP>`.section'</SAMP> directive (see section <A HREF="as_7.html#SEC119"><CODE>.section <VAR>name</CODE></VAR></A>).
If you do not use any directives that place output in the <SAMP>`.text'</SAMP>
or <SAMP>`.data'</SAMP> sections, these sections still exist, but are empty.
</P>
<P>
When <CODE>as</CODE> generates SOM or ELF output for the HPPA,
<CODE>as</CODE> can also generate whatever other named sections you
specify using the <SAMP>`.space'</SAMP> and <SAMP>`.subspace'</SAMP> directives. See
<CITE>HP9000 Series 800 Assembly Language Reference Manual</CITE>
(HP 92432-90001) for details on the <SAMP>`.space'</SAMP> and <SAMP>`.subspace'</SAMP>
assembler directives.
</P>
<P>
Additionally, <CODE>as</CODE> uses different names for the standard
text, data, and bss sections when generating SOM output. Program text
is placed into the <SAMP>`$CODE$'</SAMP> section, data into <SAMP>`$DATA$'</SAMP>, and
BSS into <SAMP>`$BSS$'</SAMP>.
</P>
<P>
Within the object file, the text section starts at address <CODE>0</CODE>, the
data section follows, and the bss section follows the data section.
</P>
<P>
When generating either SOM or ELF output files on the HPPA, the text
section starts at address <CODE>0</CODE>, the data section at address
<CODE>0x4000000</CODE>, and the bss section follows the data section.
</P>
<P>
To let <CODE>ld</CODE> know which data changes when the sections are
relocated, and how to change that data, <CODE>as</CODE> also writes to the
object file details of the relocation needed. To perform relocation
<CODE>ld</CODE> must know, each time an address in the object
file is mentioned:
<UL>
<LI>
Where in the object file is the beginning of this reference to
an address?
<LI>
How long (in bytes) is this reference?
<LI>
Which section does the address refer to? What is the numeric value of
<PRE>
(<VAR>address</VAR>) - (<VAR>start-address of section</VAR>)?
</PRE>
<LI>
Is the reference to an address "Program-Counter relative"?
</UL>
<P>
<A NAME="IDX172"></A>
<A NAME="IDX173"></A>
In fact, every address <CODE>as</CODE> ever uses is expressed as
<PRE>
(<VAR>section</VAR>) + (<VAR>offset into section</VAR>)
</PRE>
<P>
Further, most expressions <CODE>as</CODE> computes have this section-relative
nature.
(For some object formats, such as SOM for the HPPA, some expressions are
symbol-relative instead.)
</P>
<P>
In this manual we use the notation {<VAR>secname</VAR> <VAR>N</VAR>} to mean "offset
<VAR>N</VAR> into section <VAR>secname</VAR>."
</P>
<P>
Apart from text, data and bss sections you need to know about the
<EM>absolute</EM> section. When <CODE>ld</CODE> mixes partial programs,
addresses in the absolute section remain unchanged. For example, address
<CODE>{absolute 0}</CODE> is "relocated" to run-time address 0 by
<CODE>ld</CODE>. Although the linker never arranges two partial programs'
data sections with overlapping addresses after linking, <EM>by definition</EM>
their absolute sections must overlap. Address <CODE>{absolute 239}</CODE> in one
part of a program is always the same address when the program is running as
address <CODE>{absolute 239}</CODE> in any other part of the program.
</P>
<P>
The idea of sections is extended to the <EM>undefined</EM> section. Any
address whose section is unknown at assembly time is by definition
rendered {undefined <VAR>U</VAR>}---where <VAR>U</VAR> is filled in later.
Since numbers are always defined, the only way to generate an undefined
address is to mention an undefined symbol. A reference to a named
common block would be such a symbol: its value is unknown at assembly
time so it has section <EM>undefined</EM>.
</P>
<P>
By analogy the word <EM>section</EM> is used to describe groups of sections in
the linked program. <CODE>ld</CODE> puts all partial programs' text
sections in contiguous addresses in the linked program. It is
customary to refer to the <EM>text section</EM> of a program, meaning all
the addresses of all partial programs' text sections. Likewise for
data and bss sections.
</P>
<P>
Some sections are manipulated by <CODE>ld</CODE>; others are invented for
use of <CODE>as</CODE> and have no meaning except during assembly.
</P>
<H2><A NAME="SEC41" HREF="as_toc.html#TOC41">Linker Sections</A></H2>
<P>
<CODE>ld</CODE> deals with just four kinds of sections, summarized below.
</P>
<DL COMPACT>
<DT><STRONG>named sections</STRONG>
<DD>
<A NAME="IDX174"></A>
<A NAME="IDX175"></A>
<A NAME="IDX176"></A>
<A NAME="IDX177"></A>
<DT><STRONG>text section</STRONG>
<DD>
<DT><STRONG>data section</STRONG>
<DD>
These sections hold your program. <CODE>as</CODE> and <CODE>ld</CODE> treat them as
separate but equal sections. Anything you can say of one section is
true another.
When the program is running, however, it is
customary for the text section to be unalterable. The
text section is often shared among processes: it contains
instructions, constants and the like. The data section of a running
program is usually alterable: for example, C variables would be stored
in the data section.
<A NAME="IDX178"></A>
<DT><STRONG>bss section</STRONG>
<DD>
This section contains zeroed bytes when your program begins running. It
is used to hold unitialized variables or common storage. The length of
each partial program's bss section is important, but because it starts
out containing zeroed bytes there is no need to store explicit zero
bytes in the object file. The bss section was invented to eliminate
those explicit zeros from object files.
<A NAME="IDX179"></A>
<DT><STRONG>absolute section</STRONG>
<DD>
Address 0 of this section is always "relocated" to runtime address 0.
This is useful if you want to refer to an address that <CODE>ld</CODE> must
not change when relocating. In this sense we speak of absolute
addresses being "unrelocatable": they do not change during relocation.
<A NAME="IDX180"></A>
<DT><STRONG>undefined section</STRONG>
<DD>
This "section" is a catch-all for address references to objects not in
the preceding sections.
</DL>
<P>
<A NAME="IDX181"></A>
An idealized example of three relocatable sections follows.
The example uses the traditional section names <SAMP>`.text'</SAMP> and <SAMP>`.data'</SAMP>.
Memory addresses are on the horizontal axis.
</P>
<H2><A NAME="SEC42" HREF="as_toc.html#TOC42">Assembler Internal Sections</A></H2>
<P>
<A NAME="IDX182"></A>
<A NAME="IDX183"></A>
These sections are meant only for the internal use of <CODE>as</CODE>. They
have no meaning at run-time. You do not really need to know about these
sections for most purposes; but they can be mentioned in <CODE>as</CODE>
warning messages, so it might be helpful to have an idea of their
meanings to <CODE>as</CODE>. These sections are used to permit the
value of every expression in your assembly language program to be a
section-relative address.
</P>
<DL COMPACT>
<DT><B>ASSEMBLER-INTERNAL-LOGIC-ERROR!</B>
<DD>
<A NAME="IDX184"></A>
An internal assembler logic error has been found. This means there is a
bug in the assembler.
<A NAME="IDX185"></A>
<DT><B>expr section</B>
<DD>
The assembler stores complex expression internally as combinations of
symbols. When it needs to represent an expression as a symbol, it puts
it in the expr section.
</DL>
<H2><A NAME="SEC43" HREF="as_toc.html#TOC43">Sub-Sections</A></H2>
<P>
<A NAME="IDX186"></A>
<A NAME="IDX187"></A>
Assembled bytes
conventionally
fall into two sections: text and data.
You may have separate groups of
data in named sections
text or data
that you want to end up near to each other in the object file, even though they
are not contiguous in the assembler source. <CODE>as</CODE> allows you to
use <EM>subsections</EM> for this purpose. Within each section, there can be
numbered subsections with values from 0 to 8192. Objects assembled into the
same subsection go into the object file together with other objects in the same
subsection. For example, a compiler might want to store constants in the text
section, but might not want to have them interspersed with the program being
assembled. In this case, the compiler could issue a <SAMP>`.text 0'</SAMP> before each
section of code being output, and a <SAMP>`.text 1'</SAMP> before each group of
constants being output.
</P>
<P>
Subsections are optional. If you do not use subsections, everything
goes in subsection number zero.
</P>
<P>
Each subsection is zero-padded up to a multiple of four bytes.
(Subsections may be padded a different amount on different flavors
of <CODE>as</CODE>.)
</P>
<P>
Subsections appear in your object file in numeric order, lowest numbered
to highest. (All this to be compatible with other people's assemblers.)
The object file contains no representation of subsections; <CODE>ld</CODE> and
other programs that manipulate object files see no trace of them.
They just see all your text subsections as a text section, and all your
data subsections as a data section.
</P>
<P>
To specify which subsection you want subsequent statements assembled
into, use a numeric argument to specify it, in a <SAMP>`.text
<VAR>expression</VAR>'</SAMP> or a <SAMP>`.data <VAR>expression</VAR>'</SAMP> statement.
When generating COFF output, you
can also use an extra subsection
argument with arbitrary named sections: <SAMP>`.section <VAR>name</VAR>,
<VAR>expression</VAR>'</SAMP>.
<VAR>Expression</VAR> should be an absolute expression.
(See section <A HREF="as_6.html#SEC60">Expressions</A>.) If you just say <SAMP>`.text'</SAMP> then <SAMP>`.text 0'</SAMP>
is assumed. Likewise <SAMP>`.data'</SAMP> means <SAMP>`.data 0'</SAMP>. Assembly
begins in <CODE>text 0</CODE>. For instance:
<PRE>
.text 0 # The default subsection is text 0 anyway.
.ascii "This lives in the first text subsection. *"
.text 1
.ascii "But this lives in the second text subsection."
.data 0
.ascii "This lives in the data section,"
.ascii "in the first data subsection."
.text 0
.ascii "This lives in the first text section,"
.ascii "immediately following the asterisk (*)."
</PRE>
<P>
Each section has a <EM>location counter</EM> incremented by one for every byte
assembled into that section. Because subsections are merely a convenience
restricted to <CODE>as</CODE> there is no concept of a subsection location
counter. There is no way to directly manipulate a location counter--but the
<CODE>.align</CODE> directive changes it, and any label definition captures its
current value. The location counter of the section where statements are being
assembled is said to be the <EM>active</EM> location counter.
</P>
<H2><A NAME="SEC44" HREF="as_toc.html#TOC44">bss Section</A></H2>
<P>
<A NAME="IDX188"></A>
<A NAME="IDX189"></A>
The bss section is used for local common variable storage.
You may allocate address space in the bss section, but you may
not dictate data to load into it before your program executes. When
your program starts running, all the contents of the bss
section are zeroed bytes.
</P>
<P>
The <CODE>.lcomm</CODE> pseudo-op defines a symbol in the bss section; see
section <A HREF="as_7.html#SEC101"><CODE>.lcomm <VAR>symbol</CODE> , <VAR>length</VAR></VAR></A>.
</P>
<P>
The <CODE>.comm</CODE> pseudo-op may be used to declare a common symbol, which is
another form of uninitialized symbol; see See section <A HREF="as_7.html#SEC76"><CODE>.comm <VAR>symbol</CODE> , <VAR>length</VAR> </VAR></A>.
</P>
<P>
When assembling for a target which supports multiple sections, such as ELF or
COFF, you may switch into the <CODE>.bss</CODE> section and define symbols as usual;
see section <A HREF="as_7.html#SEC119"><CODE>.section <VAR>name</CODE></VAR></A>. You may only assemble zero values into the
section. Typically the section will only contain symbol definitions and
<CODE>.skip</CODE> directives (see section <A HREF="as_7.html#SEC125"><CODE>.skip <VAR>size</CODE> , <VAR>fill</VAR></VAR></A>).
</P>
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<TITLE>Using as - Symbols</TITLE>
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<P><HR><P>
<H1><A NAME="SEC45" HREF="as_toc.html#TOC45">Symbols</A></H1>
<P>
<A NAME="IDX190"></A>
Symbols are a central concept: the programmer uses symbols to name
things, the linker uses symbols to link, and the debugger uses symbols
to debug.
</P>
<BLOCKQUOTE>
<A NAME="IDX191"></A>
<P>
<EM>Warning:</EM> <CODE>as</CODE> does not place symbols in the object file in
the same order they were declared. This may break some debuggers.
</BLOCKQUOTE>
<H2><A NAME="SEC46" HREF="as_toc.html#TOC46">Labels</A></H2>
<P>
<A NAME="IDX192"></A>
A <EM>label</EM> is written as a symbol immediately followed by a colon
<SAMP>`:'</SAMP>. The symbol then represents the current value of the
active location counter, and is, for example, a suitable instruction
operand. You are warned if you use the same symbol to represent two
different locations: the first definition overrides any other
definitions.
</P>
<P>
On the HPPA, the usual form for a label need not be immediately followed by a
colon, but instead must start in column zero. Only one label may be defined on
a single line. To work around this, the HPPA version of <CODE>as</CODE> also
provides a special directive <CODE>.label</CODE> for defining labels more flexibly.
</P>
<H2><A NAME="SEC47" HREF="as_toc.html#TOC47">Giving Symbols Other Values</A></H2>
<P>
<A NAME="IDX193"></A>
<A NAME="IDX194"></A>
A symbol can be given an arbitrary value by writing a symbol, followed
by an equals sign <SAMP>`='</SAMP>, followed by an expression
(see section <A HREF="as_6.html#SEC60">Expressions</A>). This is equivalent to using the <CODE>.set</CODE>
directive. See section <A HREF="as_7.html#SEC120"><CODE>.set <VAR>symbol</CODE>, <VAR>expression</VAR></VAR></A>.
</P>
<H2><A NAME="SEC48" HREF="as_toc.html#TOC48">Symbol Names</A></H2>
<P>
<A NAME="IDX195"></A>
<A NAME="IDX196"></A>
Symbol names begin with a letter or with one of <SAMP>`._'</SAMP>. On most
machines, you can also use <CODE>$</CODE> in symbol names; exceptions are
noted in section <A HREF="as_8.html#SEC138">Machine Dependent Features</A>. That character may be followed by any
string of digits, letters, dollar signs (unless otherwise noted in
section <A HREF="as_8.html#SEC138">Machine Dependent Features</A>), and underscores.
For the AMD 29K family, <SAMP>`?'</SAMP> is also allowed in the
body of a symbol name, though not at its beginning.
</P>
<P>
Case of letters is significant: <CODE>foo</CODE> is a different symbol name
than <CODE>Foo</CODE>.
</P>
<P>
Each symbol has exactly one name. Each name in an assembly language program
refers to exactly one symbol. You may use that symbol name any number of times
in a program.
</P>
<H3>Local Symbol Names</H3>
<P>
<A NAME="IDX197"></A>
<A NAME="IDX198"></A>
<A NAME="IDX199"></A>
<A NAME="IDX200"></A>
Local symbols help compilers and programmers use names temporarily.
There are ten local symbol names, which are re-used throughout the
program. You may refer to them using the names <SAMP>`0'</SAMP> <SAMP>`1'</SAMP>
... <SAMP>`9'</SAMP>. To define a local symbol, write a label of the form
<SAMP>`<B>N</B>:'</SAMP> (where <B>N</B> represents any digit). To refer to the most
recent previous definition of that symbol write <SAMP>`<B>N</B>b'</SAMP>, using the
same digit as when you defined the label. To refer to the next
definition of a local label, write <SAMP>`<B>N</B>f'</SAMP>---where <B>N</B> gives you
a choice of 10 forward references. The <SAMP>`b'</SAMP> stands for
"backwards" and the <SAMP>`f'</SAMP> stands for "forwards".
</P>
<P>
Local symbols are not emitted by the current GNU C compiler.
</P>
<P>
There is no restriction on how you can use these labels, but
remember that at any point in the assembly you can refer to at most
10 prior local labels and to at most 10 forward local labels.
</P>
<P>
Local symbol names are only a notation device. They are immediately
transformed into more conventional symbol names before the assembler
uses them. The symbol names stored in the symbol table, appearing in
error messages and optionally emitted to the object file have these
parts:
</P>
<DL COMPACT>
<DT><CODE>L</CODE>
<DD>
All local labels begin with <SAMP>`L'</SAMP>. Normally both <CODE>as</CODE> and
<CODE>ld</CODE> forget symbols that start with <SAMP>`L'</SAMP>. These labels are
used for symbols you are never intended to see. If you use the
<SAMP>`-L'</SAMP> option then <CODE>as</CODE> retains these symbols in the
object file. If you also instruct <CODE>ld</CODE> to retain these symbols,
you may use them in debugging.
<DT><CODE><VAR>digit</VAR></CODE>
<DD>
If the label is written <SAMP>`0:'</SAMP> then the digit is <SAMP>`0'</SAMP>.
If the label is written <SAMP>`1:'</SAMP> then the digit is <SAMP>`1'</SAMP>.
And so on up through <SAMP>`9:'</SAMP>.
<DT><CODE><KBD>C-A</KBD></CODE>
<DD>
This unusual character is included so you do not accidentally invent
a symbol of the same name. The character has ASCII value
<SAMP>`\001'</SAMP>.
<DT><CODE><EM>ordinal number</EM></CODE>
<DD>
This is a serial number to keep the labels distinct. The first
<SAMP>`0:'</SAMP> gets the number <SAMP>`1'</SAMP>; The 15th <SAMP>`0:'</SAMP> gets the
number <SAMP>`15'</SAMP>; <EM>etc.</EM>. Likewise for the other labels <SAMP>`1:'</SAMP>
through <SAMP>`9:'</SAMP>.
</DL>
<P>
For instance, the first <CODE>1:</CODE> is named <CODE>L1<KBD>C-A</KBD>1</CODE>, the 44th
<CODE>3:</CODE> is named <CODE>L3<KBD>C-A</KBD>44</CODE>.
</P>
<H2><A NAME="SEC49" HREF="as_toc.html#TOC49">The Special Dot Symbol</A></H2>
<P>
<A NAME="IDX201"></A>
<A NAME="IDX202"></A>
<A NAME="IDX203"></A>
<A NAME="IDX204"></A>
The special symbol <SAMP>`.'</SAMP> refers to the current address that
<CODE>as</CODE> is assembling into. Thus, the expression <SAMP>`melvin:
.long .'</SAMP> defines <CODE>melvin</CODE> to contain its own address.
Assigning a value to <CODE>.</CODE> is treated the same as a <CODE>.org</CODE>
directive. Thus, the expression <SAMP>`.=.+4'</SAMP> is the same as saying
<SAMP>`.space 4'</SAMP>.
</P>
<H2><A NAME="SEC50" HREF="as_toc.html#TOC50">Symbol Attributes</A></H2>
<P>
<A NAME="IDX205"></A>
<A NAME="IDX206"></A>
Every symbol has, as well as its name, the attributes "Value" and
"Type". Depending on output format, symbols can also have auxiliary
attributes.
</P>
<P>
If you use a symbol without defining it, <CODE>as</CODE> assumes zero for
all these attributes, and probably won't warn you. This makes the
symbol an externally defined symbol, which is generally what you
would want.
</P>
<H3><A NAME="SEC51" HREF="as_toc.html#TOC51">Value</A></H3>
<P>
<A NAME="IDX207"></A>
<A NAME="IDX208"></A>
The value of a symbol is (usually) 32 bits. For a symbol which labels a
location in the text, data, bss or absolute sections the value is the
number of addresses from the start of that section to the label.
Naturally for text, data and bss sections the value of a symbol changes
as <CODE>ld</CODE> changes section base addresses during linking. Absolute
symbols' values do not change during linking: that is why they are
called absolute.
</P>
<P>
The value of an undefined symbol is treated in a special way. If it is
0 then the symbol is not defined in this assembler source file, and
<CODE>ld</CODE> tries to determine its value from other files linked into the
same program. You make this kind of symbol simply by mentioning a symbol
name without defining it. A non-zero value represents a <CODE>.comm</CODE>
common declaration. The value is how much common storage to reserve, in
bytes (addresses). The symbol refers to the first address of the
allocated storage.
</P>
<H3><A NAME="SEC52" HREF="as_toc.html#TOC52">Type</A></H3>
<P>
<A NAME="IDX209"></A>
<A NAME="IDX210"></A>
The type attribute of a symbol contains relocation (section)
information, any flag settings indicating that a symbol is external, and
(optionally), other information for linkers and debuggers. The exact
format depends on the object-code output format in use.
</P>
<H3><A NAME="SEC53" HREF="as_toc.html#TOC53">Symbol Attributes: <CODE>a.out</CODE></A></H3>
<P>
<A NAME="IDX211"></A>
<A NAME="IDX212"></A>
</P>
<H4><A NAME="SEC54" HREF="as_toc.html#TOC54">Descriptor</A></H4>
<P>
<A NAME="IDX213"></A>
This is an arbitrary 16-bit value. You may establish a symbol's
descriptor value by using a <CODE>.desc</CODE> statement
(see section <A HREF="as_7.html#SEC79"><CODE>.desc <VAR>symbol</CODE>, <VAR>abs-expression</VAR></VAR></A>). A descriptor value means nothing to
<CODE>as</CODE>.
</P>
<H4><A NAME="SEC55" HREF="as_toc.html#TOC55">Other</A></H4>
<P>
<A NAME="IDX214"></A>
This is an arbitrary 8-bit value. It means nothing to <CODE>as</CODE>.
</P>
<H3><A NAME="SEC56" HREF="as_toc.html#TOC56">Symbol Attributes for COFF</A></H3>
<P>
<A NAME="IDX215"></A>
<A NAME="IDX216"></A>
</P>
<P>
The COFF format supports a multitude of auxiliary symbol attributes;
like the primary symbol attributes, they are set between <CODE>.def</CODE> and
<CODE>.endef</CODE> directives.
</P>
<H4><A NAME="SEC57" HREF="as_toc.html#TOC57">Primary Attributes</A></H4>
<P>
<A NAME="IDX217"></A>
The symbol name is set with <CODE>.def</CODE>; the value and type,
respectively, with <CODE>.val</CODE> and <CODE>.type</CODE>.
</P>
<H4><A NAME="SEC58" HREF="as_toc.html#TOC58">Auxiliary Attributes</A></H4>
<P>
<A NAME="IDX218"></A>
The <CODE>as</CODE> directives <CODE>.dim</CODE>, <CODE>.line</CODE>, <CODE>.scl</CODE>,
<CODE>.size</CODE>, and <CODE>.tag</CODE> can generate auxiliary symbol table
information for COFF.
</P>
<H3><A NAME="SEC59" HREF="as_toc.html#TOC59">Symbol Attributes for SOM</A></H3>
<P>
<A NAME="IDX219"></A>
<A NAME="IDX220"></A>
</P>
<P>
The SOM format for the HPPA supports a multitude of symbol attributes set with
the <CODE>.EXPORT</CODE> and <CODE>.IMPORT</CODE> directives.
</P>
<P>
The attributes are described in <CITE>HP9000 Series 800 Assembly
Language Reference Manual</CITE> (HP 92432-90001) under the <CODE>IMPORT</CODE> and
<CODE>EXPORT</CODE> assembler directive documentation.
</P>
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<TITLE>Using as - Expressions</TITLE>
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<P><HR><P>
<H1><A NAME="SEC60" HREF="as_toc.html#TOC60">Expressions</A></H1>
<P>
<A NAME="IDX221"></A>
<A NAME="IDX222"></A>
<A NAME="IDX223"></A>
An <EM>expression</EM> specifies an address or numeric value.
Whitespace may precede and/or follow an expression.
</P>
<P>
The result of an expression must be an absolute number, or else an offset into
a particular section. If an expression is not absolute, and there is not
enough information when <CODE>as</CODE> sees the expression to know its
section, a second pass over the source program might be necessary to interpret
the expression--but the second pass is currently not implemented.
<CODE>as</CODE> aborts with an error message in this situation.
</P>
<H2><A NAME="SEC61" HREF="as_toc.html#TOC61">Empty Expressions</A></H2>
<P>
<A NAME="IDX224"></A>
<A NAME="IDX225"></A>
An empty expression has no value: it is just whitespace or null.
Wherever an absolute expression is required, you may omit the
expression, and <CODE>as</CODE> assumes a value of (absolute) 0. This
is compatible with other assemblers.
</P>
<H2><A NAME="SEC62" HREF="as_toc.html#TOC62">Integer Expressions</A></H2>
<P>
<A NAME="IDX226"></A>
<A NAME="IDX227"></A>
An <EM>integer expression</EM> is one or more <EM>arguments</EM> delimited
by <EM>operators</EM>.
</P>
<H3><A NAME="SEC63" HREF="as_toc.html#TOC63">Arguments</A></H3>
<P>
<A NAME="IDX228"></A>
<A NAME="IDX229"></A>
<A NAME="IDX230"></A>
<A NAME="IDX231"></A>
<EM>Arguments</EM> are symbols, numbers or subexpressions. In other
contexts arguments are sometimes called "arithmetic operands". In
this manual, to avoid confusing them with the "instruction operands" of
the machine language, we use the term "argument" to refer to parts of
expressions only, reserving the word "operand" to refer only to machine
instruction operands.
</P>
<P>
Symbols are evaluated to yield {<VAR>section</VAR> <VAR>NNN</VAR>} where
<VAR>section</VAR> is one of text, data, bss, absolute,
or undefined. <VAR>NNN</VAR> is a signed, 2's complement 32 bit
integer.
</P>
<P>
Numbers are usually integers.
</P>
<P>
A number can be a flonum or bignum. In this case, you are warned
that only the low order 32 bits are used, and <CODE>as</CODE> pretends
these 32 bits are an integer. You may write integer-manipulating
instructions that act on exotic constants, compatible with other
assemblers.
</P>
<P>
<A NAME="IDX232"></A>
Subexpressions are a left parenthesis <SAMP>`('</SAMP> followed by an integer
expression, followed by a right parenthesis <SAMP>`)'</SAMP>; or a prefix
operator followed by an argument.
</P>
<H3><A NAME="SEC64" HREF="as_toc.html#TOC64">Operators</A></H3>
<P>
<A NAME="IDX233"></A>
<A NAME="IDX234"></A>
<A NAME="IDX235"></A>
<EM>Operators</EM> are arithmetic functions, like <CODE>+</CODE> or <CODE>%</CODE>. Prefix
operators are followed by an argument. Infix operators appear
between their arguments. Operators may be preceded and/or followed by
whitespace.
</P>
<H3><A NAME="SEC65" HREF="as_toc.html#TOC65">Prefix Operator</A></H3>
<P>
<A NAME="IDX236"></A>
<CODE>as</CODE> has the following <EM>prefix operators</EM>. They each take
one argument, which must be absolute.
</P>
<DL COMPACT>
<DT><CODE>-</CODE>
<DD>
<EM>Negation</EM>. Two's complement negation.
<DT><CODE>~</CODE>
<DD>
<EM>Complementation</EM>. Bitwise not.
</DL>
<H3><A NAME="SEC66" HREF="as_toc.html#TOC66">Infix Operators</A></H3>
<P>
<A NAME="IDX237"></A>
<A NAME="IDX238"></A>
<EM>Infix operators</EM> take two arguments, one on either side. Operators
have precedence, but operations with equal precedence are performed left
to right. Apart from <CODE>+</CODE> or <CODE>-</CODE>, both arguments must be
absolute, and the result is absolute.
</P>
<OL>
<LI>
<A NAME="IDX239"></A>
<A NAME="IDX240"></A>
Highest Precedence
<DL COMPACT>
<DT><CODE>*</CODE>
<DD>
<EM>Multiplication</EM>.
<DT><CODE>/</CODE>
<DD>
<EM>Division</EM>. Truncation is the same as the C operator <SAMP>`/'</SAMP>
<DT><CODE>%</CODE>
<DD>
<EM>Remainder</EM>.
<DT><CODE>&#60;</CODE>
<DD>
<DT><CODE>&#60;&#60;</CODE>
<DD>
<EM>Shift Left</EM>. Same as the C operator <SAMP>`&#60;&#60;'</SAMP>.
<DT><CODE>&#62;</CODE>
<DD>
<DT><CODE>&#62;&#62;</CODE>
<DD>
<EM>Shift Right</EM>. Same as the C operator <SAMP>`&#62;&#62;'</SAMP>.
</DL>
<LI>
Intermediate precedence
<DL COMPACT>
<DT><CODE>|</CODE>
<DD>
<EM>Bitwise Inclusive Or</EM>.
<DT><CODE>&#38;</CODE>
<DD>
<EM>Bitwise And</EM>.
<DT><CODE>^</CODE>
<DD>
<EM>Bitwise Exclusive Or</EM>.
<DT><CODE>!</CODE>
<DD>
<EM>Bitwise Or Not</EM>.
</DL>
<LI>
Lowest Precedence
<DL COMPACT>
<DT><CODE>+</CODE>
<DD>
<A NAME="IDX241"></A>
<A NAME="IDX242"></A>
<A NAME="IDX243"></A>
<EM>Addition</EM>. If either argument is absolute, the result has the section of
the other argument. You may not add together arguments from different
sections.
<A NAME="IDX244"></A>
<A NAME="IDX245"></A>
<A NAME="IDX246"></A>
<DT><CODE>-</CODE>
<DD>
<EM>Subtraction</EM>. If the right argument is absolute, the
result has the section of the left argument.
If both arguments are in the same section, the result is absolute.
You may not subtract arguments from different sections.
</DL>
</OL>
<P>
In short, it's only meaningful to add or subtract the <EM>offsets</EM> in an
address; you can only have a defined section in one of the two arguments.
</P>
<P><HR><P>
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<HEAD>
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<TITLE>Using as - Machine Dependent Features</TITLE>
</HEAD>
<BODY>
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<P><HR><P>
<H1><A NAME="SEC138" HREF="as_toc.html#TOC138">Machine Dependent Features</A></H1>
<P>
<A NAME="IDX416"></A>
The machine instruction sets are (almost by definition) different on
each machine where <CODE>as</CODE> runs. Floating point representations
vary as well, and <CODE>as</CODE> often supports a few additional
directives or command-line options for compatibility with other
assemblers on a particular platform. Finally, some versions of
<CODE>as</CODE> support special pseudo-instructions for branch
optimization.
</P>
<P>
This chapter discusses most of these differences, though it does not
include details on any machine's instruction set. For details on that
subject, see the hardware manufacturer's manual.
</P>
<P>
@lowersections
</P>
<P><HR><P>
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<TITLE>Using as - ARC Dependent Features</TITLE>
</HEAD>
<BODY>
Go to the <A HREF="as_1.html">first</A>, <A HREF="as_8.html">previous</A>, <A HREF="as_10.html">next</A>, <A HREF="as_27.html">last</A> section, <A HREF="as_toc.html">table of contents</A>.
<P><HR><P>
<H1><A NAME="SEC139" HREF="as_toc.html#TOC139">ARC Dependent Features</A></H1>
<P>
<A NAME="IDX417"></A>
</P>
<H2><A NAME="SEC140" HREF="as_toc.html#TOC140">Options</A></H2>
<P>
<A NAME="IDX418"></A>
<A NAME="IDX419"></A>
<A NAME="IDX420"></A>
<A NAME="IDX421"></A>
The ARC chip family includes several successive levels (or other
variants) of chip, using the same core instruction set, but including
a few additional instructions at each level.
</P>
<P>
By default, <CODE>as</CODE> assumes the core instruction set (ARC
base). The <CODE>.cpu</CODE> pseudo-op is intended to be used to select
the variant.
</P>
<DL COMPACT>
<DT><CODE>-mbig-endian</CODE>
<DD>
<A NAME="IDX422"></A>
<A NAME="IDX423"></A>
<A NAME="IDX424"></A>
<A NAME="IDX425"></A>
<A NAME="IDX426"></A>
<A NAME="IDX427"></A>
<DT><CODE>-mlittle-endian</CODE>
<DD>
Any ARC configuration of <CODE>as</CODE> can select big-endian or
little-endian output at run time (unlike most other GNU development
tools, which must be configured for one or the other). Use
<SAMP>`-mbig-endian'</SAMP> to select big-endian output, and <SAMP>`-mlittle-endian'</SAMP>
for little-endian.
</DL>
<H2><A NAME="SEC141" HREF="as_toc.html#TOC141">Floating Point</A></H2>
<P>
<A NAME="IDX428"></A>
<A NAME="IDX429"></A>
The ARC cpu family currently does not have hardware floating point
support. Software floating point support is provided by <CODE>GCC</CODE>
and uses IEEE floating-point numbers.
</P>
<H2><A NAME="SEC142" HREF="as_toc.html#TOC142">ARC Machine Directives</A></H2>
<P>
<A NAME="IDX430"></A>
<A NAME="IDX431"></A>
The ARC version of <CODE>as</CODE> supports the following additional
machine directives:
</P>
<DL COMPACT>
<DT><CODE>.cpu</CODE>
<DD>
<A NAME="IDX432"></A>
This must be followed by the desired cpu.
The ARC is intended to be customizable, <CODE>.cpu</CODE> is used to
select the desired variant [though currently there are none].
</DL>
<P><HR><P>
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<TITLE>Using as - Footnotes</TITLE>
</HEAD>
<BODY>
<H1>Using as</H1>
<H2>The GNU Assembler</H2>
<H2>January 1994</H2>
<ADDRESS>Dean Elsner, Jay Fenlason &#38; friends</ADDRESS>
<P>
<P><HR><P>
<H3><A NAME="FOOT1" HREF="as_26.html#DOCF1">(1)</A></H3>
<P>Any
more details?
<P><HR><P>
This document was generated on 24 April 1999 using the
<A HREF="http://wwwinfo.cern.ch/dis/texi2html/">texi2html</A>
translator version 1.52.</P>
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<TITLE>Using as - Table of Contents</TITLE>
</HEAD>
<BODY>
<H1>Using as</H1>
<H2>The GNU Assembler</H2>
<H2>January 1994</H2>
<ADDRESS>Dean Elsner, Jay Fenlason &#38; friends</ADDRESS>
<P>
<P><HR><P>
<UL>
<LI><A NAME="TOC1" HREF="as_1.html#SEC1">Overview</A>
<UL>
<LI><A NAME="TOC2" HREF="as_1.html#SEC2">Structure of this Manual</A>
<LI><A NAME="TOC3" HREF="as_1.html#SEC3">The GNU Assembler</A>
<LI><A NAME="TOC4" HREF="as_1.html#SEC4">Object File Formats</A>
<LI><A NAME="TOC5" HREF="as_1.html#SEC5">Command Line</A>
<LI><A NAME="TOC6" HREF="as_1.html#SEC6">Input Files</A>
<LI><A NAME="TOC7" HREF="as_1.html#SEC7">Output (Object) File</A>
<LI><A NAME="TOC8" HREF="as_1.html#SEC8">Error and Warning Messages</A>
</UL>
<LI><A NAME="TOC9" HREF="as_2.html#SEC9">Command-Line Options</A>
<UL>
<LI><A NAME="TOC10" HREF="as_2.html#SEC10">Enable Listings: <CODE>-a[cdhlns]</CODE></A>
<LI><A NAME="TOC11" HREF="as_2.html#SEC11"><CODE>-D</CODE></A>
<LI><A NAME="TOC12" HREF="as_2.html#SEC12">Work Faster: <CODE>-f</CODE></A>
<LI><A NAME="TOC13" HREF="as_2.html#SEC13"><CODE>.include</CODE> search path: <CODE>-I</CODE> <VAR>path</VAR></A>
<LI><A NAME="TOC14" HREF="as_2.html#SEC14">Difference Tables: <CODE>-K</CODE></A>
<LI><A NAME="TOC15" HREF="as_2.html#SEC15">Include Local Labels: <CODE>-L</CODE></A>
<LI><A NAME="TOC16" HREF="as_2.html#SEC16">Assemble in MRI Compatibility Mode: <CODE>-M</CODE></A>
<LI><A NAME="TOC17" HREF="as_2.html#SEC17">Dependency tracking: <CODE>--MD</CODE></A>
<LI><A NAME="TOC18" HREF="as_2.html#SEC18">Name the Object File: <CODE>-o</CODE></A>
<LI><A NAME="TOC19" HREF="as_2.html#SEC19">Join Data and Text Sections: <CODE>-R</CODE></A>
<LI><A NAME="TOC20" HREF="as_2.html#SEC20">Display Assembly Statistics: <CODE>--statistics</CODE></A>
<LI><A NAME="TOC21" HREF="as_2.html#SEC21">Compatible output: <CODE>--traditional-format</CODE></A>
<LI><A NAME="TOC22" HREF="as_2.html#SEC22">Announce Version: <CODE>-v</CODE></A>
<LI><A NAME="TOC23" HREF="as_2.html#SEC23">Suppress Warnings: <CODE>-W</CODE></A>
<LI><A NAME="TOC24" HREF="as_2.html#SEC24">Generate Object File in Spite of Errors: <CODE>-Z</CODE></A>
</UL>
<LI><A NAME="TOC25" HREF="as_3.html#SEC25">Syntax</A>
<UL>
<LI><A NAME="TOC26" HREF="as_3.html#SEC26">Preprocessing</A>
<LI><A NAME="TOC27" HREF="as_3.html#SEC27">Whitespace</A>
<LI><A NAME="TOC28" HREF="as_3.html#SEC28">Comments</A>
<LI><A NAME="TOC29" HREF="as_3.html#SEC29">Symbols</A>
<LI><A NAME="TOC30" HREF="as_3.html#SEC30">Statements</A>
<LI><A NAME="TOC31" HREF="as_3.html#SEC31">Constants</A>
<UL>
<LI><A NAME="TOC32" HREF="as_3.html#SEC32">Character Constants</A>
<UL>
<LI><A NAME="TOC33" HREF="as_3.html#SEC33">Strings</A>
<LI><A NAME="TOC34" HREF="as_3.html#SEC34">Characters</A>
</UL>
<LI><A NAME="TOC35" HREF="as_3.html#SEC35">Number Constants</A>
<UL>
<LI><A NAME="TOC36" HREF="as_3.html#SEC36">Integers</A>
<LI><A NAME="TOC37" HREF="as_3.html#SEC37">Bignums</A>
<LI><A NAME="TOC38" HREF="as_3.html#SEC38">Flonums</A>
</UL>
</UL>
</UL>
<LI><A NAME="TOC39" HREF="as_4.html#SEC39">Sections and Relocation</A>
<UL>
<LI><A NAME="TOC40" HREF="as_4.html#SEC40">Background</A>
<LI><A NAME="TOC41" HREF="as_4.html#SEC41">Linker Sections</A>
<LI><A NAME="TOC42" HREF="as_4.html#SEC42">Assembler Internal Sections</A>
<LI><A NAME="TOC43" HREF="as_4.html#SEC43">Sub-Sections</A>
<LI><A NAME="TOC44" HREF="as_4.html#SEC44">bss Section</A>
</UL>
<LI><A NAME="TOC45" HREF="as_5.html#SEC45">Symbols</A>
<UL>
<LI><A NAME="TOC46" HREF="as_5.html#SEC46">Labels</A>
<LI><A NAME="TOC47" HREF="as_5.html#SEC47">Giving Symbols Other Values</A>
<LI><A NAME="TOC48" HREF="as_5.html#SEC48">Symbol Names</A>
<LI><A NAME="TOC49" HREF="as_5.html#SEC49">The Special Dot Symbol</A>
<LI><A NAME="TOC50" HREF="as_5.html#SEC50">Symbol Attributes</A>
<UL>
<LI><A NAME="TOC51" HREF="as_5.html#SEC51">Value</A>
<LI><A NAME="TOC52" HREF="as_5.html#SEC52">Type</A>
<LI><A NAME="TOC53" HREF="as_5.html#SEC53">Symbol Attributes: <CODE>a.out</CODE></A>
<UL>
<LI><A NAME="TOC54" HREF="as_5.html#SEC54">Descriptor</A>
<LI><A NAME="TOC55" HREF="as_5.html#SEC55">Other</A>
</UL>
<LI><A NAME="TOC56" HREF="as_5.html#SEC56">Symbol Attributes for COFF</A>
<UL>
<LI><A NAME="TOC57" HREF="as_5.html#SEC57">Primary Attributes</A>
<LI><A NAME="TOC58" HREF="as_5.html#SEC58">Auxiliary Attributes</A>
</UL>
<LI><A NAME="TOC59" HREF="as_5.html#SEC59">Symbol Attributes for SOM</A>
</UL>
</UL>
<LI><A NAME="TOC60" HREF="as_6.html#SEC60">Expressions</A>
<UL>
<LI><A NAME="TOC61" HREF="as_6.html#SEC61">Empty Expressions</A>
<LI><A NAME="TOC62" HREF="as_6.html#SEC62">Integer Expressions</A>
<UL>
<LI><A NAME="TOC63" HREF="as_6.html#SEC63">Arguments</A>
<LI><A NAME="TOC64" HREF="as_6.html#SEC64">Operators</A>
<LI><A NAME="TOC65" HREF="as_6.html#SEC65">Prefix Operator</A>
<LI><A NAME="TOC66" HREF="as_6.html#SEC66">Infix Operators</A>
</UL>
</UL>
<LI><A NAME="TOC67" HREF="as_7.html#SEC67">Assembler Directives</A>
<UL>
<LI><A NAME="TOC68" HREF="as_7.html#SEC68"><CODE>.abort</CODE></A>
<LI><A NAME="TOC69" HREF="as_7.html#SEC69"><CODE>.ABORT</CODE></A>
<LI><A NAME="TOC70" HREF="as_7.html#SEC70"><CODE>.align <VAR>abs-expr</VAR>, <VAR>abs-expr</VAR>, <VAR>abs-expr</VAR></CODE></A>
<LI><A NAME="TOC71" HREF="as_7.html#SEC71"><CODE>.app-file <VAR>string</VAR></CODE></A>
<LI><A NAME="TOC72" HREF="as_7.html#SEC72"><CODE>.ascii "<VAR>string</VAR>"</CODE>...</A>
<LI><A NAME="TOC73" HREF="as_7.html#SEC73"><CODE>.asciz "<VAR>string</VAR>"</CODE>...</A>
<LI><A NAME="TOC74" HREF="as_7.html#SEC74"><CODE>.balign[wl] <VAR>abs-expr</VAR>, <VAR>abs-expr</VAR>, <VAR>abs-expr</VAR></CODE></A>
<LI><A NAME="TOC75" HREF="as_7.html#SEC75"><CODE>.byte <VAR>expressions</VAR></CODE></A>
<LI><A NAME="TOC76" HREF="as_7.html#SEC76"><CODE>.comm <VAR>symbol</VAR> , <VAR>length</VAR> </CODE></A>
<LI><A NAME="TOC77" HREF="as_7.html#SEC77"><CODE>.data <VAR>subsection</VAR></CODE></A>
<LI><A NAME="TOC78" HREF="as_7.html#SEC78"><CODE>.def <VAR>name</VAR></CODE></A>
<LI><A NAME="TOC79" HREF="as_7.html#SEC79"><CODE>.desc <VAR>symbol</VAR>, <VAR>abs-expression</VAR></CODE></A>
<LI><A NAME="TOC80" HREF="as_7.html#SEC80"><CODE>.dim</CODE></A>
<LI><A NAME="TOC81" HREF="as_7.html#SEC81"><CODE>.double <VAR>flonums</VAR></CODE></A>
<LI><A NAME="TOC82" HREF="as_7.html#SEC82"><CODE>.eject</CODE></A>
<LI><A NAME="TOC83" HREF="as_7.html#SEC83"><CODE>.else</CODE></A>
<LI><A NAME="TOC84" HREF="as_7.html#SEC84"><CODE>.endef</CODE></A>
<LI><A NAME="TOC85" HREF="as_7.html#SEC85"><CODE>.endif</CODE></A>
<LI><A NAME="TOC86" HREF="as_7.html#SEC86"><CODE>.equ <VAR>symbol</VAR>, <VAR>expression</VAR></CODE></A>
<LI><A NAME="TOC87" HREF="as_7.html#SEC87"><CODE>.equiv <VAR>symbol</VAR>, <VAR>expression</VAR></CODE></A>
<LI><A NAME="TOC88" HREF="as_7.html#SEC88"><CODE>.err</CODE></A>
<LI><A NAME="TOC89" HREF="as_7.html#SEC89"><CODE>.extern</CODE></A>
<LI><A NAME="TOC90" HREF="as_7.html#SEC90"><CODE>.file <VAR>string</VAR></CODE></A>
<LI><A NAME="TOC91" HREF="as_7.html#SEC91"><CODE>.fill <VAR>repeat</VAR> , <VAR>size</VAR> , <VAR>value</VAR></CODE></A>
<LI><A NAME="TOC92" HREF="as_7.html#SEC92"><CODE>.float <VAR>flonums</VAR></CODE></A>
<LI><A NAME="TOC93" HREF="as_7.html#SEC93"><CODE>.global <VAR>symbol</VAR></CODE>, <CODE>.globl <VAR>symbol</VAR></CODE></A>
<LI><A NAME="TOC94" HREF="as_7.html#SEC94"><CODE>.hword <VAR>expressions</VAR></CODE></A>
<LI><A NAME="TOC95" HREF="as_7.html#SEC95"><CODE>.ident</CODE></A>
<LI><A NAME="TOC96" HREF="as_7.html#SEC96"><CODE>.if <VAR>absolute expression</VAR></CODE></A>
<LI><A NAME="TOC97" HREF="as_7.html#SEC97"><CODE>.include "<VAR>file</VAR>"</CODE></A>
<LI><A NAME="TOC98" HREF="as_7.html#SEC98"><CODE>.int <VAR>expressions</VAR></CODE></A>
<LI><A NAME="TOC99" HREF="as_7.html#SEC99"><CODE>.irp <VAR>symbol</VAR>,<VAR>values</VAR></CODE>...</A>
<LI><A NAME="TOC100" HREF="as_7.html#SEC100"><CODE>.irpc <VAR>symbol</VAR>,<VAR>values</VAR></CODE>...</A>
<LI><A NAME="TOC101" HREF="as_7.html#SEC101"><CODE>.lcomm <VAR>symbol</VAR> , <VAR>length</VAR></CODE></A>
<LI><A NAME="TOC102" HREF="as_7.html#SEC102"><CODE>.lflags</CODE></A>
<LI><A NAME="TOC103" HREF="as_7.html#SEC103"><CODE>.line <VAR>line-number</VAR></CODE></A>
<LI><A NAME="TOC104" HREF="as_7.html#SEC104"><CODE>.linkonce [<VAR>type</VAR>]</CODE></A>
<LI><A NAME="TOC105" HREF="as_7.html#SEC105"><CODE>.ln <VAR>line-number</VAR></CODE></A>
<LI><A NAME="TOC106" HREF="as_7.html#SEC106"><CODE>.mri <VAR>val</VAR></CODE></A>
<LI><A NAME="TOC107" HREF="as_7.html#SEC107"><CODE>.list</CODE></A>
<LI><A NAME="TOC108" HREF="as_7.html#SEC108"><CODE>.long <VAR>expressions</VAR></CODE></A>
<LI><A NAME="TOC109" HREF="as_7.html#SEC109"><CODE>.macro</CODE></A>
<LI><A NAME="TOC110" HREF="as_7.html#SEC110"><CODE>.nolist</CODE></A>
<LI><A NAME="TOC111" HREF="as_7.html#SEC111"><CODE>.octa <VAR>bignums</VAR></CODE></A>
<LI><A NAME="TOC112" HREF="as_7.html#SEC112"><CODE>.org <VAR>new-lc</VAR> , <VAR>fill</VAR></CODE></A>
<LI><A NAME="TOC113" HREF="as_7.html#SEC113"><CODE>.p2align[wl] <VAR>abs-expr</VAR>, <VAR>abs-expr</VAR>, <VAR>abs-expr</VAR></CODE></A>
<LI><A NAME="TOC114" HREF="as_7.html#SEC114"><CODE>.psize <VAR>lines</VAR> , <VAR>columns</VAR></CODE></A>
<LI><A NAME="TOC115" HREF="as_7.html#SEC115"><CODE>.quad <VAR>bignums</VAR></CODE></A>
<LI><A NAME="TOC116" HREF="as_7.html#SEC116"><CODE>.rept <VAR>count</VAR></CODE></A>
<LI><A NAME="TOC117" HREF="as_7.html#SEC117"><CODE>.sbttl "<VAR>subheading</VAR>"</CODE></A>
<LI><A NAME="TOC118" HREF="as_7.html#SEC118"><CODE>.scl <VAR>class</VAR></CODE></A>
<LI><A NAME="TOC119" HREF="as_7.html#SEC119"><CODE>.section <VAR>name</VAR></CODE></A>
<LI><A NAME="TOC120" HREF="as_7.html#SEC120"><CODE>.set <VAR>symbol</VAR>, <VAR>expression</VAR></CODE></A>
<LI><A NAME="TOC121" HREF="as_7.html#SEC121"><CODE>.short <VAR>expressions</VAR></CODE></A>
<LI><A NAME="TOC122" HREF="as_7.html#SEC122"><CODE>.single <VAR>flonums</VAR></CODE></A>
<LI><A NAME="TOC123" HREF="as_7.html#SEC123"><CODE>.size</CODE></A>
<LI><A NAME="TOC124" HREF="as_7.html#SEC124"><CODE>.sleb128 <VAR>expressions</VAR></CODE></A>
<LI><A NAME="TOC125" HREF="as_7.html#SEC125"><CODE>.skip <VAR>size</VAR> , <VAR>fill</VAR></CODE></A>
<LI><A NAME="TOC126" HREF="as_7.html#SEC126"><CODE>.space <VAR>size</VAR> , <VAR>fill</VAR></CODE></A>
<LI><A NAME="TOC127" HREF="as_7.html#SEC127"><CODE>.stabd, .stabn, .stabs</CODE></A>
<LI><A NAME="TOC128" HREF="as_7.html#SEC128"><CODE>.string</CODE> "<VAR>str</VAR>"</A>
<LI><A NAME="TOC129" HREF="as_7.html#SEC129"><CODE>.symver</CODE></A>
<LI><A NAME="TOC130" HREF="as_7.html#SEC130"><CODE>.tag <VAR>structname</VAR></CODE></A>
<LI><A NAME="TOC131" HREF="as_7.html#SEC131"><CODE>.text <VAR>subsection</VAR></CODE></A>
<LI><A NAME="TOC132" HREF="as_7.html#SEC132"><CODE>.title "<VAR>heading</VAR>"</CODE></A>
<LI><A NAME="TOC133" HREF="as_7.html#SEC133"><CODE>.type <VAR>int</VAR></CODE></A>
<LI><A NAME="TOC134" HREF="as_7.html#SEC134"><CODE>.val <VAR>addr</VAR></CODE></A>
<LI><A NAME="TOC135" HREF="as_7.html#SEC135"><CODE>.uleb128 <VAR>expressions</VAR></CODE></A>
<LI><A NAME="TOC136" HREF="as_7.html#SEC136"><CODE>.word <VAR>expressions</VAR></CODE></A>
<LI><A NAME="TOC137" HREF="as_7.html#SEC137">Deprecated Directives</A>
</UL>
<LI><A NAME="TOC138" HREF="as_8.html#SEC138">Machine Dependent Features</A>
<LI><A NAME="TOC139" HREF="as_9.html#SEC139">ARC Dependent Features</A>
<UL>
<LI><A NAME="TOC140" HREF="as_9.html#SEC140">Options</A>
<LI><A NAME="TOC141" HREF="as_9.html#SEC141">Floating Point</A>
<LI><A NAME="TOC142" HREF="as_9.html#SEC142">ARC Machine Directives</A>
</UL>
<LI><A NAME="TOC143" HREF="as_10.html#SEC143">AMD 29K Dependent Features</A>
<UL>
<LI><A NAME="TOC144" HREF="as_10.html#SEC144">Options</A>
<LI><A NAME="TOC145" HREF="as_10.html#SEC145">Syntax</A>
<UL>
<LI><A NAME="TOC146" HREF="as_10.html#SEC146">Macros</A>
<LI><A NAME="TOC147" HREF="as_10.html#SEC147">Special Characters</A>
<LI><A NAME="TOC148" HREF="as_10.html#SEC148">Register Names</A>
</UL>
<LI><A NAME="TOC149" HREF="as_10.html#SEC149">Floating Point</A>
<LI><A NAME="TOC150" HREF="as_10.html#SEC150">AMD 29K Machine Directives</A>
<LI><A NAME="TOC151" HREF="as_10.html#SEC151">Opcodes</A>
</UL>
<LI><A NAME="TOC152" HREF="as_11.html#SEC152">ARM Dependent Features</A>
<UL>
<LI><A NAME="TOC153" HREF="as_11.html#SEC153">Options</A>
<LI><A NAME="TOC154" HREF="as_11.html#SEC154">Syntax</A>
<UL>
<LI><A NAME="TOC155" HREF="as_11.html#SEC155">Special Characters</A>
<LI><A NAME="TOC156" HREF="as_11.html#SEC156">Register Names</A>
</UL>
<LI><A NAME="TOC157" HREF="as_11.html#SEC157">Floating Point</A>
<LI><A NAME="TOC158" HREF="as_11.html#SEC158">ARM Machine Directives</A>
<LI><A NAME="TOC159" HREF="as_11.html#SEC159">Opcodes</A>
</UL>
<LI><A NAME="TOC160" HREF="as_12.html#SEC160">D10V Dependent Features</A>
<UL>
<LI><A NAME="TOC161" HREF="as_12.html#SEC161">D10V Options</A>
<LI><A NAME="TOC162" HREF="as_12.html#SEC162">Syntax</A>
<UL>
<LI><A NAME="TOC163" HREF="as_12.html#SEC163">Size Modifiers</A>
<LI><A NAME="TOC164" HREF="as_12.html#SEC164">Sub-Instructions</A>
<LI><A NAME="TOC165" HREF="as_12.html#SEC165">Special Characters</A>
<LI><A NAME="TOC166" HREF="as_12.html#SEC166">Register Names</A>
<LI><A NAME="TOC167" HREF="as_12.html#SEC167">Addressing Modes</A>
<LI><A NAME="TOC168" HREF="as_12.html#SEC168">@WORD Modifier</A>
</UL>
<LI><A NAME="TOC169" HREF="as_12.html#SEC169">Floating Point</A>
<LI><A NAME="TOC170" HREF="as_12.html#SEC170">Opcodes</A>
</UL>
<LI><A NAME="TOC171" HREF="as_13.html#SEC171">H8/300 Dependent Features</A>
<UL>
<LI><A NAME="TOC172" HREF="as_13.html#SEC172">Options</A>
<LI><A NAME="TOC173" HREF="as_13.html#SEC173">Syntax</A>
<UL>
<LI><A NAME="TOC174" HREF="as_13.html#SEC174">Special Characters</A>
<LI><A NAME="TOC175" HREF="as_13.html#SEC175">Register Names</A>
<LI><A NAME="TOC176" HREF="as_13.html#SEC176">Addressing Modes</A>
</UL>
<LI><A NAME="TOC177" HREF="as_13.html#SEC177">Floating Point</A>
<LI><A NAME="TOC178" HREF="as_13.html#SEC178">H8/300 Machine Directives</A>
<LI><A NAME="TOC179" HREF="as_13.html#SEC179">Opcodes</A>
</UL>
<LI><A NAME="TOC180" HREF="as_14.html#SEC180">H8/500 Dependent Features</A>
<UL>
<LI><A NAME="TOC181" HREF="as_14.html#SEC181">Options</A>
<LI><A NAME="TOC182" HREF="as_14.html#SEC182">Syntax</A>
<UL>
<LI><A NAME="TOC183" HREF="as_14.html#SEC183">Special Characters</A>
<LI><A NAME="TOC184" HREF="as_14.html#SEC184">Register Names</A>
<LI><A NAME="TOC185" HREF="as_14.html#SEC185">Addressing Modes</A>
</UL>
<LI><A NAME="TOC186" HREF="as_14.html#SEC186">Floating Point</A>
<LI><A NAME="TOC187" HREF="as_14.html#SEC187">H8/500 Machine Directives</A>
<LI><A NAME="TOC188" HREF="as_14.html#SEC188">Opcodes</A>
</UL>
<LI><A NAME="TOC189" HREF="as_15.html#SEC189">HPPA Dependent Features</A>
<UL>
<LI><A NAME="TOC190" HREF="as_15.html#SEC190">Notes</A>
<LI><A NAME="TOC191" HREF="as_15.html#SEC191">Options</A>
<LI><A NAME="TOC192" HREF="as_15.html#SEC192">Syntax</A>
<LI><A NAME="TOC193" HREF="as_15.html#SEC193">Floating Point</A>
<LI><A NAME="TOC194" HREF="as_15.html#SEC194">HPPA Assembler Directives</A>
<LI><A NAME="TOC195" HREF="as_15.html#SEC195">Opcodes</A>
</UL>
<LI><A NAME="TOC196" HREF="as_16.html#SEC196">80386 Dependent Features</A>
<UL>
<LI><A NAME="TOC197" HREF="as_16.html#SEC197">Options</A>
<LI><A NAME="TOC198" HREF="as_16.html#SEC198">AT&#38;T Syntax versus Intel Syntax</A>
<LI><A NAME="TOC199" HREF="as_16.html#SEC199">Opcode Naming</A>
<LI><A NAME="TOC200" HREF="as_16.html#SEC200">Register Naming</A>
<LI><A NAME="TOC201" HREF="as_16.html#SEC201">Opcode Prefixes</A>
<LI><A NAME="TOC202" HREF="as_16.html#SEC202">Memory References</A>
<LI><A NAME="TOC203" HREF="as_16.html#SEC203">Handling of Jump Instructions</A>
<LI><A NAME="TOC204" HREF="as_16.html#SEC204">Floating Point</A>
<LI><A NAME="TOC205" HREF="as_16.html#SEC205">Writing 16-bit Code</A>
<LI><A NAME="TOC206" HREF="as_16.html#SEC206">Notes</A>
</UL>
<LI><A NAME="TOC207" HREF="as_17.html#SEC207">Intel 80960 Dependent Features</A>
<UL>
<LI><A NAME="TOC208" HREF="as_17.html#SEC208">i960 Command-line Options</A>
<LI><A NAME="TOC209" HREF="as_17.html#SEC209">Floating Point</A>
<LI><A NAME="TOC210" HREF="as_17.html#SEC210">i960 Machine Directives</A>
<LI><A NAME="TOC211" HREF="as_17.html#SEC211">i960 Opcodes</A>
<UL>
<LI><A NAME="TOC212" HREF="as_17.html#SEC212"><CODE>callj</CODE></A>
<LI><A NAME="TOC213" HREF="as_17.html#SEC213">Compare-and-Branch</A>
</UL>
</UL>
<LI><A NAME="TOC214" HREF="as_18.html#SEC214">M680x0 Dependent Features</A>
<UL>
<LI><A NAME="TOC215" HREF="as_18.html#SEC215">M680x0 Options</A>
<LI><A NAME="TOC216" HREF="as_18.html#SEC216">Syntax</A>
<LI><A NAME="TOC217" HREF="as_18.html#SEC217">Motorola Syntax</A>
<LI><A NAME="TOC218" HREF="as_18.html#SEC218">Floating Point</A>
<LI><A NAME="TOC219" HREF="as_18.html#SEC219">680x0 Machine Directives</A>
<LI><A NAME="TOC220" HREF="as_18.html#SEC220">Opcodes</A>
<UL>
<LI><A NAME="TOC221" HREF="as_18.html#SEC221">Branch Improvement</A>
<LI><A NAME="TOC222" HREF="as_18.html#SEC222">Special Characters</A>
</UL>
</UL>
<LI><A NAME="TOC223" HREF="as_19.html#SEC223">MIPS Dependent Features</A>
<UL>
<LI><A NAME="TOC224" HREF="as_19.html#SEC224">Assembler options</A>
<LI><A NAME="TOC225" HREF="as_19.html#SEC225">MIPS ECOFF object code</A>
<LI><A NAME="TOC226" HREF="as_19.html#SEC226">Directives for debugging information</A>
<LI><A NAME="TOC227" HREF="as_19.html#SEC227">Directives to override the ISA level</A>
<LI><A NAME="TOC228" HREF="as_19.html#SEC228">Directives for extending MIPS 16 bit instructions</A>
<LI><A NAME="TOC229" HREF="as_19.html#SEC229">Directive to mark data as an instruction</A>
<LI><A NAME="TOC230" HREF="as_19.html#SEC230">Directives to save and restore options</A>
</UL>
<LI><A NAME="TOC231" HREF="as_20.html#SEC231">Hitachi SH Dependent Features</A>
<UL>
<LI><A NAME="TOC232" HREF="as_20.html#SEC232">Options</A>
<LI><A NAME="TOC233" HREF="as_20.html#SEC233">Syntax</A>
<UL>
<LI><A NAME="TOC234" HREF="as_20.html#SEC234">Special Characters</A>
<LI><A NAME="TOC235" HREF="as_20.html#SEC235">Register Names</A>
<LI><A NAME="TOC236" HREF="as_20.html#SEC236">Addressing Modes</A>
</UL>
<LI><A NAME="TOC237" HREF="as_20.html#SEC237">Floating Point</A>
<LI><A NAME="TOC238" HREF="as_20.html#SEC238">SH Machine Directives</A>
<LI><A NAME="TOC239" HREF="as_20.html#SEC239">Opcodes</A>
</UL>
<LI><A NAME="TOC240" HREF="as_21.html#SEC240">SPARC Dependent Features</A>
<UL>
<LI><A NAME="TOC241" HREF="as_21.html#SEC241">Options</A>
<LI><A NAME="TOC242" HREF="as_21.html#SEC242">Enforcing aligned data</A>
<LI><A NAME="TOC243" HREF="as_21.html#SEC243">Floating Point</A>
<LI><A NAME="TOC244" HREF="as_21.html#SEC244">Sparc Machine Directives</A>
</UL>
<LI><A NAME="TOC245" HREF="as_22.html#SEC245">Z8000 Dependent Features</A>
<UL>
<LI><A NAME="TOC246" HREF="as_22.html#SEC246">Options</A>
<LI><A NAME="TOC247" HREF="as_22.html#SEC247">Syntax</A>
<UL>
<LI><A NAME="TOC248" HREF="as_22.html#SEC248">Special Characters</A>
<LI><A NAME="TOC249" HREF="as_22.html#SEC249">Register Names</A>
<LI><A NAME="TOC250" HREF="as_22.html#SEC250">Addressing Modes</A>
</UL>
<LI><A NAME="TOC251" HREF="as_22.html#SEC251">Assembler Directives for the Z8000</A>
<LI><A NAME="TOC252" HREF="as_22.html#SEC252">Opcodes</A>
</UL>
<LI><A NAME="TOC253" HREF="as_23.html#SEC253">VAX Dependent Features</A>
<UL>
<LI><A NAME="TOC254" HREF="as_23.html#SEC254">VAX Command-Line Options</A>
<LI><A NAME="TOC255" HREF="as_23.html#SEC255">VAX Floating Point</A>
<LI><A NAME="TOC256" HREF="as_23.html#SEC256">Vax Machine Directives</A>
<LI><A NAME="TOC257" HREF="as_23.html#SEC257">VAX Opcodes</A>
<LI><A NAME="TOC258" HREF="as_23.html#SEC258">VAX Branch Improvement</A>
<LI><A NAME="TOC259" HREF="as_23.html#SEC259">VAX Operands</A>
<LI><A NAME="TOC260" HREF="as_23.html#SEC260">Not Supported on VAX</A>
</UL>
<LI><A NAME="TOC261" HREF="as_24.html#SEC261">v850 Dependent Features</A>
<UL>
<LI><A NAME="TOC262" HREF="as_24.html#SEC262">Options</A>
<LI><A NAME="TOC263" HREF="as_24.html#SEC263">Syntax</A>
<UL>
<LI><A NAME="TOC264" HREF="as_24.html#SEC264">Special Characters</A>
<LI><A NAME="TOC265" HREF="as_24.html#SEC265">Register Names</A>
</UL>
<LI><A NAME="TOC266" HREF="as_24.html#SEC266">Floating Point</A>
<LI><A NAME="TOC267" HREF="as_24.html#SEC267">V850 Machine Directives</A>
<LI><A NAME="TOC268" HREF="as_24.html#SEC268">Opcodes</A>
</UL>
<LI><A NAME="TOC269" HREF="as_25.html#SEC269">Reporting Bugs</A>
<UL>
<LI><A NAME="TOC270" HREF="as_25.html#SEC270">Have you found a bug?</A>
<LI><A NAME="TOC271" HREF="as_25.html#SEC271">How to report bugs</A>
</UL>
<LI><A NAME="TOC272" HREF="as_26.html#SEC272">Acknowledgements</A>
<LI><A NAME="TOC273" HREF="as_27.html#SEC273">Index</A>
</UL>
<P><HR><P>
This document was generated on 24 April 1999 using the
<A HREF="http://wwwinfo.cern.ch/dis/texi2html/">texi2html</A>
translator version 1.52.</P>
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<!-- This HTML file has been created by texi2html 1.52
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<TITLE>Using as - Table of Contents</TITLE>
</HEAD>
<BODY>
<H1>Using as</H1>
<H2>The GNU Assembler</H2>
<H2>January 1994</H2>
<ADDRESS>Dean Elsner, Jay Fenlason &#38; friends</ADDRESS>
<P>
<P><HR><P>
<UL>
<LI><A NAME="TOC1" HREF="as_1.html#SEC1">Overview</A>
<UL>
<LI><A NAME="TOC2" HREF="as_1.html#SEC2">Structure of this Manual</A>
<LI><A NAME="TOC3" HREF="as_1.html#SEC3">The GNU Assembler</A>
<LI><A NAME="TOC4" HREF="as_1.html#SEC4">Object File Formats</A>
<LI><A NAME="TOC5" HREF="as_1.html#SEC5">Command Line</A>
<LI><A NAME="TOC6" HREF="as_1.html#SEC6">Input Files</A>
<LI><A NAME="TOC7" HREF="as_1.html#SEC7">Output (Object) File</A>
<LI><A NAME="TOC8" HREF="as_1.html#SEC8">Error and Warning Messages</A>
</UL>
<LI><A NAME="TOC9" HREF="as_2.html#SEC9">Command-Line Options</A>
<UL>
<LI><A NAME="TOC10" HREF="as_2.html#SEC10">Enable Listings: <CODE>-a[cdhlns]</CODE></A>
<LI><A NAME="TOC11" HREF="as_2.html#SEC11"><CODE>-D</CODE></A>
<LI><A NAME="TOC12" HREF="as_2.html#SEC12">Work Faster: <CODE>-f</CODE></A>
<LI><A NAME="TOC13" HREF="as_2.html#SEC13"><CODE>.include</CODE> search path: <CODE>-I</CODE> <VAR>path</VAR></A>
<LI><A NAME="TOC14" HREF="as_2.html#SEC14">Difference Tables: <CODE>-K</CODE></A>
<LI><A NAME="TOC15" HREF="as_2.html#SEC15">Include Local Labels: <CODE>-L</CODE></A>
<LI><A NAME="TOC16" HREF="as_2.html#SEC16">Assemble in MRI Compatibility Mode: <CODE>-M</CODE></A>
<LI><A NAME="TOC17" HREF="as_2.html#SEC17">Dependency tracking: <CODE>--MD</CODE></A>
<LI><A NAME="TOC18" HREF="as_2.html#SEC18">Name the Object File: <CODE>-o</CODE></A>
<LI><A NAME="TOC19" HREF="as_2.html#SEC19">Join Data and Text Sections: <CODE>-R</CODE></A>
<LI><A NAME="TOC20" HREF="as_2.html#SEC20">Display Assembly Statistics: <CODE>--statistics</CODE></A>
<LI><A NAME="TOC21" HREF="as_2.html#SEC21">Compatible output: <CODE>--traditional-format</CODE></A>
<LI><A NAME="TOC22" HREF="as_2.html#SEC22">Announce Version: <CODE>-v</CODE></A>
<LI><A NAME="TOC23" HREF="as_2.html#SEC23">Suppress Warnings: <CODE>-W</CODE></A>
<LI><A NAME="TOC24" HREF="as_2.html#SEC24">Generate Object File in Spite of Errors: <CODE>-Z</CODE></A>
</UL>
<LI><A NAME="TOC25" HREF="as_3.html#SEC25">Syntax</A>
<UL>
<LI><A NAME="TOC26" HREF="as_3.html#SEC26">Preprocessing</A>
<LI><A NAME="TOC27" HREF="as_3.html#SEC27">Whitespace</A>
<LI><A NAME="TOC28" HREF="as_3.html#SEC28">Comments</A>
<LI><A NAME="TOC29" HREF="as_3.html#SEC29">Symbols</A>
<LI><A NAME="TOC30" HREF="as_3.html#SEC30">Statements</A>
<LI><A NAME="TOC31" HREF="as_3.html#SEC31">Constants</A>
<UL>
<LI><A NAME="TOC32" HREF="as_3.html#SEC32">Character Constants</A>
<UL>
<LI><A NAME="TOC33" HREF="as_3.html#SEC33">Strings</A>
<LI><A NAME="TOC34" HREF="as_3.html#SEC34">Characters</A>
</UL>
<LI><A NAME="TOC35" HREF="as_3.html#SEC35">Number Constants</A>
<UL>
<LI><A NAME="TOC36" HREF="as_3.html#SEC36">Integers</A>
<LI><A NAME="TOC37" HREF="as_3.html#SEC37">Bignums</A>
<LI><A NAME="TOC38" HREF="as_3.html#SEC38">Flonums</A>
</UL>
</UL>
</UL>
<LI><A NAME="TOC39" HREF="as_4.html#SEC39">Sections and Relocation</A>
<UL>
<LI><A NAME="TOC40" HREF="as_4.html#SEC40">Background</A>
<LI><A NAME="TOC41" HREF="as_4.html#SEC41">Linker Sections</A>
<LI><A NAME="TOC42" HREF="as_4.html#SEC42">Assembler Internal Sections</A>
<LI><A NAME="TOC43" HREF="as_4.html#SEC43">Sub-Sections</A>
<LI><A NAME="TOC44" HREF="as_4.html#SEC44">bss Section</A>
</UL>
<LI><A NAME="TOC45" HREF="as_5.html#SEC45">Symbols</A>
<UL>
<LI><A NAME="TOC46" HREF="as_5.html#SEC46">Labels</A>
<LI><A NAME="TOC47" HREF="as_5.html#SEC47">Giving Symbols Other Values</A>
<LI><A NAME="TOC48" HREF="as_5.html#SEC48">Symbol Names</A>
<LI><A NAME="TOC49" HREF="as_5.html#SEC49">The Special Dot Symbol</A>
<LI><A NAME="TOC50" HREF="as_5.html#SEC50">Symbol Attributes</A>
<UL>
<LI><A NAME="TOC51" HREF="as_5.html#SEC51">Value</A>
<LI><A NAME="TOC52" HREF="as_5.html#SEC52">Type</A>
<LI><A NAME="TOC53" HREF="as_5.html#SEC53">Symbol Attributes: <CODE>a.out</CODE></A>
<UL>
<LI><A NAME="TOC54" HREF="as_5.html#SEC54">Descriptor</A>
<LI><A NAME="TOC55" HREF="as_5.html#SEC55">Other</A>
</UL>
<LI><A NAME="TOC56" HREF="as_5.html#SEC56">Symbol Attributes for COFF</A>
<UL>
<LI><A NAME="TOC57" HREF="as_5.html#SEC57">Primary Attributes</A>
<LI><A NAME="TOC58" HREF="as_5.html#SEC58">Auxiliary Attributes</A>
</UL>
<LI><A NAME="TOC59" HREF="as_5.html#SEC59">Symbol Attributes for SOM</A>
</UL>
</UL>
<LI><A NAME="TOC60" HREF="as_6.html#SEC60">Expressions</A>
<UL>
<LI><A NAME="TOC61" HREF="as_6.html#SEC61">Empty Expressions</A>
<LI><A NAME="TOC62" HREF="as_6.html#SEC62">Integer Expressions</A>
<UL>
<LI><A NAME="TOC63" HREF="as_6.html#SEC63">Arguments</A>
<LI><A NAME="TOC64" HREF="as_6.html#SEC64">Operators</A>
<LI><A NAME="TOC65" HREF="as_6.html#SEC65">Prefix Operator</A>
<LI><A NAME="TOC66" HREF="as_6.html#SEC66">Infix Operators</A>
</UL>
</UL>
<LI><A NAME="TOC67" HREF="as_7.html#SEC67">Assembler Directives</A>
<UL>
<LI><A NAME="TOC68" HREF="as_7.html#SEC68"><CODE>.abort</CODE></A>
<LI><A NAME="TOC69" HREF="as_7.html#SEC69"><CODE>.ABORT</CODE></A>
<LI><A NAME="TOC70" HREF="as_7.html#SEC70"><CODE>.align <VAR>abs-expr</VAR>, <VAR>abs-expr</VAR>, <VAR>abs-expr</VAR></CODE></A>
<LI><A NAME="TOC71" HREF="as_7.html#SEC71"><CODE>.app-file <VAR>string</VAR></CODE></A>
<LI><A NAME="TOC72" HREF="as_7.html#SEC72"><CODE>.ascii "<VAR>string</VAR>"</CODE>...</A>
<LI><A NAME="TOC73" HREF="as_7.html#SEC73"><CODE>.asciz "<VAR>string</VAR>"</CODE>...</A>
<LI><A NAME="TOC74" HREF="as_7.html#SEC74"><CODE>.balign[wl] <VAR>abs-expr</VAR>, <VAR>abs-expr</VAR>, <VAR>abs-expr</VAR></CODE></A>
<LI><A NAME="TOC75" HREF="as_7.html#SEC75"><CODE>.byte <VAR>expressions</VAR></CODE></A>
<LI><A NAME="TOC76" HREF="as_7.html#SEC76"><CODE>.comm <VAR>symbol</VAR> , <VAR>length</VAR> </CODE></A>
<LI><A NAME="TOC77" HREF="as_7.html#SEC77"><CODE>.data <VAR>subsection</VAR></CODE></A>
<LI><A NAME="TOC78" HREF="as_7.html#SEC78"><CODE>.def <VAR>name</VAR></CODE></A>
<LI><A NAME="TOC79" HREF="as_7.html#SEC79"><CODE>.desc <VAR>symbol</VAR>, <VAR>abs-expression</VAR></CODE></A>
<LI><A NAME="TOC80" HREF="as_7.html#SEC80"><CODE>.dim</CODE></A>
<LI><A NAME="TOC81" HREF="as_7.html#SEC81"><CODE>.double <VAR>flonums</VAR></CODE></A>
<LI><A NAME="TOC82" HREF="as_7.html#SEC82"><CODE>.eject</CODE></A>
<LI><A NAME="TOC83" HREF="as_7.html#SEC83"><CODE>.else</CODE></A>
<LI><A NAME="TOC84" HREF="as_7.html#SEC84"><CODE>.endef</CODE></A>
<LI><A NAME="TOC85" HREF="as_7.html#SEC85"><CODE>.endif</CODE></A>
<LI><A NAME="TOC86" HREF="as_7.html#SEC86"><CODE>.equ <VAR>symbol</VAR>, <VAR>expression</VAR></CODE></A>
<LI><A NAME="TOC87" HREF="as_7.html#SEC87"><CODE>.equiv <VAR>symbol</VAR>, <VAR>expression</VAR></CODE></A>
<LI><A NAME="TOC88" HREF="as_7.html#SEC88"><CODE>.err</CODE></A>
<LI><A NAME="TOC89" HREF="as_7.html#SEC89"><CODE>.extern</CODE></A>
<LI><A NAME="TOC90" HREF="as_7.html#SEC90"><CODE>.file <VAR>string</VAR></CODE></A>
<LI><A NAME="TOC91" HREF="as_7.html#SEC91"><CODE>.fill <VAR>repeat</VAR> , <VAR>size</VAR> , <VAR>value</VAR></CODE></A>
<LI><A NAME="TOC92" HREF="as_7.html#SEC92"><CODE>.float <VAR>flonums</VAR></CODE></A>
<LI><A NAME="TOC93" HREF="as_7.html#SEC93"><CODE>.global <VAR>symbol</VAR></CODE>, <CODE>.globl <VAR>symbol</VAR></CODE></A>
<LI><A NAME="TOC94" HREF="as_7.html#SEC94"><CODE>.hword <VAR>expressions</VAR></CODE></A>
<LI><A NAME="TOC95" HREF="as_7.html#SEC95"><CODE>.ident</CODE></A>
<LI><A NAME="TOC96" HREF="as_7.html#SEC96"><CODE>.if <VAR>absolute expression</VAR></CODE></A>
<LI><A NAME="TOC97" HREF="as_7.html#SEC97"><CODE>.include "<VAR>file</VAR>"</CODE></A>
<LI><A NAME="TOC98" HREF="as_7.html#SEC98"><CODE>.int <VAR>expressions</VAR></CODE></A>
<LI><A NAME="TOC99" HREF="as_7.html#SEC99"><CODE>.irp <VAR>symbol</VAR>,<VAR>values</VAR></CODE>...</A>
<LI><A NAME="TOC100" HREF="as_7.html#SEC100"><CODE>.irpc <VAR>symbol</VAR>,<VAR>values</VAR></CODE>...</A>
<LI><A NAME="TOC101" HREF="as_7.html#SEC101"><CODE>.lcomm <VAR>symbol</VAR> , <VAR>length</VAR></CODE></A>
<LI><A NAME="TOC102" HREF="as_7.html#SEC102"><CODE>.lflags</CODE></A>
<LI><A NAME="TOC103" HREF="as_7.html#SEC103"><CODE>.line <VAR>line-number</VAR></CODE></A>
<LI><A NAME="TOC104" HREF="as_7.html#SEC104"><CODE>.linkonce [<VAR>type</VAR>]</CODE></A>
<LI><A NAME="TOC105" HREF="as_7.html#SEC105"><CODE>.ln <VAR>line-number</VAR></CODE></A>
<LI><A NAME="TOC106" HREF="as_7.html#SEC106"><CODE>.mri <VAR>val</VAR></CODE></A>
<LI><A NAME="TOC107" HREF="as_7.html#SEC107"><CODE>.list</CODE></A>
<LI><A NAME="TOC108" HREF="as_7.html#SEC108"><CODE>.long <VAR>expressions</VAR></CODE></A>
<LI><A NAME="TOC109" HREF="as_7.html#SEC109"><CODE>.macro</CODE></A>
<LI><A NAME="TOC110" HREF="as_7.html#SEC110"><CODE>.nolist</CODE></A>
<LI><A NAME="TOC111" HREF="as_7.html#SEC111"><CODE>.octa <VAR>bignums</VAR></CODE></A>
<LI><A NAME="TOC112" HREF="as_7.html#SEC112"><CODE>.org <VAR>new-lc</VAR> , <VAR>fill</VAR></CODE></A>
<LI><A NAME="TOC113" HREF="as_7.html#SEC113"><CODE>.p2align[wl] <VAR>abs-expr</VAR>, <VAR>abs-expr</VAR>, <VAR>abs-expr</VAR></CODE></A>
<LI><A NAME="TOC114" HREF="as_7.html#SEC114"><CODE>.psize <VAR>lines</VAR> , <VAR>columns</VAR></CODE></A>
<LI><A NAME="TOC115" HREF="as_7.html#SEC115"><CODE>.quad <VAR>bignums</VAR></CODE></A>
<LI><A NAME="TOC116" HREF="as_7.html#SEC116"><CODE>.rept <VAR>count</VAR></CODE></A>
<LI><A NAME="TOC117" HREF="as_7.html#SEC117"><CODE>.sbttl "<VAR>subheading</VAR>"</CODE></A>
<LI><A NAME="TOC118" HREF="as_7.html#SEC118"><CODE>.scl <VAR>class</VAR></CODE></A>
<LI><A NAME="TOC119" HREF="as_7.html#SEC119"><CODE>.section <VAR>name</VAR></CODE></A>
<LI><A NAME="TOC120" HREF="as_7.html#SEC120"><CODE>.set <VAR>symbol</VAR>, <VAR>expression</VAR></CODE></A>
<LI><A NAME="TOC121" HREF="as_7.html#SEC121"><CODE>.short <VAR>expressions</VAR></CODE></A>
<LI><A NAME="TOC122" HREF="as_7.html#SEC122"><CODE>.single <VAR>flonums</VAR></CODE></A>
<LI><A NAME="TOC123" HREF="as_7.html#SEC123"><CODE>.size</CODE></A>
<LI><A NAME="TOC124" HREF="as_7.html#SEC124"><CODE>.sleb128 <VAR>expressions</VAR></CODE></A>
<LI><A NAME="TOC125" HREF="as_7.html#SEC125"><CODE>.skip <VAR>size</VAR> , <VAR>fill</VAR></CODE></A>
<LI><A NAME="TOC126" HREF="as_7.html#SEC126"><CODE>.space <VAR>size</VAR> , <VAR>fill</VAR></CODE></A>
<LI><A NAME="TOC127" HREF="as_7.html#SEC127"><CODE>.stabd, .stabn, .stabs</CODE></A>
<LI><A NAME="TOC128" HREF="as_7.html#SEC128"><CODE>.string</CODE> "<VAR>str</VAR>"</A>
<LI><A NAME="TOC129" HREF="as_7.html#SEC129"><CODE>.symver</CODE></A>
<LI><A NAME="TOC130" HREF="as_7.html#SEC130"><CODE>.tag <VAR>structname</VAR></CODE></A>
<LI><A NAME="TOC131" HREF="as_7.html#SEC131"><CODE>.text <VAR>subsection</VAR></CODE></A>
<LI><A NAME="TOC132" HREF="as_7.html#SEC132"><CODE>.title "<VAR>heading</VAR>"</CODE></A>
<LI><A NAME="TOC133" HREF="as_7.html#SEC133"><CODE>.type <VAR>int</VAR></CODE></A>
<LI><A NAME="TOC134" HREF="as_7.html#SEC134"><CODE>.val <VAR>addr</VAR></CODE></A>
<LI><A NAME="TOC135" HREF="as_7.html#SEC135"><CODE>.uleb128 <VAR>expressions</VAR></CODE></A>
<LI><A NAME="TOC136" HREF="as_7.html#SEC136"><CODE>.word <VAR>expressions</VAR></CODE></A>
<LI><A NAME="TOC137" HREF="as_7.html#SEC137">Deprecated Directives</A>
</UL>
<LI><A NAME="TOC138" HREF="as_8.html#SEC138">Machine Dependent Features</A>
<LI><A NAME="TOC139" HREF="as_9.html#SEC139">ARC Dependent Features</A>
<UL>
<LI><A NAME="TOC140" HREF="as_9.html#SEC140">Options</A>
<LI><A NAME="TOC141" HREF="as_9.html#SEC141">Floating Point</A>
<LI><A NAME="TOC142" HREF="as_9.html#SEC142">ARC Machine Directives</A>
</UL>
<LI><A NAME="TOC143" HREF="as_10.html#SEC143">AMD 29K Dependent Features</A>
<UL>
<LI><A NAME="TOC144" HREF="as_10.html#SEC144">Options</A>
<LI><A NAME="TOC145" HREF="as_10.html#SEC145">Syntax</A>
<UL>
<LI><A NAME="TOC146" HREF="as_10.html#SEC146">Macros</A>
<LI><A NAME="TOC147" HREF="as_10.html#SEC147">Special Characters</A>
<LI><A NAME="TOC148" HREF="as_10.html#SEC148">Register Names</A>
</UL>
<LI><A NAME="TOC149" HREF="as_10.html#SEC149">Floating Point</A>
<LI><A NAME="TOC150" HREF="as_10.html#SEC150">AMD 29K Machine Directives</A>
<LI><A NAME="TOC151" HREF="as_10.html#SEC151">Opcodes</A>
</UL>
<LI><A NAME="TOC152" HREF="as_11.html#SEC152">ARM Dependent Features</A>
<UL>
<LI><A NAME="TOC153" HREF="as_11.html#SEC153">Options</A>
<LI><A NAME="TOC154" HREF="as_11.html#SEC154">Syntax</A>
<UL>
<LI><A NAME="TOC155" HREF="as_11.html#SEC155">Special Characters</A>
<LI><A NAME="TOC156" HREF="as_11.html#SEC156">Register Names</A>
</UL>
<LI><A NAME="TOC157" HREF="as_11.html#SEC157">Floating Point</A>
<LI><A NAME="TOC158" HREF="as_11.html#SEC158">ARM Machine Directives</A>
<LI><A NAME="TOC159" HREF="as_11.html#SEC159">Opcodes</A>
</UL>
<LI><A NAME="TOC160" HREF="as_12.html#SEC160">D10V Dependent Features</A>
<UL>
<LI><A NAME="TOC161" HREF="as_12.html#SEC161">D10V Options</A>
<LI><A NAME="TOC162" HREF="as_12.html#SEC162">Syntax</A>
<UL>
<LI><A NAME="TOC163" HREF="as_12.html#SEC163">Size Modifiers</A>
<LI><A NAME="TOC164" HREF="as_12.html#SEC164">Sub-Instructions</A>
<LI><A NAME="TOC165" HREF="as_12.html#SEC165">Special Characters</A>
<LI><A NAME="TOC166" HREF="as_12.html#SEC166">Register Names</A>
<LI><A NAME="TOC167" HREF="as_12.html#SEC167">Addressing Modes</A>
<LI><A NAME="TOC168" HREF="as_12.html#SEC168">@WORD Modifier</A>
</UL>
<LI><A NAME="TOC169" HREF="as_12.html#SEC169">Floating Point</A>
<LI><A NAME="TOC170" HREF="as_12.html#SEC170">Opcodes</A>
</UL>
<LI><A NAME="TOC171" HREF="as_13.html#SEC171">H8/300 Dependent Features</A>
<UL>
<LI><A NAME="TOC172" HREF="as_13.html#SEC172">Options</A>
<LI><A NAME="TOC173" HREF="as_13.html#SEC173">Syntax</A>
<UL>
<LI><A NAME="TOC174" HREF="as_13.html#SEC174">Special Characters</A>
<LI><A NAME="TOC175" HREF="as_13.html#SEC175">Register Names</A>
<LI><A NAME="TOC176" HREF="as_13.html#SEC176">Addressing Modes</A>
</UL>
<LI><A NAME="TOC177" HREF="as_13.html#SEC177">Floating Point</A>
<LI><A NAME="TOC178" HREF="as_13.html#SEC178">H8/300 Machine Directives</A>
<LI><A NAME="TOC179" HREF="as_13.html#SEC179">Opcodes</A>
</UL>
<LI><A NAME="TOC180" HREF="as_14.html#SEC180">H8/500 Dependent Features</A>
<UL>
<LI><A NAME="TOC181" HREF="as_14.html#SEC181">Options</A>
<LI><A NAME="TOC182" HREF="as_14.html#SEC182">Syntax</A>
<UL>
<LI><A NAME="TOC183" HREF="as_14.html#SEC183">Special Characters</A>
<LI><A NAME="TOC184" HREF="as_14.html#SEC184">Register Names</A>
<LI><A NAME="TOC185" HREF="as_14.html#SEC185">Addressing Modes</A>
</UL>
<LI><A NAME="TOC186" HREF="as_14.html#SEC186">Floating Point</A>
<LI><A NAME="TOC187" HREF="as_14.html#SEC187">H8/500 Machine Directives</A>
<LI><A NAME="TOC188" HREF="as_14.html#SEC188">Opcodes</A>
</UL>
<LI><A NAME="TOC189" HREF="as_15.html#SEC189">HPPA Dependent Features</A>
<UL>
<LI><A NAME="TOC190" HREF="as_15.html#SEC190">Notes</A>
<LI><A NAME="TOC191" HREF="as_15.html#SEC191">Options</A>
<LI><A NAME="TOC192" HREF="as_15.html#SEC192">Syntax</A>
<LI><A NAME="TOC193" HREF="as_15.html#SEC193">Floating Point</A>
<LI><A NAME="TOC194" HREF="as_15.html#SEC194">HPPA Assembler Directives</A>
<LI><A NAME="TOC195" HREF="as_15.html#SEC195">Opcodes</A>
</UL>
<LI><A NAME="TOC196" HREF="as_16.html#SEC196">80386 Dependent Features</A>
<UL>
<LI><A NAME="TOC197" HREF="as_16.html#SEC197">Options</A>
<LI><A NAME="TOC198" HREF="as_16.html#SEC198">AT&#38;T Syntax versus Intel Syntax</A>
<LI><A NAME="TOC199" HREF="as_16.html#SEC199">Opcode Naming</A>
<LI><A NAME="TOC200" HREF="as_16.html#SEC200">Register Naming</A>
<LI><A NAME="TOC201" HREF="as_16.html#SEC201">Opcode Prefixes</A>
<LI><A NAME="TOC202" HREF="as_16.html#SEC202">Memory References</A>
<LI><A NAME="TOC203" HREF="as_16.html#SEC203">Handling of Jump Instructions</A>
<LI><A NAME="TOC204" HREF="as_16.html#SEC204">Floating Point</A>
<LI><A NAME="TOC205" HREF="as_16.html#SEC205">Writing 16-bit Code</A>
<LI><A NAME="TOC206" HREF="as_16.html#SEC206">Notes</A>
</UL>
<LI><A NAME="TOC207" HREF="as_17.html#SEC207">Intel 80960 Dependent Features</A>
<UL>
<LI><A NAME="TOC208" HREF="as_17.html#SEC208">i960 Command-line Options</A>
<LI><A NAME="TOC209" HREF="as_17.html#SEC209">Floating Point</A>
<LI><A NAME="TOC210" HREF="as_17.html#SEC210">i960 Machine Directives</A>
<LI><A NAME="TOC211" HREF="as_17.html#SEC211">i960 Opcodes</A>
<UL>
<LI><A NAME="TOC212" HREF="as_17.html#SEC212"><CODE>callj</CODE></A>
<LI><A NAME="TOC213" HREF="as_17.html#SEC213">Compare-and-Branch</A>
</UL>
</UL>
<LI><A NAME="TOC214" HREF="as_18.html#SEC214">M680x0 Dependent Features</A>
<UL>
<LI><A NAME="TOC215" HREF="as_18.html#SEC215">M680x0 Options</A>
<LI><A NAME="TOC216" HREF="as_18.html#SEC216">Syntax</A>
<LI><A NAME="TOC217" HREF="as_18.html#SEC217">Motorola Syntax</A>
<LI><A NAME="TOC218" HREF="as_18.html#SEC218">Floating Point</A>
<LI><A NAME="TOC219" HREF="as_18.html#SEC219">680x0 Machine Directives</A>
<LI><A NAME="TOC220" HREF="as_18.html#SEC220">Opcodes</A>
<UL>
<LI><A NAME="TOC221" HREF="as_18.html#SEC221">Branch Improvement</A>
<LI><A NAME="TOC222" HREF="as_18.html#SEC222">Special Characters</A>
</UL>
</UL>
<LI><A NAME="TOC223" HREF="as_19.html#SEC223">MIPS Dependent Features</A>
<UL>
<LI><A NAME="TOC224" HREF="as_19.html#SEC224">Assembler options</A>
<LI><A NAME="TOC225" HREF="as_19.html#SEC225">MIPS ECOFF object code</A>
<LI><A NAME="TOC226" HREF="as_19.html#SEC226">Directives for debugging information</A>
<LI><A NAME="TOC227" HREF="as_19.html#SEC227">Directives to override the ISA level</A>
<LI><A NAME="TOC228" HREF="as_19.html#SEC228">Directives for extending MIPS 16 bit instructions</A>
<LI><A NAME="TOC229" HREF="as_19.html#SEC229">Directive to mark data as an instruction</A>
<LI><A NAME="TOC230" HREF="as_19.html#SEC230">Directives to save and restore options</A>
</UL>
<LI><A NAME="TOC231" HREF="as_20.html#SEC231">Hitachi SH Dependent Features</A>
<UL>
<LI><A NAME="TOC232" HREF="as_20.html#SEC232">Options</A>
<LI><A NAME="TOC233" HREF="as_20.html#SEC233">Syntax</A>
<UL>
<LI><A NAME="TOC234" HREF="as_20.html#SEC234">Special Characters</A>
<LI><A NAME="TOC235" HREF="as_20.html#SEC235">Register Names</A>
<LI><A NAME="TOC236" HREF="as_20.html#SEC236">Addressing Modes</A>
</UL>
<LI><A NAME="TOC237" HREF="as_20.html#SEC237">Floating Point</A>
<LI><A NAME="TOC238" HREF="as_20.html#SEC238">SH Machine Directives</A>
<LI><A NAME="TOC239" HREF="as_20.html#SEC239">Opcodes</A>
</UL>
<LI><A NAME="TOC240" HREF="as_21.html#SEC240">SPARC Dependent Features</A>
<UL>
<LI><A NAME="TOC241" HREF="as_21.html#SEC241">Options</A>
<LI><A NAME="TOC242" HREF="as_21.html#SEC242">Enforcing aligned data</A>
<LI><A NAME="TOC243" HREF="as_21.html#SEC243">Floating Point</A>
<LI><A NAME="TOC244" HREF="as_21.html#SEC244">Sparc Machine Directives</A>
</UL>
<LI><A NAME="TOC245" HREF="as_22.html#SEC245">Z8000 Dependent Features</A>
<UL>
<LI><A NAME="TOC246" HREF="as_22.html#SEC246">Options</A>
<LI><A NAME="TOC247" HREF="as_22.html#SEC247">Syntax</A>
<UL>
<LI><A NAME="TOC248" HREF="as_22.html#SEC248">Special Characters</A>
<LI><A NAME="TOC249" HREF="as_22.html#SEC249">Register Names</A>
<LI><A NAME="TOC250" HREF="as_22.html#SEC250">Addressing Modes</A>
</UL>
<LI><A NAME="TOC251" HREF="as_22.html#SEC251">Assembler Directives for the Z8000</A>
<LI><A NAME="TOC252" HREF="as_22.html#SEC252">Opcodes</A>
</UL>
<LI><A NAME="TOC253" HREF="as_23.html#SEC253">VAX Dependent Features</A>
<UL>
<LI><A NAME="TOC254" HREF="as_23.html#SEC254">VAX Command-Line Options</A>
<LI><A NAME="TOC255" HREF="as_23.html#SEC255">VAX Floating Point</A>
<LI><A NAME="TOC256" HREF="as_23.html#SEC256">Vax Machine Directives</A>
<LI><A NAME="TOC257" HREF="as_23.html#SEC257">VAX Opcodes</A>
<LI><A NAME="TOC258" HREF="as_23.html#SEC258">VAX Branch Improvement</A>
<LI><A NAME="TOC259" HREF="as_23.html#SEC259">VAX Operands</A>
<LI><A NAME="TOC260" HREF="as_23.html#SEC260">Not Supported on VAX</A>
</UL>
<LI><A NAME="TOC261" HREF="as_24.html#SEC261">v850 Dependent Features</A>
<UL>
<LI><A NAME="TOC262" HREF="as_24.html#SEC262">Options</A>
<LI><A NAME="TOC263" HREF="as_24.html#SEC263">Syntax</A>
<UL>
<LI><A NAME="TOC264" HREF="as_24.html#SEC264">Special Characters</A>
<LI><A NAME="TOC265" HREF="as_24.html#SEC265">Register Names</A>
</UL>
<LI><A NAME="TOC266" HREF="as_24.html#SEC266">Floating Point</A>
<LI><A NAME="TOC267" HREF="as_24.html#SEC267">V850 Machine Directives</A>
<LI><A NAME="TOC268" HREF="as_24.html#SEC268">Opcodes</A>
</UL>
<LI><A NAME="TOC269" HREF="as_25.html#SEC269">Reporting Bugs</A>
<UL>
<LI><A NAME="TOC270" HREF="as_25.html#SEC270">Have you found a bug?</A>
<LI><A NAME="TOC271" HREF="as_25.html#SEC271">How to report bugs</A>
</UL>
<LI><A NAME="TOC272" HREF="as_26.html#SEC272">Acknowledgements</A>
<LI><A NAME="TOC273" HREF="as_27.html#SEC273">Index</A>
</UL>
<P><HR><P>
This document was generated on 24 April 1999 using the
<A HREF="http://wwwinfo.cern.ch/dis/texi2html/">texi2html</A>
translator version 1.52.</P>
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