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<HTML>
<HEAD>
<!-- This HTML file has been created by texi2html 1.52
from ../texi/ld.texinfo on 7 November 1998 -->
<TITLE>Using LD, the GNU linker - Machine Dependent Features</TITLE>
</HEAD>
<BODY>
Go to the <A HREF="ld_1.html">first</A>, <A HREF="ld_3.html">previous</A>, <A HREF="ld_5.html">next</A>, <A HREF="ld_8.html">last</A> section, <A HREF="ld_toc.html">table of contents</A>.
<P><HR><P>
<H1><A NAME="SEC27" HREF="ld_toc.html#TOC27">Machine Dependent Features</A></H1>
<P>
<A NAME="IDX359"></A>
<CODE>ld</CODE> has additional features on some platforms; the following
sections describe them. Machines where <CODE>ld</CODE> has no additional
functionality are not listed.
</P>
<H2><A NAME="SEC28" HREF="ld_toc.html#TOC28"><CODE>ld</CODE> and the H8/300</A></H2>
<P>
<A NAME="IDX360"></A>
For the H8/300, <CODE>ld</CODE> can perform these global optimizations when
you specify the <SAMP>`--relax'</SAMP> command-line option.
</P>
<DL COMPACT>
<DT><EM>relaxing address modes</EM>
<DD>
<A NAME="IDX361"></A>
<CODE>ld</CODE> finds all <CODE>jsr</CODE> and <CODE>jmp</CODE> instructions whose
targets are within eight bits, and turns them into eight-bit
program-counter relative <CODE>bsr</CODE> and <CODE>bra</CODE> instructions,
respectively.
<A NAME="IDX362"></A>
<DT><EM>synthesizing instructions</EM>
<DD>
<CODE>ld</CODE> finds all <CODE>mov.b</CODE> instructions which use the
sixteen-bit absolute address form, but refer to the top
page of memory, and changes them to use the eight-bit address form.
(That is: the linker turns <SAMP>`mov.b <CODE>@</CODE><VAR>aa</VAR>:16'</SAMP> into
<SAMP>`mov.b <CODE>@</CODE><VAR>aa</VAR>:8'</SAMP> whenever the address <VAR>aa</VAR> is in the
top page of memory).
</DL>
<H2><A NAME="SEC29" HREF="ld_toc.html#TOC29"><CODE>ld</CODE> and the Intel 960 family</A></H2>
<P>
<A NAME="IDX363"></A>
</P>
<P>
You can use the <SAMP>`-A<VAR>architecture</VAR>'</SAMP> command line option to
specify one of the two-letter names identifying members of the 960
family; the option specifies the desired output target, and warns of any
incompatible instructions in the input files. It also modifies the
linker's search strategy for archive libraries, to support the use of
libraries specific to each particular architecture, by including in the
search loop names suffixed with the string identifying the architecture.
</P>
<P>
For example, if your <CODE>ld</CODE> command line included <SAMP>`-ACA'</SAMP> as
well as <SAMP>`-ltry'</SAMP>, the linker would look (in its built-in search
paths, and in any paths you specify with <SAMP>`-L'</SAMP>) for a library with
the names
</P>
<PRE>
try
libtry.a
tryca
libtryca.a
</PRE>
<P>
The first two possibilities would be considered in any event; the last
two are due to the use of <SAMP>`-ACA'</SAMP>.
</P>
<P>
You can meaningfully use <SAMP>`-A'</SAMP> more than once on a command line, since
the 960 architecture family allows combination of target architectures; each
use will add another pair of name variants to search for when <SAMP>`-l'</SAMP>
specifies a library.
</P>
<P>
<A NAME="IDX364"></A>
<A NAME="IDX365"></A>
<CODE>ld</CODE> supports the <SAMP>`--relax'</SAMP> option for the i960 family. If
you specify <SAMP>`--relax'</SAMP>, <CODE>ld</CODE> finds all <CODE>balx</CODE> and
<CODE>calx</CODE> instructions whose targets are within 24 bits, and turns
them into 24-bit program-counter relative <CODE>bal</CODE> and <CODE>cal</CODE>
instructions, respectively. <CODE>ld</CODE> also turns <CODE>cal</CODE>
instructions into <CODE>bal</CODE> instructions when it determines that the
target subroutine is a leaf routine (that is, the target subroutine does
not itself call any subroutines).
</P>
<P><HR><P>
Go to the <A HREF="ld_1.html">first</A>, <A HREF="ld_3.html">previous</A>, <A HREF="ld_5.html">next</A>, <A HREF="ld_8.html">last</A> section, <A HREF="ld_toc.html">table of contents</A>.
</BODY>
</HTML>