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<html><!DOCTYPE HTML PUBLIC "-//IETF//DTD HTML 2.0//EN">
<html>
<head>
<title>80386 Programmer's Reference Manual -- Opcode LODS</title>
</head>
<body>
<b>up:</b> <a href="C17.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/C17.HTM">Chapter 17 -- 80386 Instruction Set</a><br>
<b>prev:</b><a href="LOCK.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/LOCK.HTM"> LOCK Assert LOCK# Signal Prefix</a><br>
<b>next:</b><a href="LOOP.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/LOOP.HTM"> LOOP/LOOPcond Loop Control with CX Counter</a>
<p>
<hr>
<p>
<h1>LODS/LODSB/LODSW/LODSD -- Load String Operand</h1>
<pre>
Opcode Instruction Clocks Description
AC LODS m8 5 Load byte [(E)SI] into AL
AD LODS m16 5 Load word [(E)SI] into AX
AD LODS m32 5 Load dword [(E)SI] into EAX
AC LODSB 5 Load byte DS:[(E)SI] into AL
AD LODSW 5 Load word DS:[(E)SI] into AX
AD LODSD 5 Load dword DS:[(E)SI] into EAX
</pre>
<h2>Operation</h2>
<pre>
IF AddressSize = 16
THEN use SI for source-index
ELSE (* AddressSize = 32 *)
use ESI for source-index;
FI;
IF byte type of instruction
THEN
AL := [source-index]; (* byte load *)
IF DF = 0 THEN IncDec := 1 ELSE IncDec := -1; FI;
ELSE
IF OperandSize = 16
THEN
AX := [source-index]; (* word load *)
IF DF = 0 THEN IncDec := 2 ELSE IncDec := -2; FI;
ELSE (* OperandSize = 32 *)
EAX := [source-index]; (* dword load *)
IF DF = 0 THEN IncDec := 4 ELSE IncDec := -4; FI;
FI;
FI;
source-index := source-index + IncDec
</pre>
<h2>Description</h2>
LODS loads the AL, AX, or EAX register with the memory byte, word, or doubleword at the location pointed to by the source-index register. After the transfer is made, the source-index register is automatically advanced. If the direction flag is 0 (<a href="CLD.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/CLD.HTM">CLD</a> was executed), the source index increments; if the direction flag is 1 (<a href="STD.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/STD.HTM">STD</a> was executed), it decrements. The increment or decrement is 1 if a byte is loaded, 2 if a word is loaded, or 4 if a doubleword is loaded.
<p>If the address-size attribute for this instruction is 16 bits, SI is used for the source-index register; otherwise the address-size attribute is 32 bits, and the ESI register is used. The address of the source data is determined solely by the contents of ESI/SI. Load the correct index value into SI before executing the LODS instruction. LODSB, LODSW, LODSD are synonyms for the byte, word, and doubleword LODS instructions.
<p>LODS can be preceded by the <a href="REP.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/REP.HTM">REP</a> prefix; however, LODS is used more typically within a <a href="LOOP.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/LOOP.HTM">LOOP</a> construct, because further processing of the data moved into EAX, AX, or AL is usually necessary.
<h2>Flags Affected</h2>
None
<h2>Protected Mode Exceptions</h2>
#GP(0) for an illegal memory operand effective address in the CS, DS, ES, FS, or GS segments; #SS(0) for an illegal address in the SS segment; #PF(fault-code) for a page fault
<h2>Real Address Mode Exceptions</h2>
Interrupt 13 if any part of the operand would lie outside of the effective address space from 0 to 0FFFFH
<h2>Virtual 8086 Mode Exceptions</h2>
Same exceptions as in Real Address Mode; #PF(fault-code) for a page fault
<p>
<hr>
<p><b>up:</b> <a href="C17.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/C17.HTM">Chapter 17 -- 80386 Instruction Set</a><br>
<b>prev:</b><a href="LOCK.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/LOCK.HTM"> LOCK Assert LOCK# Signal Prefix</a><br>
<b>next:</b><a href="LOOP.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/LOOP.HTM"> LOOP/LOOPcond Loop Control with CX Counter</a>
</body>