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study/Ref-docs/manual Intel386/I386Manual/S10_01.HTM Normal file
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<html><!DOCTYPE HTML PUBLIC "-//IETF//DTD HTML 2.0//EN">
<html>
<head>
<title>80386 Programmer's Reference Manual -- Section 10.1</title>
</head>
<body>
<b>up:</b> <a href="C10.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/C10.HTM">Chapter 10 -- Initialization</a><br>
<b>prev:</b> <a href="C10.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/C10.HTM">Chapter 10 -- Initialization</a><br>
<b>next:</b> <a href="S10_02.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/S10_02.HTM">10.2 Software Initialization for Real-Address Mode</a>
<p>
<hr>
<p>
<h1>10.1 Processor State After Reset</h1>
The contents of EAX depend upon the results of the power-up self test. The self-test may be requested externally by assertion of BUSY# at the end of RESET. The EAX register holds zero if the 80386 passed the test. A nonzero value in EAX after self-test indicates that the particular 80386 unit is faulty. If the self-test is not requested, the contents of EAX after RESET is undefined.
<p>DX holds a component identifier and revision number after RESET as <a href="#fig10-1">Figure 10-1</a> illustrates. DH contains 3, which indicates an 80386 component. DL contains a unique identifier of the revision level.
<p>Control register zero (CR0) contains the values shown in <a href="#fig10-2">Figure 10-2</a> . The ET bit of CR0 is set if an 80387 is present in the configuration (according to the state of the ERROR# pin after RESET). If ET is reset, the configuration either contains an 80287 or does not contain a coprocessor. A software test is required to distinguish between these latter two possibilities.
<p>The remaining registers and flags are set as follows:
<pre>
EFLAGS =00000002H
IP =0000FFF0H
CS selector =000H
DS selector =0000H
ES selector =0000H
SS selector =0000H
FS selector =0000H
GS selector =0000H
IDTR:
base =0
limit =03FFH
</pre>
All registers not mentioned above are undefined.
<p>These settings imply that the processor begins in real-address mode with interrupts disabled.
<p><a name="fig10-1"><img align="center" src="FIG10-1.GIF" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/FIG10-1.GIF" border="0">
<hr>
<a name="fig10-2"><img align="center" src="FIG10-2.GIF" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/FIG10-2.GIF" border="0">
<p>
<hr>
<p><b>up:</b> <a href="C10.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/C10.HTM">Chapter 10 -- Initialization</a><br>
<b>prev:</b> <a href="C10.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/C10.HTM">Chapter 10 -- Initialization</a><br>
<b>next:</b> <a href="S10_02.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/S10_02.HTM">10.2 Software Initialization for Real-Address Mode</a>
</body>