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study/Ref-docs/manual Intel386/I386Manual/S16_02.HTM
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study/Ref-docs/manual Intel386/I386Manual/S16_02.HTM
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<html><!DOCTYPE HTML PUBLIC "-//IETF//DTD HTML 2.0//EN">
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<html>
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<head>
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<title>80386 Programmer's Reference Manual -- Section 16.2</title>
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<body>
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<b>up:</b> <a href="C16.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/C16.HTM">Chapter 16 -- Mixing 16-Bit and 32 Bit Code</a><br>
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<b>prev:</b> <a href="S16_01.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/S16_01.HTM">16.1 How the 80386 Implements 16-Bit and 32-Bit Features</a><br>
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<b>next:</b> <a href="S16_03.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/S16_03.HTM">16.3 Sharing Data Segments Among Mixed Code Segments</a>
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<p>
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<hr>
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<p>
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<h1>16.2 Mixing 32-Bit and 16-Bit Operations</h1>
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The 80386 has two instruction prefixes that allow mixing of 32-bit and 16-bit operations within one segment:
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<ul>
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<li>The operand-size prefix (66H)
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<li>The address-size prefix (67H)
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</ul>
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<p>These prefixes reverse the default size selected by the D-bit. For example, the processor can interpret the word-move instruction <a href="MOV.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/MOV.HTM">MOV</a> mem, reg in any of four ways:
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<ul>
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<li>In a USE32 segment:
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<ol>
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<li>Normally moves 32 bits from a 32-bit register to a 32-bit effective address in memory.
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<li>If preceded by an operand-size prefix, moves 16 bits from a 16-bit register to 32-bit effective address in memory.
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<li>If preceded by an address-size prefix, moves 32 bits from a 32-bit register to a16-bit effective address in memory.
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<li>If preceded by both an address-size prefix and an operand-size prefix, moves 16 bits from a 16-bit register to a 16-bit effective address in memory.
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</ol>
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<li>In a USE16 segment:
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<ol>
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<li>Normally moves 16 bits from a 16-bit register to a 16-bit effective address in memory.
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<li>If preceded by an operand-size prefix, moves 32 bits from a 32-bit register to 16-bit effective address in memory.
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<li>If preceded by an address-size prefix, moves 16 bits from a 16-bit register to a32-bit effective address in memory.
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<li>If preceded by both an address-size prefix and an operand-size prefix, moves 32 bits from a 32-bit register to a 32-bit effective address in memory.
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</ol>
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</ul>
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These examples illustrate that any instruction can generate any combination of operand size and address size regardless of whether the instruction is in a USE16 or USE32 segment. The choice of the USE16 or USE32 attribute for a code segment is based upon these criteria:
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<ol>
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<li>The need to address instructions or data in segments that are larger than 64 Kilobytes.
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<li>The predominant size of operands.
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<li>The addressing modes desired. (Refer to <a href="C17.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/C17.HTM">Chapter 17</a> for an explanation of the additional addressing modes that are available when 32-bit addressing is used.)
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</ol>
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Choosing a setting of the D-bit that is contrary to the predominant size of operands requires the generation of an excessive number of operand-size prefixes.
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<p>
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<hr>
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<p><b>up:</b> <a href="C16.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/C16.HTM">Chapter 16 -- Mixing 16-Bit and 32 Bit Code</a><br>
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<b>prev:</b> <a href="S16_01.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/S16_01.HTM">16.1 How the 80386 Implements 16-Bit and 32-Bit Features</a><br>
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<b>next:</b> <a href="S16_03.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/S16_03.HTM">16.3 Sharing Data Segments Among Mixed Code Segments</a>
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</body>
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