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<html><!DOCTYPE HTML PUBLIC "-//IETF//DTD HTML 2.0//EN">
<html>
<head>
<title>80386 Programmer's Reference Manual -- Opcode XLAT</title>
</head>
<body>
<b>up:</b> <a href="C17.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/C17.HTM">Chapter 17 -- 80386 Instruction Set</a><br>
<b>prev:</b><a href="XCHG.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/XCHG.HTM"> XCHG Exchange Register/Memory with Register</a><br>
<b>next:</b><a href="XOR.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/XOR.HTM"> XOR Logical Exclusive OR</a>
<p>
<hr>
<p>
<h1>XLAT/XLATB -- Table Look-up Translation</h1>
<pre>
D7 XLAT m8 5 Set AL to memory byte DS:[(E)BX + unsigned AL]
D7 XLATB 5 Set AL to memory byte DS:[(E)BX + unsigned AL]
</pre>
<h2>Operation</h2>
<pre>
IF AddressSize = 16
THEN
AL := (BX + ZeroExtend(AL))
ELSE (* AddressSize = 32 *)
AL := (EBX + ZeroExtend(AL));
FI;
</pre>
<h2>Description</h2>
XLAT changes the AL register from the table index to the table entry. AL should be the unsigned index into a table addressed by DS:BX (for an address-size attribute of 16 bits) or DS:EBX (for an address-size attribute of 32 bits).
<p>The operand to XLAT allows for the possibility of a segment override. XLAT uses the contents of BX even if they differ from the offset of the operand. The offset of the operand should have been moved intoBX/EBX with a previous instruction.
<p>The no-operand form, XLATB, can be used if the BX/EBX table will always reside in the DS segment.
<h2>Flags Affected</h2>
None
<h2>Protected Mode Exceptions</h2>
#GP(0) for an illegal memory operand effective address in the CS, DS, ES, FS, or GS segments; #SS(0) for an illegal address in the SS segment; #PF(fault-code) for a page fault
<h2>Real Address Mode Exceptions</h2>
Interrupt 13 if any part of the operand would lie outside of the effective address space from 0 to 0FFFFH
<h2>Virtual 8086 Mode Exceptions</h2>
Same exceptions as in Real Address Mode; #PF(fault-code) for a page fault
<p>
<hr>
<p><b>up:</b> <a href="C17.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/C17.HTM">Chapter 17 -- 80386 Instruction Set</a><br>
<b>prev:</b><a href="XCHG.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/XCHG.HTM"> XCHG Exchange Register/Memory with Register</a><br>
<b>next:</b><a href="XOR.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/XOR.HTM"> XOR Logical Exclusive OR</a>
</body>