The ATI driver is "experimental" at this stage. The information in this file has been taken from comments in x386/vga256/drivers/ati/driver.c Also refer to the program ati.test.c in /usr/X386/lib/X11/etc. For further details, contact Rik Faith . * This is the X11R5 x386 driver for ATI VGA WONDER video adapters. At * present, this drive works best with ATI VGA WONDER PLUS and ATI VGA * WONDER XL cards with the ATI18810 dot clock and the ATI28800-5 chip. * ATI VGA WONDER cards with other chips revisions may not function as * desired. * I've come to believe the people who design these cards couldn't * allow for future enhancements if their life depended on it! * The register set architecture is a joke! * NOTES: * * 1) The ATI 18800/28800 use a special registers for their extended * features. There is one index and one data register. Under MS-DOS this * should be specified by reading C000:10. But since we cannot read this * now, let's use the same fixed address as our unix kernel does: * 0x1CE/0x1CF. I also got these ports form a second source, thus it seems * to be safe to use them. * * This comment is no longer valid. We read C000:10. * * 2) The ATI 18800/28800 extended registers differ in their i/o behaviour * from the normal ones: * * write: outw(0x1CE, (data << 8) | index); * read: outb(0x1CE, index); data = inb(0x1CF); * * Two consecutive byte-writes are NOT allowed. Furthermore is a index * written to 0x1CE only usable ONCE !!! * * More notes by dje ... * * 3) I've tried to allow for a future when this code drives all VGA Wonder * cards. To do this I had decide what to do with the clock values. Boards * prior to V5 use 4 crystals. Boards V5 and later use a clock generator * chip. Just to complicate things a bit, V3 and V4 boards aren't * compatible when it comes to choosing clock frequencies. :-( * * V3/V4 Board Clock Frequencies * R E G I S T E R S * 1CE(*) 3C2 3C2 Frequency * B2h/BEh * Bit 6/4 Bit 3 Bit 2 * --------- ------- ------- --------- * 0 0 0 50.175 * 0 0 1 56.644 * 0 1 0 Spare 1 * 0 1 1 44.900 * 1 0 0 44.900 * 1 0 1 50.175 * 1 1 0 Spare 2 * 1 1 1 36.000 * * (*): V3 uses Index B2h, bit 6; V4 uses Index BEh, bit 4. * * V5,Plus,XL Board Clock Frequencies * R E G I S T E R S * 1CE 1CE 3C2 3C2 Frequency * BEh B9h * Bit 4 Bit 1 Bit 3 Bit 2 * ------- ------- ------- ------- --------- * 1 0 0 0 42.954 * 1 0 0 1 48.771 * 1 0 1 0 External 0 (16.657) * 1 0 1 1 36.000 * 1 1 0 0 50.350 * 1 1 0 1 56.640 * 1 1 1 0 External 1 (28.322) * 1 1 1 1 44.900 * 0 0 0 0 30.240 * 0 0 0 1 32.000 * 0 0 1 0 37.500 * 0 0 1 1 39.000 * 0 1 0 0 40.000 * 0 1 0 1 56.644 * 0 1 1 0 75.000 * 0 1 1 1 65.000 * * For all of the above (V3,V4,V5,Plus,XL), these frequencies can be * divided by 1, 2, 3, or 4: * * Reg 1CE, Index B8h * Bit 7 Bit 6 * 0 0 Divide by 1 * 0 1 Divide by 2 * 1 0 Divide by 3 * 1 1 Divide by 4 * * What I've done is the following. The clock values specified in Xconfig * shall be: * * 18 22 25 28 36 44 50 56 * 30 32 37 39 40 0 75 65 (duplicate 56: --> 0) * * The first row is usable on all VGA Wonder cards. The second row is * only usable on V5,Plus,XL cards. The code in ATIInit() will map these * clock values into the appropriate bit settings for each of the cards. * Some of these clock choices aren't really usable, think of these as * place holders. * * 4) The ATI Programmer's Reference Manual lacked enough prose to explain * what the various bits of all of the various registers do. It is * entirely reasonable to believe some of the choices I've made are * imperfect because I didn't understand what I was doing. * * 5) V3 board support needs a lot of work. I suspect it isn't worth it.