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<title>80386 Programmer's Reference Manual -- Opcode LEA</title>
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<b>up:</b> <a href="C17.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/C17.HTM">Chapter 17 -- 80386 Instruction Set</a><br>
<b>prev:</b><a href="LAR.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/LAR.HTM"> LAR Load Access Rights Byte</a><br>
<b>next:</b><a href="LEAVE.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/LEAVE.HTM"> LEAVE High Level Procedure Exit</a>
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<hr>
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<h1>LEA -- Load Effective Address</h1>
<pre>
Opcode Instruction Clocks Description
8D /r LEA r16,m 2 Store effective address for m in register r16
8D /r LEA r32,m 2 Store effective address for m in register r32
8D /r LEA r16,m 2 Store effective address for m in register r16
8D /r LEA r32,m 2 Store effective address for m in register r32
</pre>
<h2>Operation</h2>
<pre>
IF OperandSize = 16 AND AddressSize = 16
THEN r16 := Addr(m);
ELSE
IF OperandSize = 16 AND AddressSize = 32
THEN
r16 := Truncate_to_16bits(Addr(m)); (* 32-bit address *)
ELSE
IF OperandSize = 32 AND AddressSize = 16
THEN
r32 := Truncate_to_16bits(Addr(m));
ELSE
IF OperandSize = 32 AND AddressSize = 32
THEN r32 := Addr(m);
FI;
FI;
FI;
FI;
</pre>
<h2>Description</h2>
LEA calculates the effective address (offset part) and stores it in the specified register. The operand-size attribute of the instruction (represented by OperandSize in the algorithm under &quot;Operation&quot; above) is determined by the chosen register. The address-size attribute (represented by AddressSize) is determined by the USE attribute of the segment containing the second operand. The address-size and operand-size attributes affect the action performed by LEA, as follows:
<pre>
Operand Size Address Size Action Performed
16 16 16-bit effective address is calculated and
stored in requested 16-bit register
destination.
16 32 32-bit effective address is calculated. The
lower 16 bits of the address are stored in
the requested 16-bit register destination.
32 16 16-bit effective address is calculated. The
16-bit address is zero-extended and stored
in the requested 32-bit register destination.
32 32 32-bit effective address is calculated and
stored in the requested 32-bit register
destination.
</pre>
<h2>Flags Affected</h2>
None
<h2>Protected Mode Exceptions</h2>
#UD if the second operand is a register
<h2>Real Address Mode Exceptions</h2>
Interrupt 6 if the second operand is a register
<h2>Virtual 8086 Mode Exceptions</h2>
Same exceptions as in Real Address Mode
<p>
<hr>
<p><b>up:</b> <a href="C17.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/C17.HTM">Chapter 17 -- 80386 Instruction Set</a><br>
<b>prev:</b><a href="LAR.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/LAR.HTM"> LAR Load Access Rights Byte</a><br>
<b>next:</b><a href="LEAVE.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/LEAVE.HTM"> LEAVE High Level Procedure Exit</a>
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