58 lines
2.7 KiB
HTML
58 lines
2.7 KiB
HTML
<html><!DOCTYPE HTML PUBLIC "-//IETF//DTD HTML 2.0//EN">
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<html>
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<head>
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<title>80386 Programmer's Reference Manual -- Opcode TEST</title>
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</head>
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<body>
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<b>up:</b> <a href="C17.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/C17.HTM">Chapter 17 -- 80386 Instruction Set</a><br>
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<b>prev:</b><a href="SUB.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/SUB.HTM"> SUB Integer Subtraction</a><br>
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<b>next:</b><a href="VERR.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/VERR.HTM"> VERR Verify a Segment for Reading or Writing</a>
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<p>
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<hr>
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<p>
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<h1>TEST -- Logical Compare</h1>
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<pre>
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Opcode Instruction Clocks Description
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A8 ib TEST AL,imm8 2 AND immediate byte with AL
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A9 iw TEST AX,imm16 2 AND immediate word with AX
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A9 id TEST EAX,imm32 2 AND immediate dword with EAX
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F6 /0 ib TEST r/m8,imm8 2/5 AND immediate byte with r/m byte
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F7 /0 iw TEST r/m16,imm16 2/5 AND immediate word with r/m word
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F7 /0 id TEST r/m32,imm32 2/5 AND immediate dword with r/m dword
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84 /r TEST r/m8,r8 2/5 AND byte register with r/m byte
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85 /r TEST r/m16,r16 2/5 AND word register with r/m word
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85 /r TEST r/m32,r32 2/5 AND dword register with r/m dword
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</pre>
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<h2>Operation</h2>
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<pre>
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DEST := LeftSRC AND RightSRC;
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CF := 0;
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OF := 0;
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</pre>
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<h2>Description</h2>
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TEST computes the bit-wise logical AND of its two operands. Each bit of the result is 1 if both of the corresponding bits of the operands are 1; otherwise, each bit is 0. The result of the operation is discarded and only the flags are modified.
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<h2>Flags Affected</h2>
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OF := 0, CF := 0; SF, ZF, and PF as described in <a href="APPC.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/APPC.HTM">Appendix C</a>
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<h2>Protected Mode Exceptions</h2>
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#GP(0) for an illegal memory operand effective address in the CS, DS, ES, FS, or GS segments; #SS(0) for an illegal address in the SS segment; #PF(fault-code) for a page fault
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<h2>Real Address Mode Exceptions</h2>
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Interrupt 13 if any part of the operand would lie outside of the effective address space from 0 to 0FFFFH
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<h2>Virtual 8086 Mode Exceptions</h2>
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Same exceptions as in Real Address Mode; #PF(fault-code) for a page fault
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<p>
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<hr>
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<p><b>up:</b> <a href="C17.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/C17.HTM">Chapter 17 -- 80386 Instruction Set</a><br>
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<b>prev:</b><a href="SUB.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/SUB.HTM"> SUB Integer Subtraction</a><br>
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<b>next:</b><a href="VERR.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/VERR.HTM"> VERR Verify a Segment for Reading or Writing</a>
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</body>
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