69 lines
3.3 KiB
HTML
69 lines
3.3 KiB
HTML
<html><!DOCTYPE HTML PUBLIC "-//IETF//DTD HTML 2.0//EN">
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<html>
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<head>
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<title>80386 Programmer's Reference Manual -- Opcode AAA</title>
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</head>
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<body>
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<b>up:</b> <a href="C17.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/C17.HTM">Chapter 17 -- 80386 Instruction Set</a><br>
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<b>prev:</b><a href="XLAT.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/XLAT.HTM"> XLAT/XLATB Table Look-up Translation</a>
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<p>
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<hr>
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<p>
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<h1>XOR -- Logical Exclusive OR</h1>
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<pre>
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Opcode Instruction Clocks Description
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34 ib XOR AL,imm8 2 Exclusive-OR immediate byte to AL
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35 iw XOR AX,imm16 2 Exclusive-OR immediate word to AX
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35 id XOR EAX,imm32 2 Exclusive-OR immediate dword to EAX
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80 /6 ib XOR r/m8,imm8 2/7 Exclusive-OR immediate byte to r/m
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byte
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81 /6 iw XOR r/m16,imm16 2/7 Exclusive-OR immediate word to r/m
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word
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81 /6 id XOR r/m32,imm32 2/7 Exclusive-OR immediate dword to r/m
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dword
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83 /6 ib XOR r/m16,imm8 2/7 XOR sign-extended immediate byte
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with r/m word
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83 /6 ib XOR r/m32,imm8 2/7 XOR sign-extended immediate byte
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with r/m dword
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30 /r XOR r/m8,r8 2/6 Exclusive-OR byte register to r/m
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byte
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31 /r XOR r/m16,r16 2/6 Exclusive-OR word register to r/m
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word
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31 /r XOR r/m32,r32 2/6 Exclusive-OR dword register to r/m
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dword
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32 /r XOR r8,r/m8 2/7 Exclusive-OR byte register to r/m
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byte
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33 /r XOR r16,r/m16 2/7 Exclusive-OR word register to r/m
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word
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33 /r XOR r32,r/m32 2/7 Exclusive-OR dword register to r/m
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dword
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</pre>
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<h2>Operation</h2>
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<pre>
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DEST := LeftSRC XOR RightSRC
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CF := 0
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OF := 0
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</pre>
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<h2>Description</h2>
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XOR computes the exclusive OR of the two operands. Each bit of the result is 1 if the corresponding bits of the operands are different; each bit is 0 if the corresponding bits are the same. The answer replaces the first operand.
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<h2>Flags Affected</h2>
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CF := 0, OF := 0; SF, ZF, and PF as described in <a href="APPC.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/APPC.HTM">Appendix C</a>; AF is undefined
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<h2>Protected Mode Exceptions</h2>
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#GP(0) if the result is in a nonwritable segment; #GP(0) for an illegal memory operand effective address in the CS, DS, ES, FS, or GS segments; #SS(0) for an illegal address in the SS segment; #PF(fault-code) for a page fault
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<h2>Real Address Mode Exceptions</h2>
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Interrupt 13 if any part of the operand would lie outside of the effective address space from 0 to 0FFFFH
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<h2>Virtual 8086 Mode Exceptions</h2>
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Same exceptions as in Real Address Mode; #PF(fault-code) for a page fault
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<p>
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<hr>
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<p><b>up:</b> <a href="C17.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/C17.HTM">Chapter 17 -- 80386 Instruction Set</a><br>
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<b>prev:</b><a href="XLAT.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/XLAT.HTM"> XLAT/XLATB Table Look-up Translation</a> |