76 lines
4.6 KiB
HTML
76 lines
4.6 KiB
HTML
<html><!DOCTYPE HTML PUBLIC "-//IETF//DTD HTML 2.0//EN">
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<html>
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<head>
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<title>80386 Programmer's Reference Manual -- Opcode SCAS</title>
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</head>
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<body>
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<b>up:</b> <a href="C17.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/C17.HTM">Chapter 17 -- 80386 Instruction Set</a><br>
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<b>prev:</b><a href="SBB.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/SBB.HTM"> SBB Integer Subtraction with Borrow</a><br>
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<b>next:</b><a href="SETCC.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/SETCC.HTM"> SETcc Byte Set on Condition</a>
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<p>
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<hr>
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<p>
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<h1>SCAS/SCASB/SCASW/SCASD -- Compare String Data</h1>
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<pre>
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Opcode Instruction Clocks Description
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AE SCAS m8 7 Compare bytes AL-ES:[DI], update (E)DI
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AF SCAS m16 7 Compare words AX-ES:[DI], update (E)DI
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AF SCAS m32 7 Compare dwords EAX-ES:[DI], update (E)DI
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AE SCASB 7 Compare bytes AL-ES:[DI], update (E)DI
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AF SCASW 7 Compare words AX-ES:[DI], update (E)DI
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AF SCASD 7 Compare dwords EAX-ES:[DI], update (E)DI
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</pre>
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<h2>Operation</h2>
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<pre>
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IF AddressSize = 16
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THEN use DI for dest-index;
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ELSE (* AddressSize = 32 *) use EDI for dest-index;
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FI;
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IF byte type of instruction
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THEN
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AL - [dest-index]; (* Compare byte in AL and dest *)
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IF DF = 0 THEN IndDec := 1 ELSE IncDec := -1; FI;
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ELSE
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IF OperandSize = 16
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THEN
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AX - [dest-index]; (* compare word in AL and dest *)
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IF DF = 0 THEN IncDec := 2 ELSE IncDec := -2; FI;
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ELSE (* OperandSize = 32 *)
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EAX - [dest-index];(* compare dword in EAX & dest *)
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IF DF = 0 THEN IncDec := 4 ELSE IncDec := -4; FI;
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FI;
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FI;
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dest-index := dest-index + IncDec
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</pre>
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<h2>Description</h2>
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SCAS subtracts the memory byte or word at the destination register from the AL, AX or EAX register. The result is discarded; only the flags are set. The operand must be addressable from the ES segment; no segment override is possible.
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<p>If the address-size attribute for this instruction is 16 bits, DI is used as the destination register; otherwise, the address-size attribute is 32 bits and EDI is used.
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<p>The address of the memory data being compared is determined solely by the contents of the destination register, not by the operand to SCAS. The operand validates ES segment addressability and determines the data type. Load the correct index value into DI or EDI before executing SCAS.
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<p>After the comparison is made, the destination register is automatically updated. If the direction flag is 0 (<a href="CLD.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/CLD.HTM">CLD</a> was executed), the destination register is incremented; if the direction flag is 1 (<a href="STD.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/STD.HTM">STD</a> was executed), it is decremented. The increments or decrements are by 1 if bytes are compared, by 2 if words are compared, or by 4 if doublewords are compared.
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<p>SCASB, SCASW, and SCASD are synonyms for the byte, word and doubleword SCAS instructions that don't require operands. They are simpler to code, but provide no type or segment checking.
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<p>SCAS can be preceded by the <a href="REP.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/REP.HTM">REPE</a> or <a href="REP.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/REP.HTM">REPNE</a> prefix for a block search of CX or ECX bytes or words. Refer to the <a href="REP.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/REP.HTM">REP</a> instruction for further details.
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<h2>Flags Affected</h2>
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OF, SF, ZF, AF, PF, and CF as described in <a href="APPC.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/APPC.HTM">Appendix C</a>
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<h2>Protected Mode Exceptions</h2>
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#GP(0) for an illegal memory operand effective address in the CS, DS, ES, FS, or GS segments; #SS(0) for an illegal address in the SS segment; #PF(fault-code) for a page fault
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<h2>Real Address Mode Exceptions</h2>
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Interrupt 13 if any part of the operand would lie outside of the effective address space from 0 to 0FFFFH
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<h2>Virtual 8086 Mode Exceptions</h2>
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Same exceptions as in Real Address Mode; #PF(fault-code) for a page fault
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<p>
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<hr>
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<p><b>up:</b> <a href="C17.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/C17.HTM">Chapter 17 -- 80386 Instruction Set</a><br>
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<b>prev:</b><a href="SBB.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/SBB.HTM"> SBB Integer Subtraction with Borrow</a><br>
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<b>next:</b><a href="SETCC.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/SETCC.HTM"> SETcc Byte Set on Condition</a>
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</body>
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