59 lines
2.8 KiB
HTML
59 lines
2.8 KiB
HTML
<html><!DOCTYPE HTML PUBLIC "-//IETF//DTD HTML 2.0//EN">
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<html>
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<head>
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<title>80386 Programmer's Reference Manual -- Opcode XCHG</title>
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</head>
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<body>
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<b>up:</b> <a href="C17.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/C17.HTM">Chapter 17 -- 80386 Instruction Set</a><br>
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<b>prev:</b><a href="WAIT.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/WAIT.HTM"> WAIT Wait until BUSY# Pin is Inactive (HIGH)</a><br>
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<b>next:</b><a href="XLAT.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/XLAT.HTM"> XLAT/XLATB Table Look-up Translation</a>
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<p>
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<hr>
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<p>
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<h1>XCHG -- Exchange Register/Memory with Register</h1>
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<pre>
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Opcode Instruction Clocks Description
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90 + r XCHG AX,r16 3 Exchange word register with AX
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90 + r XCHG r16,AX 3 Exchange word register with AX
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90 + r XCHG EAX,r32 3 Exchange dword register with EAX
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90 + r XCHG r32,EAX 3 Exchange dword register with EAX
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86 /r XCHG r/m8,r8 3 Exchange byte register with EA byte
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86 /r XCHG r8,r/m8 3/5 Exchange byte register with EA byte
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87 /r XCHG r/m16,r16 3 Exchange word register with EA word
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87 /r XCHG r16,r/m16 3/5 Exchange word register with EA word
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87 /r XCHG r/m32,r32 3 Exchange dword register with EA dword
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87 /r XCHG r32,r/m32 3/5 Exchange dword register with EA dword
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</pre>
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<h2>Operation</h2>
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<pre>
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temp := DEST
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DEST := SRC
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SRC := temp
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</pre>
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<h2>Description</h2>
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XCHG exchanges two operands. The operands can be in either order. If a memory operand is involved, BUS LOCK is asserted for the duration of the exchange, regardless of the presence or absence of the <a href="LOCK.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/LOCK.HTM">LOCK</a> prefix or of the value of the IOPL.
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<h2>Flags Affected</h2>
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None
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<h2>Protected Mode Exceptions</h2>
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#GP(0) if either operand is in a nonwritable segment; #GP(0) for an illegal memory operand effective address in the CS, DS, ES, FS, or GS segments; #SS(0) for an illegal address in the SS segment; #PF(fault-code) for a page fault
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<h2>Real Address Mode Exceptions</h2>
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Interrupt 13 if any part of the operand would lie outside of the effective address space from 0 to 0FFFFH
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<h2>Virtual 8086 Mode Exceptions</h2>
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Same exceptions as in Real Address Mode; #PF(fault-code) for a page fault
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<p>
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<hr>
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<p><b>up:</b> <a href="C17.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/C17.HTM">Chapter 17 -- 80386 Instruction Set</a><br>
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<b>prev:</b><a href="WAIT.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/WAIT.HTM"> WAIT Wait until BUSY# Pin is Inactive (HIGH)</a><br>
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<b>next:</b><a href="XLAT.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/XLAT.HTM"> XLAT/XLATB Table Look-up Translation</a>
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</body>
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