54 lines
2.5 KiB
HTML
54 lines
2.5 KiB
HTML
<html><!DOCTYPE HTML PUBLIC "-//IETF//DTD HTML 2.0//EN">
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<html>
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<head>
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<title>80386 Programmer's Reference Manual -- Opcode XLAT</title>
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</head>
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<body>
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<b>up:</b> <a href="C17.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/C17.HTM">Chapter 17 -- 80386 Instruction Set</a><br>
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<b>prev:</b><a href="XCHG.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/XCHG.HTM"> XCHG Exchange Register/Memory with Register</a><br>
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<b>next:</b><a href="XOR.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/XOR.HTM"> XOR Logical Exclusive OR</a>
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<p>
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<hr>
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<p>
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<h1>XLAT/XLATB -- Table Look-up Translation</h1>
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<pre>
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D7 XLAT m8 5 Set AL to memory byte DS:[(E)BX + unsigned AL]
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D7 XLATB 5 Set AL to memory byte DS:[(E)BX + unsigned AL]
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</pre>
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<h2>Operation</h2>
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<pre>
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IF AddressSize = 16
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THEN
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AL := (BX + ZeroExtend(AL))
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ELSE (* AddressSize = 32 *)
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AL := (EBX + ZeroExtend(AL));
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FI;
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</pre>
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<h2>Description</h2>
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XLAT changes the AL register from the table index to the table entry. AL should be the unsigned index into a table addressed by DS:BX (for an address-size attribute of 16 bits) or DS:EBX (for an address-size attribute of 32 bits).
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<p>The operand to XLAT allows for the possibility of a segment override. XLAT uses the contents of BX even if they differ from the offset of the operand. The offset of the operand should have been moved intoBX/EBX with a previous instruction.
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<p>The no-operand form, XLATB, can be used if the BX/EBX table will always reside in the DS segment.
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<h2>Flags Affected</h2>
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None
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<h2>Protected Mode Exceptions</h2>
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#GP(0) for an illegal memory operand effective address in the CS, DS, ES, FS, or GS segments; #SS(0) for an illegal address in the SS segment; #PF(fault-code) for a page fault
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<h2>Real Address Mode Exceptions</h2>
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Interrupt 13 if any part of the operand would lie outside of the effective address space from 0 to 0FFFFH
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<h2>Virtual 8086 Mode Exceptions</h2>
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Same exceptions as in Real Address Mode; #PF(fault-code) for a page fault
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<p>
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<hr>
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<p><b>up:</b> <a href="C17.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/C17.HTM">Chapter 17 -- 80386 Instruction Set</a><br>
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<b>prev:</b><a href="XCHG.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/XCHG.HTM"> XCHG Exchange Register/Memory with Register</a><br>
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<b>next:</b><a href="XOR.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/XOR.HTM"> XOR Logical Exclusive OR</a>
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</body>
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