188 lines
5.0 KiB
HTML
188 lines
5.0 KiB
HTML
<HTML>
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<HEAD>
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<!-- This HTML file has been created by texi2html 1.52
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from ../texi/as.texinfo on 24 April 1999 -->
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<TITLE>Using as - ARM Dependent Features</TITLE>
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</HEAD>
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<BODY>
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Go to the <A HREF="as_1.html">first</A>, <A HREF="as_10.html">previous</A>, <A HREF="as_12.html">next</A>, <A HREF="as_27.html">last</A> section, <A HREF="as_toc.html">table of contents</A>.
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<P><HR><P>
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<H1><A NAME="SEC152" HREF="as_toc.html#TOC152">ARM Dependent Features</A></H1>
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<P>
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<A NAME="IDX461"></A>
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<A NAME="IDX462"></A>
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</P>
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<H2><A NAME="SEC153" HREF="as_toc.html#TOC153">Options</A></H2>
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<P>
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<A NAME="IDX463"></A>
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<A NAME="IDX464"></A>
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<DL COMPACT>
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<DT><CODE>-marm <VAR>[2|250|3|6|60|600|610|620|7|7m|7d|7dm|7di|7dmi|70|700|700i|710|710c|7100|7500|7500fe|7tdmi|8|strongarm|strongarm110]</VAR></CODE>
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<DD>
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<A NAME="IDX465"></A>
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This option specifies the target processor. The assembler will issue an
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error message if an attempt is made to assemble an instruction which
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will not execute on the target processor.
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<A NAME="IDX466"></A>
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<DT><CODE>-marmv <VAR>[2|2a|3|3m|4|4t]</VAR></CODE>
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<DD>
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This option specifies the target architecture. The assembler will issue
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an error message if an attempt is made to assemble an instruction which
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will not execute on the target architecture.
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<A NAME="IDX467"></A>
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<DT><CODE>-mthumb</CODE>
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<DD>
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This option specifies that only Thumb instructions should be assembled.
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<A NAME="IDX468"></A>
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<DT><CODE>-mall</CODE>
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<DD>
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This option specifies that any Arm or Thumb instruction should be assembled.
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<A NAME="IDX469"></A>
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<DT><CODE>-mfpa <VAR>[10|11]</VAR></CODE>
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<DD>
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This option specifies the floating point architecture in use on the
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target processor.
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<A NAME="IDX470"></A>
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<DT><CODE>-mfpe-old</CODE>
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<DD>
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Do not allow the assemble of floating point multiple instructions.
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<A NAME="IDX471"></A>
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<DT><CODE>-mno-fpu</CODE>
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<DD>
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Do not allow the assembly of any floating point instructions.
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<A NAME="IDX472"></A>
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<DT><CODE>-mthumb-interwork</CODE>
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<DD>
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This option specifies that the output generated by the assembler should
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be marked as supporting interworking.
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<A NAME="IDX473"></A>
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<DT><CODE>-mapcs <VAR>[26|32]</VAR></CODE>
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<DD>
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This option specifies that the output generated by the assembler should
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be marked as supporting the indicated version of the Arm Procedure.
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Calling Standard.
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<A NAME="IDX474"></A>
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<DT><CODE>-EB</CODE>
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<DD>
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This option specifies that the output generated by the assembler should
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be marked as being encoded for a big-endian processor.
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<A NAME="IDX475"></A>
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<DT><CODE>-EL</CODE>
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<DD>
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This option specifies that the output generated by the assembler should
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be marked as being encoded for a little-endian processor.
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</DL>
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<H2><A NAME="SEC154" HREF="as_toc.html#TOC154">Syntax</A></H2>
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<H3><A NAME="SEC155" HREF="as_toc.html#TOC155">Special Characters</A></H3>
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<P>
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<A NAME="IDX476"></A>
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<A NAME="IDX477"></A>
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<SAMP>`;'</SAMP> is the line comment character.
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</P>
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<P>
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<A NAME="IDX478"></A>
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<A NAME="IDX479"></A>
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*TODO* Explain about /data modifier on symbols.
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</P>
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<H3><A NAME="SEC156" HREF="as_toc.html#TOC156">Register Names</A></H3>
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<P>
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<A NAME="IDX480"></A>
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<A NAME="IDX481"></A>
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*TODO* Explain about ARM register naming, and the predefined names.
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</P>
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<H2><A NAME="SEC157" HREF="as_toc.html#TOC157">Floating Point</A></H2>
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<P>
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<A NAME="IDX482"></A>
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<A NAME="IDX483"></A>
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The ARM family uses IEEE floating-point numbers.
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</P>
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<H2><A NAME="SEC158" HREF="as_toc.html#TOC158">ARM Machine Directives</A></H2>
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<P>
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<A NAME="IDX484"></A>
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<A NAME="IDX485"></A>
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<DL COMPACT>
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<DT><CODE>.code <VAR>[16|32]</VAR></CODE>
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<DD>
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<A NAME="IDX486"></A>
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This directive selects the instruction set being generated. The value 16
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selects Thumb, with the value 32 selecting ARM.
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<A NAME="IDX487"></A>
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<DT><CODE>.thumb</CODE>
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<DD>
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This performs the same action as <VAR>.code 16</VAR>.
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<A NAME="IDX488"></A>
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<DT><CODE>.arm</CODE>
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<DD>
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This performs the same action as <VAR>.code 32</VAR>.
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<A NAME="IDX489"></A>
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<DT><CODE>.force_thumb</CODE>
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<DD>
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This directive forces the selection of Thumb instructions, even if the
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target processor does not support those instructions
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<A NAME="IDX490"></A>
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<DT><CODE>.thumb_func</CODE>
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<DD>
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This directive specifies that the following symbol is the name of a
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Thumb encoded function. This information is necessary in order to allow
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the assembler and linker to generate correct code for interworking
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between Arm and Thumb instructions and should be used even if
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interworking is not going to be performed.
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</DL>
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<H2><A NAME="SEC159" HREF="as_toc.html#TOC159">Opcodes</A></H2>
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<P>
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<A NAME="IDX491"></A>
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<A NAME="IDX492"></A>
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<CODE>as</CODE> implements all the standard ARM opcodes.
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</P>
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<P>
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*TODO* Document the pseudo-ops (adr, nop)
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</P>
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<P>
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For information on the ARM or Thumb instruction sets, see <CITE>ARM
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Software Development Toolkit Reference Manual</CITE>, Advanced RISC Machines
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Ltd.
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</P>
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<P><HR><P>
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Go to the <A HREF="as_1.html">first</A>, <A HREF="as_10.html">previous</A>, <A HREF="as_12.html">next</A>, <A HREF="as_27.html">last</A> section, <A HREF="as_toc.html">table of contents</A>.
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</BODY>
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</HTML>
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