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<TITLE>Using as - Hitachi SH Dependent Features</TITLE>
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<P><HR><P>
<H1><A NAME="SEC231" HREF="as_toc.html#TOC231">Hitachi SH Dependent Features</A></H1>
<P>
<A NAME="IDX736"></A>
</P>
<H2><A NAME="SEC232" HREF="as_toc.html#TOC232">Options</A></H2>
<P>
<A NAME="IDX737"></A>
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<CODE>as</CODE> has no additional command-line options for the Hitachi
SH family.
</P>
<H2><A NAME="SEC233" HREF="as_toc.html#TOC233">Syntax</A></H2>
<H3><A NAME="SEC234" HREF="as_toc.html#TOC234">Special Characters</A></H3>
<P>
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<SAMP>`!'</SAMP> is the line comment character.
</P>
<P>
<A NAME="IDX741"></A>
<A NAME="IDX742"></A>
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You can use <SAMP>`;'</SAMP> instead of a newline to separate statements.
</P>
<P>
<A NAME="IDX744"></A>
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Since <SAMP>`$'</SAMP> has no special meaning, you may use it in symbol names.
</P>
<H3><A NAME="SEC235" HREF="as_toc.html#TOC235">Register Names</A></H3>
<P>
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You can use the predefined symbols <SAMP>`r0'</SAMP>, <SAMP>`r1'</SAMP>, <SAMP>`r2'</SAMP>,
<SAMP>`r3'</SAMP>, <SAMP>`r4'</SAMP>, <SAMP>`r5'</SAMP>, <SAMP>`r6'</SAMP>, <SAMP>`r7'</SAMP>, <SAMP>`r8'</SAMP>,
<SAMP>`r9'</SAMP>, <SAMP>`r10'</SAMP>, <SAMP>`r11'</SAMP>, <SAMP>`r12'</SAMP>, <SAMP>`r13'</SAMP>, <SAMP>`r14'</SAMP>,
and <SAMP>`r15'</SAMP> to refer to the SH registers.
</P>
<P>
The SH also has these control registers:
</P>
<DL COMPACT>
<DT><CODE>pr</CODE>
<DD>
procedure register (holds return address)
<DT><CODE>pc</CODE>
<DD>
program counter
<DT><CODE>mach</CODE>
<DD>
<DT><CODE>macl</CODE>
<DD>
high and low multiply accumulator registers
<DT><CODE>sr</CODE>
<DD>
status register
<DT><CODE>gbr</CODE>
<DD>
global base register
<DT><CODE>vbr</CODE>
<DD>
vector base register (for interrupt vectors)
</DL>
<H3><A NAME="SEC236" HREF="as_toc.html#TOC236">Addressing Modes</A></H3>
<P>
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<CODE>as</CODE> understands the following addressing modes for the SH.
<CODE>R<VAR>n</VAR></CODE> in the following refers to any of the numbered
registers, but <EM>not</EM> the control registers.
</P>
<DL COMPACT>
<DT><CODE>R<VAR>n</VAR></CODE>
<DD>
Register direct
<DT><CODE>@R<VAR>n</VAR></CODE>
<DD>
Register indirect
<DT><CODE>@-R<VAR>n</VAR></CODE>
<DD>
Register indirect with pre-decrement
<DT><CODE>@R<VAR>n</VAR>+</CODE>
<DD>
Register indirect with post-increment
<DT><CODE>@(<VAR>disp</VAR>, R<VAR>n</VAR>)</CODE>
<DD>
Register indirect with displacement
<DT><CODE>@(R0, R<VAR>n</VAR>)</CODE>
<DD>
Register indexed
<DT><CODE>@(<VAR>disp</VAR>, GBR)</CODE>
<DD>
<CODE>GBR</CODE> offset
<DT><CODE>@(R0, GBR)</CODE>
<DD>
GBR indexed
<DT><CODE><VAR>addr</VAR></CODE>
<DD>
<DT><CODE>@(<VAR>disp</VAR>, PC)</CODE>
<DD>
PC relative address (for branch or for addressing memory). The
<CODE>as</CODE> implementation allows you to use the simpler form
<VAR>addr</VAR> anywhere a PC relative address is called for; the alternate
form is supported for compatibility with other assemblers.
<DT><CODE>#<VAR>imm</VAR></CODE>
<DD>
Immediate data
</DL>
<H2><A NAME="SEC237" HREF="as_toc.html#TOC237">Floating Point</A></H2>
<P>
<A NAME="IDX750"></A>
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The SH family has no hardware floating point, but the <CODE>.float</CODE>
directive generates IEEE floating-point numbers for compatibility
with other development tools.
</P>
<H2><A NAME="SEC238" HREF="as_toc.html#TOC238">SH Machine Directives</A></H2>
<P>
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<A NAME="IDX755"></A>
</P>
<DL COMPACT>
<DT><CODE>uaword</CODE>
<DD>
<DT><CODE>ualong</CODE>
<DD>
<CODE>as</CODE> will issue a warning when a misaligned <CODE>.word</CODE> or
<CODE>.long</CODE> directive is used. You may use <CODE>.uaword</CODE> or
<CODE>.ualong</CODE> to indicate that the value is intentionally misaligned.
</DL>
<H2><A NAME="SEC239" HREF="as_toc.html#TOC239">Opcodes</A></H2>
<P>
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For detailed information on the SH machine instruction set, see
<CITE>SH-Microcomputer User's Manual</CITE> (Hitachi Micro Systems, Inc.).
</P>
<P>
<CODE>as</CODE> implements all the standard SH opcodes. No additional
pseudo-instructions are needed on this family. Note, however, that
because <CODE>as</CODE> supports a simpler form of PC-relative
addressing, you may simply write (for example)
</P>
<PRE>
mov.l bar,r0
</PRE>
<P>
where other assemblers might require an explicit displacement to
<CODE>bar</CODE> from the program counter:
</P>
<PRE>
mov.l @(<VAR>disp</VAR>, PC)
</PRE>
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