411 lines
15 KiB
Plaintext
411 lines
15 KiB
Plaintext
NEC æPD765 - Floppy Disk Controller - 8272A
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PS/2 FDC Diskette Status Register A at 3F0h
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³7³6³5³4³3³2³1³0³ 3F0h PS/2 Disk Status Register A (read-only)
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³ ³ ³ ³ ³ ³ ³ ÀÄÄÄÄ direction
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³ ³ ³ ³ ³ ³ ÀÄÄÄÄÄ write protect
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³ ³ ³ ³ ³ ÀÄÄÄÄÄÄ index
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³ ³ ³ ³ ÀÄÄÄÄÄÄÄ head 1 select
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³ ³ ³ ÀÄÄÄÄÄÄÄÄ track 0
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³ ³ ÀÄÄÄÄÄÄÄÄÄ step
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³ ÀÄÄÄÄÄÄÄÄÄÄ second drive installed
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ÀÄÄÄÄÄÄÄÄÄÄÄ interrupt pending
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PS/2 FDC Diskette Status Register B at 3F1h
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³7³6³5³4³3³2³1³0³ 3F1h PS/2 Disk Status Register B (read-only)
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³ ³ ³ ³ ³ ³ ³ ÀÄÄÄÄ motor enable 0
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³ ³ ³ ³ ³ ³ ÀÄÄÄÄ motor enable 1
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³ ³ ³ ³ ³ ÀÄÄÄÄ write enable
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³ ³ ³ ³ ÀÄÄÄÄ read data (toggles w/positive transition in -RD DATA)
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³ ³ ³ ÀÄÄÄÄ write data (toggles w/positive transition in WR DATA)
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³ ³ ÀÄÄÄÄ drive select
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ÀÄÁÄÄÄÄ reserved
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FDC Digital Output Register at 3F2h (all systems)
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³7³6³5³4³3³2³1³0³ port 3F2h (write only)
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³ ³ ³ ³ ³ ³ ÀÄÁÄÄÄÄ floppy drive select (0=A, 1=B, 2=floppy C, ...)
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³ ³ ³ ³ ³ ÀÄÄÄÄÄÄÄ 1 = FDC enable, 0 = hold FDC at reset
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³ ³ ³ ³ ÀÄÄÄÄÄÄÄÄ 1 = DMA & I/O interface enabled (reserved PS/2)
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³ ³ ³ ÀÄÄÄÄÄÄÄÄÄ 1 = turn floppy drive A motor on
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³ ³ ÀÄÄÄÄÄÄÄÄÄÄ 1 = turn floppy drive B motor on
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³ ÀÄÄÄÄÄÄÄÄÄÄÄ 1 = turn floppy drive C motor on; (reserved PS/2)
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ÀÄÄÄÄÄÄÄÄÄÄÄÄ 1 = turn floppy drive D motor on; (reserved PS/2)
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- used to control drive motors, drive selection, and feature enable
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- PS/2 only uses bit 0 for floppy drive select; bit 1 is reserved
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- PS/2 only uses bits 5 & 4 for motor enable; bits 7&6 are reserved
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- all DOR bits are cleared during controller reset
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FDC Main Status Register at 3F4h (all systems)
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³7³6³5³4³3³2³1³0³ port 3F4h (read only)
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³ ³ ³ ³ ³ ³ ³ ÀÄÄÄÄ floppy drive 0 in seek mode/busy
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³ ³ ³ ³ ³ ³ ÀÄÄÄÄÄ floppy drive 1 in seek mode/busy
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³ ³ ³ ³ ³ ÀÄÄÄÄÄÄ floppy drive 2 in seek mode/busy (reserved PS/2)
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³ ³ ³ ³ ÀÄÄÄÄÄÄÄ floppy drive 3 in seek mode/busy (reserved PS/2)
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³ ³ ³ ÀÄÄÄÄÄÄÄÄ FDC read or write command in progress
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³ ³ ÀÄÄÄÄÄÄÄÄÄ FDC is in non-DMA mode
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³ ÀÄÄÄÄÄÄÄÄÄÄ I/O direction; 1 = FDC to CPU; 0 = CPU to FDC
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ÀÄÄÄÄÄÄÄÄÄÄÄ data reg ready for I/O to/from CPU (request for master)
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FDC Command Status Register 0 at 3F5h (all systems)
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³7³6³5³4³3³2³1³0³ Command Status Register 0 at port 3F5h
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³ ³ ³ ³ ³ ³ ÀÄÁÄÄÄÄ unit selected at interrupt (0=A, 1=B, 2=...)
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³ ³ ³ ³ ³ ÀÄÄÄÄÄÄÄ head number at interrupt (head 0 or 1)
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³ ³ ³ ³ ÀÄÄÄÄÄÄÄÄ not ready on read/write or SS access to head 1
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³ ³ ³ ÀÄÄÄÄÄÄÄÄÄ equipment check (see note)
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³ ³ ÀÄÄÄÄÄÄÄÄÄÄ set to 1 when FDD completes a seek command
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ÀÄÁÄÄÄÄÄÄÄÄÄÄÄ last command status (see below)
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Bits
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76 Last Command Status
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00 command terminated successfully
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01 command execution started but terminated abnormally
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10 invalid command issued
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11 command terminated abnormally due to a change in state of
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the Ready Signal from the FDC (reserved on PS/2)
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- equipment check can occur if FDD signals a fault or track zero is
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not found after 77 steps on a recalibrate command
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- PS/2 only uses bits 1-0 for drive (values are 01b and 10b)
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FDC Command Status Register 1 at 3F5h (all systems)
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³7³6³5³4³3³2³1³0³ Command Status Register 1 at port 3F5h
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³ ³ ³ ³ ³ ³ ³ ÀÄÄÄÄ FDC cannot find ID address mark (see reg 2)
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³ ³ ³ ³ ³ ³ ÀÄÄÄÄÄ write protect detected during write
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³ ³ ³ ³ ³ ÀÄÄÄÄÄÄ FDC cannot find sector ID
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³ ³ ³ ³ ÀÄÄÄÄÄÄÄ unused (always zero)
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³ ³ ³ ÀÄÄÄÄÄÄÄÄ over-run; FDC not serviced in reasonable time
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³ ³ ÀÄÄÄÄÄÄÄÄÄ data error (CRC) in ID field or data field
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³ ÀÄÄÄÄÄÄÄÄÄÄ unused (always zero)
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ÀÄÄÄÄÄÄÄÄÄÄÄ end of cylinder; sector# greater than sectors/track
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- bit 0 of Status Register 1 and bit 4 of Status Register 2 are
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related and mimic each other
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FDC Command Status Register 2 at 3F5h (all systems)
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³7³6³5³4³3³2³1³0³ Command Status Register 2 at port 3F5h
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³ ³ ³ ³ ³ ³ ³ ÀÄÄÄÄ missing address mark in data field
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³ ³ ³ ³ ³ ³ ÀÄÄÄÄÄ bad cylinder, ID not found and Cyl Id=FFh
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³ ³ ³ ³ ³ ÀÄÄÄÄÄÄ scan command failed, sector not found in cylinder
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³ ³ ³ ³ ÀÄÄÄÄÄÄÄ scan command equal condition satisfied
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³ ³ ³ ÀÄÄÄÄÄÄÄÄ wrong cylinder detected
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³ ³ ÀÄÄÄÄÄÄÄÄÄ CRC error detected in sector data
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³ ÀÄÄÄÄÄÄÄÄÄÄ sector with deleted data address mark detected
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ÀÄÄÄÄÄÄÄÄÄÄÄ unused (always zero)
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- bit 0 of Status Register 1 and bit 4 of Status Register 2 are
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related and mimic each other
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FDC Command Status Register 3 at 3F5h (FDD status, all systems)
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³7³6³5³4³3³2³1³0³ Floppy Disk Drive Status at port 3F5h
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³ ³ ³ ³ ³ ³ ÀÄÁÄÄÄÄ FDD unit selected status (0=A, 1=B, 2=...)
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³ ³ ³ ³ ³ ÀÄÄÄÄÄÄÄ FDD side head select status (0=head 0, 1=head 1)
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³ ³ ³ ³ ÀÄÄÄÄÄÄÄÄ FDD two sided status signal
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³ ³ ³ ÀÄÄÄÄÄÄÄÄÄ FDD track zero status signal
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³ ³ ÀÄÄÄÄÄÄÄÄÄÄ FDD ready status signal
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³ ÀÄÄÄÄÄÄÄÄÄÄÄ FDD write protect status signal
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ÀÄÄÄÄÄÄÄÄÄÄÄÄ FDD fault status signal
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PS/2 FDC Digital Input Register at 3F7h
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³7³6³5³4³3³2³1³0³ 3F7h PS/2 Digital Input Register (read only)
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³ ³ ³ ³ ³ ³ ³ ÀÄÄÄ high density select
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³ ÀÄÁÄÁÄÁÄÁÄÁÄÄÄÄ reserved
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ÀÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ diskette change
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PS/2 FDC Configuration Control Register at 3F7h
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³7³6³5³4³3³2³1³0³ 3F7h PS/2 Config. Control Register (write only)
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³ ³ ³ ³ ³ ³ ÀÄÁÄÄ DRC1, DRC0 (see below)
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ÀÄÁÄÁÄÁÄÁÄÁÄÄÄÄÄ reserved
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DRC1 DRC0
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0 0 500000 bit per second mode
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0 1 reserved
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1 0 250000 bit per second mode
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1 1 reserved
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- Digital Input Register is used to sense the state of the
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(-diskette change) and the (-high density select) signals
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- Configuration Control Register is used to set the transfer rate
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FDC Programming Considerations
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Three phases of command execution:
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1. Command phase; commands are sent from the CPU to the FDC via
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port 3F5h; bit 6 of the Status Register at 3F4h must be zero
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2. Execution phase; FDC executes instruction & generates INT 6
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3. Result phase; status and other information is available to CPU;
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INT 6 sets bit 7 of BIOS Data Area location 40:3E which can
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be polled for completion status
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Example of a read operation:
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1. turn disk motor on and set delay time for drive spin up
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2. perform seek operation; wait for disk interrupt
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3. prepare DMA chip to move data to memory
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4. send read command and wait for transfer complete interrupt
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5. read status information
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6. turn disk motor off
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Floppy Diskette Controller Operations (15 commands)
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Read Data D7 D6 D5 D4 D3 D2 D1 D0
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command byte 0: MT MF SK 0 0 1 1 0
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command byte 1: ? ? ? ? ? HD US1 US0
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command byte 2: cylinder number
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command byte 3: head number
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command byte 4: sector number
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command byte 5: bytes per sector
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command byte 6: end of track (last sector in track)
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command byte 7: gap 3 length
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command byte 8: data length (if cmd byte 5==0)
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result byte 0: status register 0
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result byte 1: status register 1
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result byte 2: status register 2
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result byte 3: cylinder number
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result byte 4: head number
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result byte 5: sector number
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result byte 6: bytes per sector
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Read Deleted Data D7 D6 D5 D4 D3 D2 D1 D0
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command byte 0: MT MF SK 0 1 1 0 0
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command byte 1: ? ? ? ? ? HD US1 US0
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command byte 2: cylinder number
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command byte 3: head number
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command byte 4: sector number
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command byte 5: bytes per sector
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command byte 6: end of track (last sector in track)
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command byte 7: gap 3 length
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command byte 8: data length (if cmd byte 5==0)
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result byte 0: status register 0
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result byte 1: status register 1
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result byte 2: status register 2
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result byte 3: cylinder number
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result byte 4: head number
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result byte 5: sector number
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result byte 6: bytes per sector
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Write Data D7 D6 D5 D4 D3 D2 D1 D0
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command byte 0: MT MF 0 0 0 1 0 1
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command byte 1: ? ? ? ? ? HD US1 US0
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command byte 2: cylinder number
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command byte 3: head number
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command byte 4: sector number
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command byte 5: bytes per sector
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command byte 6: end of track (last sector in track)
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command byte 7: gap 3 length
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command byte 8: data length (if cmd byte 5==0)
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result byte 0: status register 0
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result byte 1: status register 1
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result byte 2: status register 2
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result byte 3: cylinder number
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result byte 4: head number
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result byte 5: sector number
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result byte 6: bytes per sector
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Write Deleted Data D7 D6 D5 D4 D3 D2 D1 D0
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command byte 0: MT MF 0 0 1 0 0 1
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command byte 1: ? ? ? ? ? HD US1 US0
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command byte 2: cylinder number
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command byte 3: head number
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command byte 4: sector number
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command byte 5: bytes per sector
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command byte 6: end of track (last sector in track)
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command byte 7: gap 3 length
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command byte 8: data length (if cmd byte 5==0)
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result byte 0: status register 0
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result byte 1: status register 1
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result byte 2: status register 2
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result byte 3: cylinder number
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result byte 4: head number
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result byte 5: sector number
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result byte 6: bytes per sector
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Read a Track D7 D6 D5 D4 D3 D2 D1 D0
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(Diagnostic)
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command byte 0: 0 MF SK 0 0 0 1 0
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command byte 1: ? ? ? ? ? HD US1 US0
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command byte 2: cylinder number
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command byte 3: head number
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command byte 4: sector number
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command byte 5: bytes per sector
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command byte 6: end of track (last sector in track)
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command byte 7: gap 3 length
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command byte 8: data length (if cmd byte 5==0)
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result byte 0: status register 0
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result byte 1: status register 1
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result byte 2: status register 2
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result byte 3: cylinder number
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result byte 4: head number
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result byte 5: sector number
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result byte 6: bytes per sector
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Read ID D7 D6 D5 D4 D3 D2 D1 D0
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command byte 0: 0 MF 0 0 1 0 1 0
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command byte 1: ? ? ? ? ? HD US1 US0
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result byte 0: status register 0
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result byte 1: status register 1
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result byte 2: status register 2
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result byte 3: cylinder number
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result byte 4: head number
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result byte 5: sector number
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result byte 6: bytes per sector
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Format a Track D7 D6 D5 D4 D3 D2 D1 D0
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(Write Sector IDs)
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command byte 0: 0 MF 0 0 1 1 0 1
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command byte 1: ? ? ? ? ? HD US1 US0
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command byte 2: bytes per sector
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command byte 3: sectors per track
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command byte 4: gap 3 length
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command byte 5: filler pattern to write in each byte
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result byte 0: status register 0
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result byte 1: status register 1
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result byte 2: status register 2
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result byte 3: cylinder number
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result byte 4: head number
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result byte 5: sector number
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result byte 6: bytes per sector
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Scan Equal D7 D6 D5 D4 D3 D2 D1 D0
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command byte 0: MT MF SK 1 0 0 0 1
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command byte 1: ? ? ? ? ? HD US1 US0
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command byte 2: cylinder number
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command byte 3: head number
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command byte 4: sector number
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command byte 5: bytes per sector
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command byte 6: end of track (last sector in track)
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command byte 7: gap 3 length
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command byte 8: scan test (1=scan contiguous, 2=scan alternate)
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result byte 0: status register 0
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result byte 1: status register 1
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result byte 2: status register 2
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result byte 3: cylinder number
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result byte 4: head number
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result byte 5: sector number
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result byte 6: bytes per sector
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Scan Low or Equal D7 D6 D5 D4 D3 D2 D1 D0
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command byte 0: MT MF SK 1 1 0 0 1
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command byte 1: ? ? ? ? ? HD US1 US0
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command byte 2: cylinder number
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command byte 3: head number
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command byte 4: sector number
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command byte 5: bytes per sector
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command byte 6: end of track (last sector in track)
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command byte 7: gap 3 length
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command byte 8: scan test (1=scan contiguous, 2=scan alternate)
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result byte 0: status register 0
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result byte 1: status register 1
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result byte 2: status register 2
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result byte 3: cylinder number
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result byte 4: head number
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result byte 5: sector number
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result byte 6: bytes per sector
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Scan High or Equal D7 D6 D5 D4 D3 D2 D1 D0
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command byte 0: MT MF SK 1 1 1 0 1
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command byte 1: ? ? ? ? ? HD US1 US0
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command byte 2: cylinder number
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command byte 3: head number
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command byte 4: sector number
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command byte 5: bytes per sector
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command byte 6: end of track (last sector in track)
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command byte 7: gap 3 length
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command byte 8: scan test (1=scan contiguous, 2=scan alternate)
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result byte 0: status register 0
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result byte 1: status register 1
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result byte 2: status register 2
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result byte 3: cylinder number
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result byte 4: head number
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result byte 5: sector number
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result byte 6: bytes per sector
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Recalibrate D7 D6 D5 D4 D3 D2 D1 D0
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command byte 0: 0 0 0 0 0 1 1 1
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command byte 1: ? ? ? ? ? 0 US1 US0
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returns nothing
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Sense Interrupt D7 D6 D5 D4 D3 D2 D1 D0
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Status
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command byte 0: 0 0 0 0 1 0 0 0
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result byte 0: status register 0
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result byte 1: present cylinder number
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Specify Step & D7 D6 D5 D4 D3 D2 D1 D0
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Head Load
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command byte 0: 0 0 0 0 0 0 1 1
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command byte 1: step rate time ³ head unload time
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command byte 2: ÄÄÄÄÄÄhead load timeÄÄÄÄÄÄ ND
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returns nothing
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Sense Drive D7 D6 D5 D4 D3 D2 D1 D0
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Status
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command byte 0: 0 0 0 0 0 1 0 0
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command byte 1: ? ? ? ? ? HD US1 US0
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result byte 0: status register 3
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Seek D7 D6 D5 D4 D3 D2 D1 D0
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command byte 0: 0 0 0 0 1 1 1 1
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command byte 1: ? ? ? ? ? HD US1 US0
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command byte 2: new cylinder number
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returns nothing
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æPD765 Version D7 D6 D5 D4 D3 D2 D1 D0
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command byte 0: ? ? ? 1 0 0 0 0
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result byte 0: status register 0
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90h = æPD765B; 80h = æPD765A or æPD765A-2
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Invalid Command
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result byte 0: status register 0 (value of 80h)
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Key to Abbreviations
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HD = Head Number Selected SK = SKip Deleted-data address mark
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MT = Multi-Track US0 = drive select bit 0
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MF = MFM mode US1 = drive select bit 1
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ND = Non-DMA mode
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Head Load Time = 2 to 254ms in 2ms increments
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Head Unload Time = 16 to 240ms in 16ms increments
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Step Rate Time = 1 to 16ms in 1ms increments
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- PS/2 systems use the 8272A diskette controller which is software
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and port compatible with the NEC æPD765
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- accessed through ports 3F0h-3F7h; NEC æPD765 is accessed through
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ports 3F2h, 3F4h and 3F5h; the 8272A uses ports 3F0h, 3F1h,
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3F2h, 3F4h, 3F5h and 3F7h
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- data, command and status registers are all accessed through
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port 3F5h a register stack with one address presented to the bus
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- bit 7 of BIOS Data Area byte 40:3E can be polled to determine
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if a disk operation has completed; this bit is set by the
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interrupt handler when the operation has completed; it should
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be reset before continuing on with the next FDC operation
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