64 lines
3.2 KiB
HTML
64 lines
3.2 KiB
HTML
<html><!DOCTYPE HTML PUBLIC "-//IETF//DTD HTML 2.0//EN">
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<html>
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<head>
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<title>80386 Programmer's Reference Manual -- Opcode ADD</title>
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</head>
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<body>
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<b>up:</b> <a href="C17.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/C17.HTM">Chapter 17 -- 80386 Instruction Set</a><br>
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<b>prev:</b><a href="ADC.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/ADC.HTM"> ADC Add with Carry</a><br>
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<b>next:</b><a href="AND.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/AND.HTM"> AND Logical AND</a>
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<p>
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<hr>
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<p>
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<h1>ADD -- Add</h1>
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<pre>
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Opcode Instruction Clocks Description
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04 ib ADD AL,imm8 2 Add immediate byte to AL
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05 iw ADD AX,imm16 2 Add immediate word to AX
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05 id ADD EAX,imm32 2 Add immediate dword to EAX
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80 /0 ib ADD r/m8,imm8 2/7 Add immediate byte to r/m byte
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81 /0 iw ADD r/m16,imm16 2/7 Add immediate word to r/m word
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81 /0 id ADD r/m32,imm32 2/7 Add immediate dword to r/m dword
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83 /0 ib ADD r/m16,imm8 2/7 Add sign-extended immediate byte
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to r/m word
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83 /0 ib ADD r/m32,imm8 2/7 Add sign-extended immediate byte
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to r/m dword
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00 /r ADD r/m8,r8 2/7 Add byte register to r/m byte
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01 /r ADD r/m16,r16 2/7 Add word register to r/m word
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01 /r ADD r/m32,r32 2/7 Add dword register to r/m dword
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02 /r ADD r8,r/m8 2/6 Add r/m byte to byte register
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03 /r ADD r16,r/m16 2/6 Add r/m word to word register
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03 /r ADD r32,r/m32 2/6 Add r/m dword to dword register
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</pre>
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<h2>Operation</h2>
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<pre>
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DEST := DEST + SRC;
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</pre>
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<h2>Description</h2>
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ADD performs an integer addition of the two operands (DEST and SRC). The result of the addition is assigned to the first operand (DEST), and the flags are set accordingly.
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<p>When an immediate byte is added to a word or doubleword operand, the immediate value is sign-extended to the size of the word or doubleword operand.
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<h2>Flags Affected</h2>
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OF, SF, ZF, AF, CF, and PF as described in <a href="APPC.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/APPC.HTM">Appendix C</a>
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<h2>Protected Mode Exceptions</h2>
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#GP(0) if the result is in a nonwritable segment; #GP(0) for an illegal memory operand effective address in the CS, DS, ES, FS, or GS segments; #SS(0) for an illegal address in the SS segment; #PF(fault-code) for a page fault
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<h2>Real Address Mode Exceptions</h2>
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Interrupt 13 if any part of the operand would lie outside of the effective address space from 0 to 0FFFFH
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<h2>Virtual 8086 Mode Exceptions</h2>
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Same exceptions as in Real Address Mode; #PF(fault-code) for a page fault
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<p>
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<hr>
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<p><b>up:</b> <a href="C17.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/C17.HTM">Chapter 17 -- 80386 Instruction Set</a><br>
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<b>prev:</b><a href="ADC.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/ADC.HTM"> ADC Add with Carry</a><br>
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<b>next:</b><a href="AND.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/AND.HTM"> AND Logical AND</a>
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</body>
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