147 lines
8.0 KiB
HTML
147 lines
8.0 KiB
HTML
<html><!DOCTYPE HTML PUBLIC "-//IETF//DTD HTML 2.0//EN">
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<head>
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<title>80386 Programmer's Reference Manual -- Opcode SAL</title>
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</head>
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<body>
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<b>up:</b> <a href="C17.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/C17.HTM">Chapter 17 -- 80386 Instruction Set</a><br>
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<b>prev:</b><a href="SAHF.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/SAHF.HTM"> SAHF Store AH into Flags</a><br>
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<b>next:</b><a href="SBB.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/SBB.HTM"> SBB Integer Subtraction with Borrow</a>
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<p>
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<hr>
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<p>
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<h1>SAL/SAR/SHL/SHR -- Shift Instructions</h1>
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<pre>
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Opcode Instruction Clocks Description
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D0 /4 SAL r/m8,1 3/7 Multiply r/m byte by 2, once
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D2 /4 SAL r/m8,CL 3/7 Multiply r/m byte by 2, CL times
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C0 /4 ib SAL r/m8,imm8 3/7 Multiply r/m byte by 2, imm8
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times
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D1 /4 SAL r/m16,1 3/7 Multiply r/m word by 2, once
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D3 /4 SAL r/m16,CL 3/7 Multiply r/m word by 2, CL times
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C1 /4 ib SAL r/m16,imm8 3/7 Multiply r/m word by 2, imm8
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times
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D1 /4 SAL r/m32,1 3/7 Multiply r/m dword by 2, once
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D3 /4 SAL r/m32,CL 3/7 Multiply r/m dword by 2, CL
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times
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C1 /4 ib SAL r/m32,imm8 3/7 Multiply r/m dword by 2, imm8
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times
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D0 /7 SAR r/m8,1 3/7 Signed divide^(1) r/m byte by 2,
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once
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D2 /7 SAR r/m8,CL 3/7 Signed divide^(1) r/m byte by 2,
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CL times
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C0 /7 ib SAR r/m8,imm8 3/7 Signed divide^(1) r/m byte by 2,
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imm8 times
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D1 /7 SAR r/m16,1 3/7 Signed divide^(1) r/m word by 2,
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once
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D3 /7 SAR r/m16,CL 3/7 Signed divide^(1) r/m word by 2,
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CL times
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C1 /7 ib SAR r/m16,imm8 3/7 Signed divide^(1) r/m word by 2,
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imm8 times
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D1 /7 SAR r/m32,1 3/7 Signed divide^(1) r/m dword by 2,
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once
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D3 /7 SAR r/m32,CL 3/7 Signed divide^(1) r/m dword by 2,
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CL times
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C1 /7 ib SAR r/m32,imm8 3/7 Signed divide^(1) r/m dword by 2,
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imm8 times
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D0 /4 SHL r/m8,1 3/7 Multiply r/m byte by 2, once
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D2 /4 SHL r/m8,CL 3/7 Multiply r/m byte by 2, CL times
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C0 /4 ib SHL r/m8,imm8 3/7 Multiply r/m byte by 2, imm8
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times
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D1 /4 SHL r/m16,1 3/7 Multiply r/m word by 2, once
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D3 /4 SHL r/m16,CL 3/7 Multiply r/m word by 2, CL times
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C1 /4 ib SHL r/m16,imm8 3/7 Multiply r/m word by 2, imm8
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times
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D1 /4 SHL r/m32,1 3/7 Multiply r/m dword by 2, once
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D3 /4 SHL r/m32,CL 3/7 Multiply r/m dword by 2, CL
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times
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C1 /4 ib SHL r/m32,imm8 3/7 Multiply r/m dword by 2, imm8
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times
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D0 /5 SHR r/m8,1 3/7 Unsigned divide r/m byte by 2,
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once
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D2 /5 SHR r/m8,CL 3/7 Unsigned divide r/m byte by 2,
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CL times
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C0 /5 ib SHR r/m8,imm8 3/7 Unsigned divide r/m byte by 2,
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imm8 times
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D1 /5 SHR r/m16,1 3/7 Unsigned divide r/m word by 2,
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once
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D3 /5 SHR r/m16,CL 3/7 Unsigned divide r/m word by 2,
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CL times
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C1 /5 ib SHR r/m16,imm8 3/7 Unsigned divide r/m word by 2,
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imm8 times
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D1 /5 SHR r/m32,1 3/7 Unsigned divide r/m dword by 2,
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once
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D3 /5 SHR r/m32,CL 3/7 Unsigned divide r/m dword by 2,
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CL times
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C1 /5 ib SHR r/m32,imm8 3/7 Unsigned divide r/m dword by 2,
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imm8 times
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</pre>
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Not the same division as <a href="IDIV.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/IDIV.HTM">IDIV</a>; rounding is toward negative infinity.
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<h2>Operation</h2>
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<pre>
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(* COUNT is the second parameter *)
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(temp) := COUNT;
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WHILE (temp <> 0)
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DO
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IF instruction is SAL or SHL
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THEN CF := high-order bit of r/m;
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FI;
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IF instruction is SAR or SHR
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THEN CF := low-order bit of r/m;
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FI;
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IF instruction = SAL or SHL
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THEN r/m := r/m * 2;
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FI;
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IF instruction = SAR
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THEN r/m := r/m /2 (*Signed divide, rounding toward negative infinity*);
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FI;
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IF instruction = SHR
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THEN r/m := r/m / 2; (* Unsigned divide *);
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FI;
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temp := temp - 1;
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OD;
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(* Determine overflow for the various instructions *)
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IF COUNT = 1
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THEN
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IF instruction is SAL or SHL
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THEN OF := high-order bit of r/m <> (CF);
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FI;
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IF instruction is SAR
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THEN OF := 0;
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FI;
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IF instruction is SHR
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THEN OF := high-order bit of operand;
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FI;
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ELSE OF := undefined;
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FI;
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</pre>
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<h2>Description</h2>
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SAL (or its synonym, SHL) shifts the bits of the operand upward. The high-order bit is shifted into the carry flag, and the low-order bit is set to 0.
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<p>SAR and SHR shift the bits of the operand downward. The low-order bit is shifted into the carry flag. The effect is to divide the operand by 2. SAR performs a signed divide with rounding toward negative infinity (not the same as <a href="IDIV.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/IDIV.HTM">IDIV</a>); the high-order bit remains the same. SHR performs an unsigned divide; the high-order bit is set to 0.
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<p>The shift is repeated the number of times indicated by the second operand, which is either an immediate number or the contents of the CL register. To reduce the maximum execution time, the 80386 does not allow shift counts greater than 31. If a shift count greater than 31 is attempted, only the bottom five bits of the shift count are used. (The 8086 uses all eight bits of the shift count.)
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<p>The overflow flag is set only if the single-shift forms of the instructions are used. For left shifts, OF is set to 0 if the high bit of the answer is the same as the result of the carry flag (i.e., the top two bits of the original operand were the same); OF is set to 1 if they are different. For SAR, OF is set to 0 for all single shifts. For SHR, OF is set to the high-order bit of the original operand.
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<h2>Flags Affected</h2>
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OF for single shifts; OF is undefined for multiple shifts; CF, ZF, PF, and SF as described in <a href="APPC.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/APPC.HTM">Appendix C</a>
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<h2>Protected Mode Exceptions</h2>
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#GP(0) if the result is in a nonwritable segment; #GP(0) for an illegal memory operand effective address in the CS, DS, ES, FS, or GS segments; #SS(0) for an illegal address in the SS segment; #PF(fault-code) for a page fault
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<h2>Real Address Mode Exceptions</h2>
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Interrupt 13 if any part of the operand would lie outside of the effective address space from 0 to 0FFFFH
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<h2>Virtual 8086 Mode Exceptions</h2>
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Same exceptions as in Real Address Mode; #PF(fault-code) for a page fault
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<p>
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<hr>
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<p><b>up:</b> <a href="C17.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/C17.HTM">Chapter 17 -- 80386 Instruction Set</a><br>
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<b>prev:</b><a href="SAHF.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/SAHF.HTM"> SAHF Store AH into Flags</a><br>
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<b>next:</b><a href="SBB.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/SBB.HTM"> SBB Integer Subtraction with Borrow</a>
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</body>
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