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oldlinux-files/Ref-docs/manual Intel386/I386Manual/WAIT.HTM
2024-02-19 00:21:47 -05:00

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<title>80386 Programmer's Reference Manual -- Opcode WAIT</title>
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<b>up:</b> <a href="C17.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/C17.HTM">Chapter 17 -- 80386 Instruction Set</a><br>
<b>prev:</b><a href="VERR.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/VERR.HTM"> VERR Verify a Segment for Reading or Writing</a><br>
<b>next:</b><a href="XCHG.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/XCHG.HTM"> XCHG Exchange Register/Memory with Register</a>
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<h1>WAIT -- Wait until BUSY# Pin is Inactive (HIGH)</h1>
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Opcode Instruction Clocks Description
9B WAIT 6 min. Wait until BUSY pin is inactive (HIGH)
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<h2>Description</h2>
WAIT suspends execution of 80386 instructions until the BUSY# pin is inactive (high). The BUSY# pin is driven by the 80287 numeric processor extension.
<h2>Flags Affected</h2>
None
<h2>Protected Mode Exceptions</h2>
#NM if the task-switched flag in the machine status word (the lower 16 bits of register CR0) is set; #MF if the ERROR# input pin is asserted (i.e., the 80287 has detected an unmasked numeric error)
<h2>Real Address Mode Exceptions</h2>
Same exceptions as in Protected Mode
<h2>Virtual 8086 Mode Exceptions</h2>
Same exceptions as in Protected Mode
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<p><b>up:</b> <a href="C17.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/C17.HTM">Chapter 17 -- 80386 Instruction Set</a><br>
<b>prev:</b><a href="VERR.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/VERR.HTM"> VERR Verify a Segment for Reading or Writing</a><br>
<b>next:</b><a href="XCHG.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/XCHG.HTM"> XCHG Exchange Register/Memory with Register</a>
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