565 lines
71 KiB
HTML
565 lines
71 KiB
HTML
<html><head><title>NASM Manual</title></head>
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<body><h1 align=center>The Netwide Assembler: NASM</h1>
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<p>This manual documents NASM, the Netwide Assembler: an assembler
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targetting the Intel x86 series of processors, with portable source.
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<p><p><a href="nasmdoc1.html">Chapter 1: Introduction</a><br>
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<a href="nasmdoc1.html#section-1.1">Section 1.1: What Is NASM?</a><br>
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<a href="nasmdoc1.html#section-1.1.1">Section 1.1.1: Why Yet Another Assembler?</a><br>
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<a href="nasmdoc1.html#section-1.1.2">Section 1.1.2: Licence Conditions</a><br>
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<a href="nasmdoc1.html#section-1.2">Section 1.2: Contact Information</a><br>
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<a href="nasmdoc1.html#section-1.3">Section 1.3: Installation</a><br>
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<a href="nasmdoc1.html#section-1.3.1">Section 1.3.1: Installing NASM under MS-DOS or Windows</a><br>
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<a href="nasmdoc1.html#section-1.3.2">Section 1.3.2: Installing NASM under Unix</a><br>
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<p><a href="nasmdoc2.html">Chapter 2: Running NASM</a><br>
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<a href="nasmdoc2.html#section-2.1">Section 2.1: NASM Command-Line Syntax</a><br>
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<a href="nasmdoc2.html#section-2.1.1">Section 2.1.1: The <code><nobr>-o</nobr></code> Option: Specifying the Output File Name</a><br>
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<a href="nasmdoc2.html#section-2.1.2">Section 2.1.2: The <code><nobr>-f</nobr></code> Option: Specifying the Output File Format</a><br>
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<a href="nasmdoc2.html#section-2.1.3">Section 2.1.3: The <code><nobr>-l</nobr></code> Option: Generating a Listing File</a><br>
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<a href="nasmdoc2.html#section-2.1.4">Section 2.1.4: The <code><nobr>-M</nobr></code> Option: Generate Makefile Dependencies.</a><br>
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<a href="nasmdoc2.html#section-2.1.5">Section 2.1.5: The <code><nobr>-F</nobr></code> Option: Selecting a Debug Information Format</a><br>
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<a href="nasmdoc2.html#section-2.1.6">Section 2.1.6: The <code><nobr>-g</nobr></code> Option: Enabling Debug Information.</a><br>
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<a href="nasmdoc2.html#section-2.1.7">Section 2.1.7: The <code><nobr>-X</nobr></code> Option: Selecting an Error Reporting Format</a><br>
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<a href="nasmdoc2.html#section-2.1.8">Section 2.1.8: The <code><nobr>-E</nobr></code> Option: Send Errors to a File</a><br>
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<a href="nasmdoc2.html#section-2.1.9">Section 2.1.9: The <code><nobr>-s</nobr></code> Option: Send Errors to <code><nobr>stdout</nobr></code></a><br>
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<a href="nasmdoc2.html#section-2.1.10">Section 2.1.10: The <code><nobr>-i</nobr></code> Option: Include File Search Directories</a><br>
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<a href="nasmdoc2.html#section-2.1.11">Section 2.1.11: The <code><nobr>-p</nobr></code> Option: Pre-Include a File</a><br>
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<a href="nasmdoc2.html#section-2.1.12">Section 2.1.12: The <code><nobr>-d</nobr></code> Option: Pre-Define a Macro</a><br>
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<a href="nasmdoc2.html#section-2.1.13">Section 2.1.13: The <code><nobr>-u</nobr></code> Option: Undefine a Macro</a><br>
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<a href="nasmdoc2.html#section-2.1.14">Section 2.1.14: The <code><nobr>-e</nobr></code> Option: Preprocess Only</a><br>
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<a href="nasmdoc2.html#section-2.1.15">Section 2.1.15: The <code><nobr>-a</nobr></code> Option: Don't Preprocess At All</a><br>
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<a href="nasmdoc2.html#section-2.1.16">Section 2.1.16: The <code><nobr>-On</nobr></code> Option: Specifying Multipass Optimization.</a><br>
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<a href="nasmdoc2.html#section-2.1.17">Section 2.1.17: The <code><nobr>-t</nobr></code> option: Enable TASM Compatibility Mode</a><br>
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<a href="nasmdoc2.html#section-2.1.18">Section 2.1.18: The <code><nobr>-w</nobr></code> Option: Enable or Disable Assembly Warnings</a><br>
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<a href="nasmdoc2.html#section-2.1.19">Section 2.1.19: The <code><nobr>-v</nobr></code> Option: Display Version Info</a><br>
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<a href="nasmdoc2.html#section-2.1.20">Section 2.1.20: The <code><nobr>-y</nobr></code> Option: Display Available Debug Info Formats</a><br>
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<a href="nasmdoc2.html#section-2.1.21">Section 2.1.21: The <code><nobr>--prefix</nobr></code> and <code><nobr>--postfix</nobr></code> Options.</a><br>
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<a href="nasmdoc2.html#section-2.1.22">Section 2.1.22: The <code><nobr>NASMENV</nobr></code> Environment Variable</a><br>
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<a href="nasmdoc2.html#section-2.2">Section 2.2: Quick Start for MASM Users</a><br>
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<a href="nasmdoc2.html#section-2.2.1">Section 2.2.1: NASM Is Case-Sensitive</a><br>
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<a href="nasmdoc2.html#section-2.2.2">Section 2.2.2: NASM Requires Square Brackets For Memory References</a><br>
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<a href="nasmdoc2.html#section-2.2.3">Section 2.2.3: NASM Doesn't Store Variable Types</a><br>
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<a href="nasmdoc2.html#section-2.2.4">Section 2.2.4: NASM Doesn't <code><nobr>ASSUME</nobr></code></a><br>
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<a href="nasmdoc2.html#section-2.2.5">Section 2.2.5: NASM Doesn't Support Memory Models</a><br>
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<a href="nasmdoc2.html#section-2.2.6">Section 2.2.6: Floating-Point Differences</a><br>
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<a href="nasmdoc2.html#section-2.2.7">Section 2.2.7: Other Differences</a><br>
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<p><a href="nasmdoc3.html">Chapter 3: The NASM Language</a><br>
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<a href="nasmdoc3.html#section-3.1">Section 3.1: Layout of a NASM Source Line</a><br>
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<a href="nasmdoc3.html#section-3.2">Section 3.2: Pseudo-Instructions</a><br>
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<a href="nasmdoc3.html#section-3.2.1">Section 3.2.1: <code><nobr>DB</nobr></code> and friends: Declaring Initialised Data</a><br>
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<a href="nasmdoc3.html#section-3.2.2">Section 3.2.2: <code><nobr>RESB</nobr></code> and friends: Declaring Uninitialised Data</a><br>
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<a href="nasmdoc3.html#section-3.2.3">Section 3.2.3: <code><nobr>INCBIN</nobr></code>: Including External Binary Files</a><br>
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<a href="nasmdoc3.html#section-3.2.4">Section 3.2.4: <code><nobr>EQU</nobr></code>: Defining Constants</a><br>
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<a href="nasmdoc3.html#section-3.2.5">Section 3.2.5: <code><nobr>TIMES</nobr></code>: Repeating Instructions or Data</a><br>
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<a href="nasmdoc3.html#section-3.3">Section 3.3: Effective Addresses</a><br>
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<a href="nasmdoc3.html#section-3.4">Section 3.4: Constants</a><br>
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<a href="nasmdoc3.html#section-3.4.1">Section 3.4.1: Numeric Constants</a><br>
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<a href="nasmdoc3.html#section-3.4.2">Section 3.4.2: Character Constants</a><br>
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<a href="nasmdoc3.html#section-3.4.3">Section 3.4.3: String Constants</a><br>
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<a href="nasmdoc3.html#section-3.4.4">Section 3.4.4: Floating-Point Constants</a><br>
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<a href="nasmdoc3.html#section-3.5">Section 3.5: Expressions</a><br>
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<a href="nasmdoc3.html#section-3.5.1">Section 3.5.1: <code><nobr>|</nobr></code>: Bitwise OR Operator</a><br>
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<a href="nasmdoc3.html#section-3.5.2">Section 3.5.2: <code><nobr>^</nobr></code>: Bitwise XOR Operator</a><br>
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<a href="nasmdoc3.html#section-3.5.3">Section 3.5.3: <code><nobr>&</nobr></code>: Bitwise AND Operator</a><br>
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<a href="nasmdoc3.html#section-3.5.4">Section 3.5.4: <code><nobr><<</nobr></code> and <code><nobr>>></nobr></code>: Bit Shift Operators</a><br>
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<a href="nasmdoc3.html#section-3.5.5">Section 3.5.5: <code><nobr>+</nobr></code> and <code><nobr>-</nobr></code>: Addition and Subtraction Operators</a><br>
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<a href="nasmdoc3.html#section-3.5.6">Section 3.5.6: <code><nobr>*</nobr></code>, <code><nobr>/</nobr></code>, <code><nobr>//</nobr></code>, <code><nobr>%</nobr></code> and <code><nobr>%%</nobr></code>: Multiplication and Division</a><br>
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<a href="nasmdoc3.html#section-3.5.7">Section 3.5.7: Unary Operators: <code><nobr>+</nobr></code>, <code><nobr>-</nobr></code>, <code><nobr>~</nobr></code> and <code><nobr>SEG</nobr></code></a><br>
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<a href="nasmdoc3.html#section-3.6">Section 3.6: <code><nobr>SEG</nobr></code> and <code><nobr>WRT</nobr></code></a><br>
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<a href="nasmdoc3.html#section-3.7">Section 3.7: <code><nobr>STRICT</nobr></code>: Inhibiting Optimization</a><br>
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<a href="nasmdoc3.html#section-3.8">Section 3.8: Critical Expressions</a><br>
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<a href="nasmdoc3.html#section-3.9">Section 3.9: Local Labels</a><br>
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<p><a href="nasmdoc4.html">Chapter 4: The NASM Preprocessor</a><br>
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<a href="nasmdoc4.html#section-4.1">Section 4.1: Single-Line Macros</a><br>
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<a href="nasmdoc4.html#section-4.1.1">Section 4.1.1: The Normal Way: <code><nobr>%define</nobr></code></a><br>
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<a href="nasmdoc4.html#section-4.1.2">Section 4.1.2: Enhancing %define: <code><nobr>%xdefine</nobr></code></a><br>
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<a href="nasmdoc4.html#section-4.1.3">Section 4.1.3: Concatenating Single Line Macro Tokens: <code><nobr>%+</nobr></code></a><br>
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<a href="nasmdoc4.html#section-4.1.4">Section 4.1.4: Undefining macros: <code><nobr>%undef</nobr></code></a><br>
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<a href="nasmdoc4.html#section-4.1.5">Section 4.1.5: Preprocessor Variables: <code><nobr>%assign</nobr></code></a><br>
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<a href="nasmdoc4.html#section-4.2">Section 4.2: String Handling in Macros: <code><nobr>%strlen</nobr></code> and <code><nobr>%substr</nobr></code></a><br>
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<a href="nasmdoc4.html#section-4.2.1">Section 4.2.1: String Length: <code><nobr>%strlen</nobr></code></a><br>
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<a href="nasmdoc4.html#section-4.2.2">Section 4.2.2: Sub-strings: <code><nobr>%substr</nobr></code></a><br>
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<a href="nasmdoc4.html#section-4.3">Section 4.3: Multi-Line Macros: <code><nobr>%macro</nobr></code></a><br>
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<a href="nasmdoc4.html#section-4.3.1">Section 4.3.1: Overloading Multi-Line Macros</a><br>
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<a href="nasmdoc4.html#section-4.3.2">Section 4.3.2: Macro-Local Labels</a><br>
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<a href="nasmdoc4.html#section-4.3.3">Section 4.3.3: Greedy Macro Parameters</a><br>
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<a href="nasmdoc4.html#section-4.3.4">Section 4.3.4: Default Macro Parameters</a><br>
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<a href="nasmdoc4.html#section-4.3.5">Section 4.3.5: <code><nobr>%0</nobr></code>: Macro Parameter Counter</a><br>
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<a href="nasmdoc4.html#section-4.3.6">Section 4.3.6: <code><nobr>%rotate</nobr></code>: Rotating Macro Parameters</a><br>
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<a href="nasmdoc4.html#section-4.3.7">Section 4.3.7: Concatenating Macro Parameters</a><br>
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<a href="nasmdoc4.html#section-4.3.8">Section 4.3.8: Condition Codes as Macro Parameters</a><br>
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<a href="nasmdoc4.html#section-4.3.9">Section 4.3.9: Disabling Listing Expansion</a><br>
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<a href="nasmdoc4.html#section-4.4">Section 4.4: Conditional Assembly</a><br>
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<a href="nasmdoc4.html#section-4.4.1">Section 4.4.1: <code><nobr>%ifdef</nobr></code>: Testing Single-Line Macro Existence</a><br>
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<a href="nasmdoc4.html#section-4.4.2">Section 4.4.2: <code><nobr>ifmacro</nobr></code>: Testing Multi-Line Macro Existence</a><br>
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<a href="nasmdoc4.html#section-4.4.3">Section 4.4.3: <code><nobr>%ifctx</nobr></code>: Testing the Context Stack</a><br>
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<a href="nasmdoc4.html#section-4.4.4">Section 4.4.4: <code><nobr>%if</nobr></code>: Testing Arbitrary Numeric Expressions</a><br>
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<a href="nasmdoc4.html#section-4.4.5">Section 4.4.5: <code><nobr>%ifidn</nobr></code> and <code><nobr>%ifidni</nobr></code>: Testing Exact Text Identity</a><br>
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<a href="nasmdoc4.html#section-4.4.6">Section 4.4.6: <code><nobr>%ifid</nobr></code>, <code><nobr>%ifnum</nobr></code>, <code><nobr>%ifstr</nobr></code>: Testing Token Types</a><br>
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<a href="nasmdoc4.html#section-4.4.7">Section 4.4.7: <code><nobr>%error</nobr></code>: Reporting User-Defined Errors</a><br>
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<a href="nasmdoc4.html#section-4.5">Section 4.5: Preprocessor Loops: <code><nobr>%rep</nobr></code></a><br>
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<a href="nasmdoc4.html#section-4.6">Section 4.6: Including Other Files</a><br>
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<a href="nasmdoc4.html#section-4.7">Section 4.7: The Context Stack</a><br>
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<a href="nasmdoc4.html#section-4.7.1">Section 4.7.1: <code><nobr>%push</nobr></code> and <code><nobr>%pop</nobr></code>: Creating and Removing Contexts</a><br>
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<a href="nasmdoc4.html#section-4.7.2">Section 4.7.2: Context-Local Labels</a><br>
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<a href="nasmdoc4.html#section-4.7.3">Section 4.7.3: Context-Local Single-Line Macros</a><br>
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<a href="nasmdoc4.html#section-4.7.4">Section 4.7.4: <code><nobr>%repl</nobr></code>: Renaming a Context</a><br>
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<a href="nasmdoc4.html#section-4.7.5">Section 4.7.5: Example Use of the Context Stack: Block IFs</a><br>
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<a href="nasmdoc4.html#section-4.8">Section 4.8: Standard Macros</a><br>
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<a href="nasmdoc4.html#section-4.8.1">Section 4.8.1: <code><nobr>__NASM_MAJOR__</nobr></code>, <code><nobr>__NASM_MINOR__</nobr></code>, <code><nobr>__NASM_SUBMINOR__</nobr></code> and <code><nobr>___NASM_PATCHLEVEL__</nobr></code>: NASM Version</a><br>
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<a href="nasmdoc4.html#section-4.8.2">Section 4.8.2: <code><nobr>__NASM_VERSION_ID__</nobr></code>: NASM Version ID</a><br>
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<a href="nasmdoc4.html#section-4.8.3">Section 4.8.3: <code><nobr>__NASM_VER__</nobr></code>: NASM Version string</a><br>
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<a href="nasmdoc4.html#section-4.8.4">Section 4.8.4: <code><nobr>__FILE__</nobr></code> and <code><nobr>__LINE__</nobr></code>: File Name and Line Number</a><br>
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<a href="nasmdoc4.html#section-4.8.5">Section 4.8.5: <code><nobr>STRUC</nobr></code> and <code><nobr>ENDSTRUC</nobr></code>: Declaring Structure Data Types</a><br>
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<a href="nasmdoc4.html#section-4.8.6">Section 4.8.6: <code><nobr>ISTRUC</nobr></code>, <code><nobr>AT</nobr></code> and <code><nobr>IEND</nobr></code>: Declaring Instances of Structures</a><br>
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<a href="nasmdoc4.html#section-4.8.7">Section 4.8.7: <code><nobr>ALIGN</nobr></code> and <code><nobr>ALIGNB</nobr></code>: Data Alignment</a><br>
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<a href="nasmdoc4.html#section-4.9">Section 4.9: TASM Compatible Preprocessor Directives</a><br>
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<a href="nasmdoc4.html#section-4.9.1">Section 4.9.1: <code><nobr>%arg</nobr></code> Directive</a><br>
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<a href="nasmdoc4.html#section-4.9.2">Section 4.9.2: <code><nobr>%stacksize</nobr></code> Directive</a><br>
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<a href="nasmdoc4.html#section-4.9.3">Section 4.9.3: <code><nobr>%local</nobr></code> Directive</a><br>
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<a href="nasmdoc4.html#section-4.10">Section 4.10: Other Preprocessor Directives</a><br>
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<a href="nasmdoc4.html#section-4.10.1">Section 4.10.1: <code><nobr>%line</nobr></code> Directive</a><br>
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<a href="nasmdoc4.html#section-4.10.2">Section 4.10.2: <code><nobr>%!</nobr></code><code><nobr><env></nobr></code>: Read an environment variable.</a><br>
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<p><a href="nasmdoc5.html">Chapter 5: Assembler Directives</a><br>
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<a href="nasmdoc5.html#section-5.1">Section 5.1: <code><nobr>BITS</nobr></code>: Specifying Target Processor Mode</a><br>
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<a href="nasmdoc5.html#section-5.1.1">Section 5.1.1: <code><nobr>USE16</nobr></code> & <code><nobr>USE32</nobr></code>: Aliases for BITS</a><br>
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<a href="nasmdoc5.html#section-5.2">Section 5.2: <code><nobr>SECTION</nobr></code> or <code><nobr>SEGMENT</nobr></code>: Changing and Defining Sections</a><br>
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<a href="nasmdoc5.html#section-5.2.1">Section 5.2.1: The <code><nobr>__SECT__</nobr></code> Macro</a><br>
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<a href="nasmdoc5.html#section-5.3">Section 5.3: <code><nobr>ABSOLUTE</nobr></code>: Defining Absolute Labels</a><br>
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<a href="nasmdoc5.html#section-5.4">Section 5.4: <code><nobr>EXTERN</nobr></code>: Importing Symbols from Other Modules</a><br>
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<a href="nasmdoc5.html#section-5.5">Section 5.5: <code><nobr>GLOBAL</nobr></code>: Exporting Symbols to Other Modules</a><br>
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<a href="nasmdoc5.html#section-5.6">Section 5.6: <code><nobr>COMMON</nobr></code>: Defining Common Data Areas</a><br>
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<a href="nasmdoc5.html#section-5.7">Section 5.7: <code><nobr>CPU</nobr></code>: Defining CPU Dependencies</a><br>
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<p><a href="nasmdoc6.html">Chapter 6: Output Formats</a><br>
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<a href="nasmdoc6.html#section-6.1">Section 6.1: <code><nobr>bin</nobr></code>: Flat-Form Binary Output</a><br>
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<a href="nasmdoc6.html#section-6.1.1">Section 6.1.1: <code><nobr>ORG</nobr></code>: Binary File Program Origin</a><br>
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<a href="nasmdoc6.html#section-6.1.2">Section 6.1.2: <code><nobr>bin</nobr></code> Extensions to the <code><nobr>SECTION</nobr></code> Directive</a><br>
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<a href="nasmdoc6.html#section-6.1.3">Section 6.1.3: <code><nobr>Multisection</nobr></code> support for the BIN format.</a><br>
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<a href="nasmdoc6.html#section-6.1.4">Section 6.1.4: Map files</a><br>
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<a href="nasmdoc6.html#section-6.2">Section 6.2: <code><nobr>obj</nobr></code>: Microsoft OMF Object Files</a><br>
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<a href="nasmdoc6.html#section-6.2.1">Section 6.2.1: <code><nobr>obj</nobr></code> Extensions to the <code><nobr>SEGMENT</nobr></code> Directive</a><br>
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<a href="nasmdoc6.html#section-6.2.2">Section 6.2.2: <code><nobr>GROUP</nobr></code>: Defining Groups of Segments</a><br>
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<a href="nasmdoc6.html#section-6.2.3">Section 6.2.3: <code><nobr>UPPERCASE</nobr></code>: Disabling Case Sensitivity in Output</a><br>
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<a href="nasmdoc6.html#section-6.2.4">Section 6.2.4: <code><nobr>IMPORT</nobr></code>: Importing DLL Symbols</a><br>
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<a href="nasmdoc6.html#section-6.2.5">Section 6.2.5: <code><nobr>EXPORT</nobr></code>: Exporting DLL Symbols</a><br>
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<a href="nasmdoc6.html#section-6.2.6">Section 6.2.6: <code><nobr>..start</nobr></code>: Defining the Program Entry Point</a><br>
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<a href="nasmdoc6.html#section-6.2.7">Section 6.2.7: <code><nobr>obj</nobr></code> Extensions to the <code><nobr>EXTERN</nobr></code> Directive</a><br>
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<a href="nasmdoc6.html#section-6.2.8">Section 6.2.8: <code><nobr>obj</nobr></code> Extensions to the <code><nobr>COMMON</nobr></code> Directive</a><br>
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<a href="nasmdoc6.html#section-6.3">Section 6.3: <code><nobr>win32</nobr></code>: Microsoft Win32 Object Files</a><br>
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<a href="nasmdoc6.html#section-6.3.1">Section 6.3.1: <code><nobr>win32</nobr></code> Extensions to the <code><nobr>SECTION</nobr></code> Directive</a><br>
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<a href="nasmdoc6.html#section-6.4">Section 6.4: <code><nobr>coff</nobr></code>: Common Object File Format</a><br>
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<a href="nasmdoc6.html#section-6.5">Section 6.5: <code><nobr>elf</nobr></code>: Executable and Linkable Format Object Files</a><br>
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<a href="nasmdoc6.html#section-6.5.1">Section 6.5.1: <code><nobr>elf</nobr></code> Extensions to the <code><nobr>SECTION</nobr></code> Directive</a><br>
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<a href="nasmdoc6.html#section-6.5.2">Section 6.5.2: Position-Independent Code: <code><nobr>elf</nobr></code> Special Symbols and <code><nobr>WRT</nobr></code></a><br>
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<a href="nasmdoc6.html#section-6.5.3">Section 6.5.3: <code><nobr>elf</nobr></code> Extensions to the <code><nobr>GLOBAL</nobr></code> Directive</a><br>
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<a href="nasmdoc6.html#section-6.5.4">Section 6.5.4: <code><nobr>elf</nobr></code> Extensions to the <code><nobr>COMMON</nobr></code> Directive </a><br>
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<a href="nasmdoc6.html#section-6.5.5">Section 6.5.5: 16-bit code and ELF </a><br>
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<a href="nasmdoc6.html#section-6.6">Section 6.6: <code><nobr>aout</nobr></code>: Linux <code><nobr>a.out</nobr></code> Object Files</a><br>
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<a href="nasmdoc6.html#section-6.7">Section 6.7: <code><nobr>aoutb</nobr></code>: NetBSD/FreeBSD/OpenBSD <code><nobr>a.out</nobr></code> Object Files</a><br>
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<a href="nasmdoc6.html#section-6.8">Section 6.8: <code><nobr>as86</nobr></code>: Minix/Linux <code><nobr>as86</nobr></code> Object Files</a><br>
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<a href="nasmdoc6.html#section-6.9">Section 6.9: <code><nobr>rdf</nobr></code>: Relocatable Dynamic Object File Format</a><br>
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<a href="nasmdoc6.html#section-6.9.1">Section 6.9.1: Requiring a Library: The <code><nobr>LIBRARY</nobr></code> Directive</a><br>
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<a href="nasmdoc6.html#section-6.9.2">Section 6.9.2: Specifying a Module Name: The <code><nobr>MODULE</nobr></code> Directive</a><br>
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<a href="nasmdoc6.html#section-6.9.3">Section 6.9.3: <code><nobr>rdf</nobr></code> Extensions to the <code><nobr>GLOBAL</nobr></code> directive</a><br>
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<a href="nasmdoc6.html#section-6.10">Section 6.10: <code><nobr>dbg</nobr></code>: Debugging Format</a><br>
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<p><a href="nasmdoc7.html">Chapter 7: Writing 16-bit Code (DOS, Windows 3/3.1)</a><br>
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<a href="nasmdoc7.html#section-7.1">Section 7.1: Producing <code><nobr>.EXE</nobr></code> Files</a><br>
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<a href="nasmdoc7.html#section-7.1.1">Section 7.1.1: Using the <code><nobr>obj</nobr></code> Format To Generate <code><nobr>.EXE</nobr></code> Files</a><br>
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<a href="nasmdoc7.html#section-7.1.2">Section 7.1.2: Using the <code><nobr>bin</nobr></code> Format To Generate <code><nobr>.EXE</nobr></code> Files</a><br>
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<a href="nasmdoc7.html#section-7.2">Section 7.2: Producing <code><nobr>.COM</nobr></code> Files</a><br>
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<a href="nasmdoc7.html#section-7.2.1">Section 7.2.1: Using the <code><nobr>bin</nobr></code> Format To Generate <code><nobr>.COM</nobr></code> Files</a><br>
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<a href="nasmdoc7.html#section-7.2.2">Section 7.2.2: Using the <code><nobr>obj</nobr></code> Format To Generate <code><nobr>.COM</nobr></code> Files</a><br>
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<a href="nasmdoc7.html#section-7.3">Section 7.3: Producing <code><nobr>.SYS</nobr></code> Files</a><br>
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<a href="nasmdoc7.html#section-7.4">Section 7.4: Interfacing to 16-bit C Programs</a><br>
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<a href="nasmdoc7.html#section-7.4.1">Section 7.4.1: External Symbol Names</a><br>
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<a href="nasmdoc7.html#section-7.4.2">Section 7.4.2: Memory Models</a><br>
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<a href="nasmdoc7.html#section-7.4.3">Section 7.4.3: Function Definitions and Function Calls</a><br>
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<a href="nasmdoc7.html#section-7.4.4">Section 7.4.4: Accessing Data Items</a><br>
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<a href="nasmdoc7.html#section-7.4.5">Section 7.4.5: <code><nobr>c16.mac</nobr></code>: Helper Macros for the 16-bit C Interface</a><br>
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<a href="nasmdoc7.html#section-7.5">Section 7.5: Interfacing to Borland Pascal Programs</a><br>
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<a href="nasmdoc7.html#section-7.5.1">Section 7.5.1: The Pascal Calling Convention</a><br>
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<a href="nasmdoc7.html#section-7.5.2">Section 7.5.2: Borland Pascal Segment Name Restrictions</a><br>
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<a href="nasmdoc7.html#section-7.5.3">Section 7.5.3: Using <code><nobr>c16.mac</nobr></code> With Pascal Programs</a><br>
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<p><a href="nasmdoc8.html">Chapter 8: Writing 32-bit Code (Unix, Win32, DJGPP)</a><br>
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<a href="nasmdoc8.html#section-8.1">Section 8.1: Interfacing to 32-bit C Programs</a><br>
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<a href="nasmdoc8.html#section-8.1.1">Section 8.1.1: External Symbol Names</a><br>
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<a href="nasmdoc8.html#section-8.1.2">Section 8.1.2: Function Definitions and Function Calls</a><br>
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<a href="nasmdoc8.html#section-8.1.3">Section 8.1.3: Accessing Data Items</a><br>
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<a href="nasmdoc8.html#section-8.1.4">Section 8.1.4: <code><nobr>c32.mac</nobr></code>: Helper Macros for the 32-bit C Interface</a><br>
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<a href="nasmdoc8.html#section-8.2">Section 8.2: Writing NetBSD/FreeBSD/OpenBSD and Linux/ELF Shared Libraries</a><br>
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<a href="nasmdoc8.html#section-8.2.1">Section 8.2.1: Obtaining the Address of the GOT</a><br>
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<a href="nasmdoc8.html#section-8.2.2">Section 8.2.2: Finding Your Local Data Items</a><br>
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<a href="nasmdoc8.html#section-8.2.3">Section 8.2.3: Finding External and Common Data Items</a><br>
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<a href="nasmdoc8.html#section-8.2.4">Section 8.2.4: Exporting Symbols to the Library User</a><br>
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<a href="nasmdoc8.html#section-8.2.5">Section 8.2.5: Calling Procedures Outside the Library</a><br>
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<a href="nasmdoc8.html#section-8.2.6">Section 8.2.6: Generating the Library File</a><br>
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<p><a href="nasmdoc9.html">Chapter 9: Mixing 16 and 32 Bit Code</a><br>
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<a href="nasmdoc9.html#section-9.1">Section 9.1: Mixed-Size Jumps</a><br>
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<a href="nasmdoc9.html#section-9.2">Section 9.2: Addressing Between Different-Size Segments</a><br>
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<a href="nasmdoc9.html#section-9.3">Section 9.3: Other Mixed-Size Instructions</a><br>
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<p><a href="nasmdo10.html">Chapter 10: Troubleshooting</a><br>
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<a href="nasmdo10.html#section-10.1">Section 10.1: Common Problems</a><br>
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<a href="nasmdo10.html#section-10.1.1">Section 10.1.1: NASM Generates Inefficient Code</a><br>
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<a href="nasmdo10.html#section-10.1.2">Section 10.1.2: My Jumps are Out of Range</a><br>
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<a href="nasmdo10.html#section-10.1.3">Section 10.1.3: <code><nobr>ORG</nobr></code> Doesn't Work</a><br>
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<a href="nasmdo10.html#section-10.1.4">Section 10.1.4: <code><nobr>TIMES</nobr></code> Doesn't Work</a><br>
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<a href="nasmdo10.html#section-10.2">Section 10.2: Bugs</a><br>
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<p><a href="nasmdoca.html">Appendix A: Ndisasm</a><br>
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<a href="nasmdoca.html#section-A.1">Section A.1: Introduction</a><br>
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<a href="nasmdoca.html#section-A.2">Section A.2: Getting Started: Installation</a><br>
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<a href="nasmdoca.html#section-A.3">Section A.3: Running NDISASM</a><br>
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<a href="nasmdoca.html#section-A.3.1">Section A.3.1: COM Files: Specifying an Origin</a><br>
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<a href="nasmdoca.html#section-A.3.2">Section A.3.2: Code Following Data: Synchronisation</a><br>
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<a href="nasmdoca.html#section-A.3.3">Section A.3.3: Mixed Code and Data: Automatic (Intelligent) Synchronisation </a><br>
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<a href="nasmdoca.html#section-A.3.4">Section A.3.4: Other Options</a><br>
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<a href="nasmdoca.html#section-A.4">Section A.4: Bugs and Improvements</a><br>
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<p><a href="nasmdocb.html">Appendix B: x86 Instruction Reference</a><br>
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<a href="nasmdocb.html#section-B.1">Section B.1: Key to Operand Specifications</a><br>
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<a href="nasmdocb.html#section-B.2">Section B.2: Key to Opcode Descriptions</a><br>
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<a href="nasmdocb.html#section-B.2.1">Section B.2.1: Register Values</a><br>
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<a href="nasmdocb.html#section-B.2.2">Section B.2.2: Condition Codes</a><br>
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<a href="nasmdocb.html#section-B.2.3">Section B.2.3: SSE Condition Predicates</a><br>
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<a href="nasmdocb.html#section-B.2.4">Section B.2.4: Status Flags</a><br>
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<a href="nasmdocb.html#section-B.2.5">Section B.2.5: Effective Address Encoding: ModR/M and SIB</a><br>
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<a href="nasmdocb.html#section-B.3">Section B.3: Key to Instruction Flags</a><br>
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<a href="nasmdocb.html#section-B.4">Section B.4: x86 Instruction Set</a><br>
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<a href="nasmdocb.html#section-B.4.1">Section B.4.1: <code><nobr>AAA</nobr></code>, <code><nobr>AAS</nobr></code>, <code><nobr>AAM</nobr></code>, <code><nobr>AAD</nobr></code>: ASCII Adjustments</a><br>
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<a href="nasmdocb.html#section-B.4.2">Section B.4.2: <code><nobr>ADC</nobr></code>: Add with Carry</a><br>
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<a href="nasmdocb.html#section-B.4.3">Section B.4.3: <code><nobr>ADD</nobr></code>: Add Integers</a><br>
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<a href="nasmdocb.html#section-B.4.4">Section B.4.4: <code><nobr>ADDPD</nobr></code>: ADD Packed Double-Precision FP Values</a><br>
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<a href="nasmdocb.html#section-B.4.5">Section B.4.5: <code><nobr>ADDPS</nobr></code>: ADD Packed Single-Precision FP Values</a><br>
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<a href="nasmdocb.html#section-B.4.6">Section B.4.6: <code><nobr>ADDSD</nobr></code>: ADD Scalar Double-Precision FP Values</a><br>
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<a href="nasmdocb.html#section-B.4.7">Section B.4.7: <code><nobr>ADDSS</nobr></code>: ADD Scalar Single-Precision FP Values</a><br>
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<a href="nasmdocb.html#section-B.4.8">Section B.4.8: <code><nobr>AND</nobr></code>: Bitwise AND</a><br>
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<a href="nasmdocb.html#section-B.4.9">Section B.4.9: <code><nobr>ANDNPD</nobr></code>: Bitwise Logical AND NOT of Packed Double-Precision FP Values</a><br>
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<a href="nasmdocb.html#section-B.4.10">Section B.4.10: <code><nobr>ANDNPS</nobr></code>: Bitwise Logical AND NOT of Packed Single-Precision FP Values</a><br>
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<a href="nasmdocb.html#section-B.4.11">Section B.4.11: <code><nobr>ANDPD</nobr></code>: Bitwise Logical AND For Single FP</a><br>
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<a href="nasmdocb.html#section-B.4.12">Section B.4.12: <code><nobr>ANDPS</nobr></code>: Bitwise Logical AND For Single FP</a><br>
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<a href="nasmdocb.html#section-B.4.13">Section B.4.13: <code><nobr>ARPL</nobr></code>: Adjust RPL Field of Selector</a><br>
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<a href="nasmdocb.html#section-B.4.14">Section B.4.14: <code><nobr>BOUND</nobr></code>: Check Array Index against Bounds</a><br>
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<a href="nasmdocb.html#section-B.4.15">Section B.4.15: <code><nobr>BSF</nobr></code>, <code><nobr>BSR</nobr></code>: Bit Scan</a><br>
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<a href="nasmdocb.html#section-B.4.16">Section B.4.16: <code><nobr>BSWAP</nobr></code>: Byte Swap</a><br>
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<a href="nasmdocb.html#section-B.4.17">Section B.4.17: <code><nobr>BT</nobr></code>, <code><nobr>BTC</nobr></code>, <code><nobr>BTR</nobr></code>, <code><nobr>BTS</nobr></code>: Bit Test</a><br>
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<a href="nasmdocb.html#section-B.4.18">Section B.4.18: <code><nobr>CALL</nobr></code>: Call Subroutine</a><br>
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<a href="nasmdocb.html#section-B.4.19">Section B.4.19: <code><nobr>CBW</nobr></code>, <code><nobr>CWD</nobr></code>, <code><nobr>CDQ</nobr></code>, <code><nobr>CWDE</nobr></code>: Sign Extensions</a><br>
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<a href="nasmdocb.html#section-B.4.20">Section B.4.20: <code><nobr>CLC</nobr></code>, <code><nobr>CLD</nobr></code>, <code><nobr>CLI</nobr></code>, <code><nobr>CLTS</nobr></code>: Clear Flags</a><br>
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<a href="nasmdocb.html#section-B.4.21">Section B.4.21: <code><nobr>CLFLUSH</nobr></code>: Flush Cache Line</a><br>
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<a href="nasmdocb.html#section-B.4.22">Section B.4.22: <code><nobr>CMC</nobr></code>: Complement Carry Flag</a><br>
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<a href="nasmdocb.html#section-B.4.23">Section B.4.23: <code><nobr>CMOVcc</nobr></code>: Conditional Move</a><br>
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<a href="nasmdocb.html#section-B.4.24">Section B.4.24: <code><nobr>CMP</nobr></code>: Compare Integers</a><br>
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<a href="nasmdocb.html#section-B.4.25">Section B.4.25: <code><nobr>CMPccPD</nobr></code>: Packed Double-Precision FP Compare </a><br>
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<a href="nasmdocb.html#section-B.4.26">Section B.4.26: <code><nobr>CMPccPS</nobr></code>: Packed Single-Precision FP Compare </a><br>
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<a href="nasmdocb.html#section-B.4.27">Section B.4.27: <code><nobr>CMPSB</nobr></code>, <code><nobr>CMPSW</nobr></code>, <code><nobr>CMPSD</nobr></code>: Compare Strings</a><br>
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<a href="nasmdocb.html#section-B.4.28">Section B.4.28: <code><nobr>CMPccSD</nobr></code>: Scalar Double-Precision FP Compare </a><br>
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<a href="nasmdocb.html#section-B.4.29">Section B.4.29: <code><nobr>CMPccSS</nobr></code>: Scalar Single-Precision FP Compare </a><br>
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<a href="nasmdocb.html#section-B.4.30">Section B.4.30: <code><nobr>CMPXCHG</nobr></code>, <code><nobr>CMPXCHG486</nobr></code>: Compare and Exchange</a><br>
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<a href="nasmdocb.html#section-B.4.31">Section B.4.31: <code><nobr>CMPXCHG8B</nobr></code>: Compare and Exchange Eight Bytes</a><br>
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<a href="nasmdocb.html#section-B.4.32">Section B.4.32: <code><nobr>COMISD</nobr></code>: Scalar Ordered Double-Precision FP Compare and Set EFLAGS</a><br>
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<a href="nasmdocb.html#section-B.4.33">Section B.4.33: <code><nobr>COMISS</nobr></code>: Scalar Ordered Single-Precision FP Compare and Set EFLAGS</a><br>
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<a href="nasmdocb.html#section-B.4.34">Section B.4.34: <code><nobr>CPUID</nobr></code>: Get CPU Identification Code</a><br>
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<a href="nasmdocb.html#section-B.4.35">Section B.4.35: <code><nobr>CVTDQ2PD</nobr></code>: Packed Signed INT32 to Packed Double-Precision FP Conversion</a><br>
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<a href="nasmdocb.html#section-B.4.36">Section B.4.36: <code><nobr>CVTDQ2PS</nobr></code>: Packed Signed INT32 to Packed Single-Precision FP Conversion</a><br>
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<a href="nasmdocb.html#section-B.4.37">Section B.4.37: <code><nobr>CVTPD2DQ</nobr></code>: Packed Double-Precision FP to Packed Signed INT32 Conversion</a><br>
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<a href="nasmdocb.html#section-B.4.38">Section B.4.38: <code><nobr>CVTPD2PI</nobr></code>: Packed Double-Precision FP to Packed Signed INT32 Conversion</a><br>
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<a href="nasmdocb.html#section-B.4.39">Section B.4.39: <code><nobr>CVTPD2PS</nobr></code>: Packed Double-Precision FP to Packed Single-Precision FP Conversion</a><br>
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<a href="nasmdocb.html#section-B.4.40">Section B.4.40: <code><nobr>CVTPI2PD</nobr></code>: Packed Signed INT32 to Packed Double-Precision FP Conversion</a><br>
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<a href="nasmdocb.html#section-B.4.41">Section B.4.41: <code><nobr>CVTPI2PS</nobr></code>: Packed Signed INT32 to Packed Single-FP Conversion</a><br>
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<a href="nasmdocb.html#section-B.4.42">Section B.4.42: <code><nobr>CVTPS2DQ</nobr></code>: Packed Single-Precision FP to Packed Signed INT32 Conversion</a><br>
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<a href="nasmdocb.html#section-B.4.43">Section B.4.43: <code><nobr>CVTPS2PD</nobr></code>: Packed Single-Precision FP to Packed Double-Precision FP Conversion</a><br>
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<a href="nasmdocb.html#section-B.4.44">Section B.4.44: <code><nobr>CVTPS2PI</nobr></code>: Packed Single-Precision FP to Packed Signed INT32 Conversion</a><br>
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<a href="nasmdocb.html#section-B.4.45">Section B.4.45: <code><nobr>CVTSD2SI</nobr></code>: Scalar Double-Precision FP to Signed INT32 Conversion</a><br>
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<a href="nasmdocb.html#section-B.4.46">Section B.4.46: <code><nobr>CVTSD2SS</nobr></code>: Scalar Double-Precision FP to Scalar Single-Precision FP Conversion</a><br>
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<a href="nasmdocb.html#section-B.4.47">Section B.4.47: <code><nobr>CVTSI2SD</nobr></code>: Signed INT32 to Scalar Double-Precision FP Conversion</a><br>
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<a href="nasmdocb.html#section-B.4.48">Section B.4.48: <code><nobr>CVTSI2SS</nobr></code>: Signed INT32 to Scalar Single-Precision FP Conversion</a><br>
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<a href="nasmdocb.html#section-B.4.49">Section B.4.49: <code><nobr>CVTSS2SD</nobr></code>: Scalar Single-Precision FP to Scalar Double-Precision FP Conversion</a><br>
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<a href="nasmdocb.html#section-B.4.50">Section B.4.50: <code><nobr>CVTSS2SI</nobr></code>: Scalar Single-Precision FP to Signed INT32 Conversion</a><br>
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<a href="nasmdocb.html#section-B.4.51">Section B.4.51: <code><nobr>CVTTPD2DQ</nobr></code>: Packed Double-Precision FP to Packed Signed INT32 Conversion with Truncation</a><br>
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<a href="nasmdocb.html#section-B.4.52">Section B.4.52: <code><nobr>CVTTPD2PI</nobr></code>: Packed Double-Precision FP to Packed Signed INT32 Conversion with Truncation</a><br>
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<a href="nasmdocb.html#section-B.4.53">Section B.4.53: <code><nobr>CVTTPS2DQ</nobr></code>: Packed Single-Precision FP to Packed Signed INT32 Conversion with Truncation</a><br>
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<a href="nasmdocb.html#section-B.4.54">Section B.4.54: <code><nobr>CVTTPS2PI</nobr></code>: Packed Single-Precision FP to Packed Signed INT32 Conversion with Truncation</a><br>
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<a href="nasmdocb.html#section-B.4.55">Section B.4.55: <code><nobr>CVTTSD2SI</nobr></code>: Scalar Double-Precision FP to Signed INT32 Conversion with Truncation</a><br>
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<a href="nasmdocb.html#section-B.4.56">Section B.4.56: <code><nobr>CVTTSS2SI</nobr></code>: Scalar Single-Precision FP to Signed INT32 Conversion with Truncation</a><br>
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<a href="nasmdocb.html#section-B.4.57">Section B.4.57: <code><nobr>DAA</nobr></code>, <code><nobr>DAS</nobr></code>: Decimal Adjustments</a><br>
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<a href="nasmdocb.html#section-B.4.58">Section B.4.58: <code><nobr>DEC</nobr></code>: Decrement Integer</a><br>
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<a href="nasmdocb.html#section-B.4.59">Section B.4.59: <code><nobr>DIV</nobr></code>: Unsigned Integer Divide</a><br>
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<a href="nasmdocb.html#section-B.4.60">Section B.4.60: <code><nobr>DIVPD</nobr></code>: Packed Double-Precision FP Divide</a><br>
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<a href="nasmdocb.html#section-B.4.61">Section B.4.61: <code><nobr>DIVPS</nobr></code>: Packed Single-Precision FP Divide</a><br>
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<a href="nasmdocb.html#section-B.4.62">Section B.4.62: <code><nobr>DIVSD</nobr></code>: Scalar Double-Precision FP Divide</a><br>
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<a href="nasmdocb.html#section-B.4.63">Section B.4.63: <code><nobr>DIVSS</nobr></code>: Scalar Single-Precision FP Divide</a><br>
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<a href="nasmdocb.html#section-B.4.64">Section B.4.64: <code><nobr>EMMS</nobr></code>: Empty MMX State</a><br>
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<a href="nasmdocb.html#section-B.4.65">Section B.4.65: <code><nobr>ENTER</nobr></code>: Create Stack Frame</a><br>
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<a href="nasmdocb.html#section-B.4.66">Section B.4.66: <code><nobr>F2XM1</nobr></code>: Calculate 2**X-1</a><br>
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<a href="nasmdocb.html#section-B.4.67">Section B.4.67: <code><nobr>FABS</nobr></code>: Floating-Point Absolute Value</a><br>
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<a href="nasmdocb.html#section-B.4.68">Section B.4.68: <code><nobr>FADD</nobr></code>, <code><nobr>FADDP</nobr></code>: Floating-Point Addition</a><br>
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<a href="nasmdocb.html#section-B.4.69">Section B.4.69: <code><nobr>FBLD</nobr></code>, <code><nobr>FBSTP</nobr></code>: BCD Floating-Point Load and Store</a><br>
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<a href="nasmdocb.html#section-B.4.70">Section B.4.70: <code><nobr>FCHS</nobr></code>: Floating-Point Change Sign</a><br>
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<a href="nasmdocb.html#section-B.4.71">Section B.4.71: <code><nobr>FCLEX</nobr></code>, <code><nobr>FNCLEX</nobr></code>: Clear Floating-Point Exceptions</a><br>
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<a href="nasmdocb.html#section-B.4.72">Section B.4.72: <code><nobr>FCMOVcc</nobr></code>: Floating-Point Conditional Move</a><br>
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<a href="nasmdocb.html#section-B.4.73">Section B.4.73: <code><nobr>FCOM</nobr></code>, <code><nobr>FCOMP</nobr></code>, <code><nobr>FCOMPP</nobr></code>, <code><nobr>FCOMI</nobr></code>, <code><nobr>FCOMIP</nobr></code>: Floating-Point Compare</a><br>
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<a href="nasmdocb.html#section-B.4.74">Section B.4.74: <code><nobr>FCOS</nobr></code>: Cosine</a><br>
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<a href="nasmdocb.html#section-B.4.75">Section B.4.75: <code><nobr>FDECSTP</nobr></code>: Decrement Floating-Point Stack Pointer</a><br>
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<a href="nasmdocb.html#section-B.4.76">Section B.4.76: <code><nobr>FxDISI</nobr></code>, <code><nobr>FxENI</nobr></code>: Disable and Enable Floating-Point Interrupts</a><br>
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<a href="nasmdocb.html#section-B.4.77">Section B.4.77: <code><nobr>FDIV</nobr></code>, <code><nobr>FDIVP</nobr></code>, <code><nobr>FDIVR</nobr></code>, <code><nobr>FDIVRP</nobr></code>: Floating-Point Division</a><br>
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<a href="nasmdocb.html#section-B.4.78">Section B.4.78: <code><nobr>FEMMS</nobr></code>: Faster Enter/Exit of the MMX or floating-point state</a><br>
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<a href="nasmdocb.html#section-B.4.79">Section B.4.79: <code><nobr>FFREE</nobr></code>: Flag Floating-Point Register as Unused</a><br>
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<a href="nasmdocb.html#section-B.4.80">Section B.4.80: <code><nobr>FIADD</nobr></code>: Floating-Point/Integer Addition</a><br>
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<a href="nasmdocb.html#section-B.4.81">Section B.4.81: <code><nobr>FICOM</nobr></code>, <code><nobr>FICOMP</nobr></code>: Floating-Point/Integer Compare</a><br>
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<a href="nasmdocb.html#section-B.4.82">Section B.4.82: <code><nobr>FIDIV</nobr></code>, <code><nobr>FIDIVR</nobr></code>: Floating-Point/Integer Division</a><br>
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<a href="nasmdocb.html#section-B.4.83">Section B.4.83: <code><nobr>FILD</nobr></code>, <code><nobr>FIST</nobr></code>, <code><nobr>FISTP</nobr></code>: Floating-Point/Integer Conversion</a><br>
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<a href="nasmdocb.html#section-B.4.84">Section B.4.84: <code><nobr>FIMUL</nobr></code>: Floating-Point/Integer Multiplication</a><br>
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<a href="nasmdocb.html#section-B.4.85">Section B.4.85: <code><nobr>FINCSTP</nobr></code>: Increment Floating-Point Stack Pointer</a><br>
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<a href="nasmdocb.html#section-B.4.86">Section B.4.86: <code><nobr>FINIT</nobr></code>, <code><nobr>FNINIT</nobr></code>: Initialise Floating-Point Unit</a><br>
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<a href="nasmdocb.html#section-B.4.87">Section B.4.87: <code><nobr>FISUB</nobr></code>: Floating-Point/Integer Subtraction</a><br>
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<a href="nasmdocb.html#section-B.4.88">Section B.4.88: <code><nobr>FLD</nobr></code>: Floating-Point Load</a><br>
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<a href="nasmdocb.html#section-B.4.89">Section B.4.89: <code><nobr>FLDxx</nobr></code>: Floating-Point Load Constants</a><br>
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<a href="nasmdocb.html#section-B.4.90">Section B.4.90: <code><nobr>FLDCW</nobr></code>: Load Floating-Point Control Word</a><br>
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<a href="nasmdocb.html#section-B.4.91">Section B.4.91: <code><nobr>FLDENV</nobr></code>: Load Floating-Point Environment</a><br>
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<a href="nasmdocb.html#section-B.4.92">Section B.4.92: <code><nobr>FMUL</nobr></code>, <code><nobr>FMULP</nobr></code>: Floating-Point Multiply</a><br>
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<a href="nasmdocb.html#section-B.4.93">Section B.4.93: <code><nobr>FNOP</nobr></code>: Floating-Point No Operation</a><br>
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<a href="nasmdocb.html#section-B.4.94">Section B.4.94: <code><nobr>FPATAN</nobr></code>, <code><nobr>FPTAN</nobr></code>: Arctangent and Tangent</a><br>
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<a href="nasmdocb.html#section-B.4.95">Section B.4.95: <code><nobr>FPREM</nobr></code>, <code><nobr>FPREM1</nobr></code>: Floating-Point Partial Remainder</a><br>
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<a href="nasmdocb.html#section-B.4.96">Section B.4.96: <code><nobr>FRNDINT</nobr></code>: Floating-Point Round to Integer</a><br>
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<a href="nasmdocb.html#section-B.4.97">Section B.4.97: <code><nobr>FSAVE</nobr></code>, <code><nobr>FRSTOR</nobr></code>: Save/Restore Floating-Point State</a><br>
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<a href="nasmdocb.html#section-B.4.98">Section B.4.98: <code><nobr>FSCALE</nobr></code>: Scale Floating-Point Value by Power of Two</a><br>
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<a href="nasmdocb.html#section-B.4.99">Section B.4.99: <code><nobr>FSETPM</nobr></code>: Set Protected Mode</a><br>
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<a href="nasmdocb.html#section-B.4.100">Section B.4.100: <code><nobr>FSIN</nobr></code>, <code><nobr>FSINCOS</nobr></code>: Sine and Cosine</a><br>
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<a href="nasmdocb.html#section-B.4.101">Section B.4.101: <code><nobr>FSQRT</nobr></code>: Floating-Point Square Root</a><br>
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<a href="nasmdocb.html#section-B.4.102">Section B.4.102: <code><nobr>FST</nobr></code>, <code><nobr>FSTP</nobr></code>: Floating-Point Store</a><br>
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<a href="nasmdocb.html#section-B.4.103">Section B.4.103: <code><nobr>FSTCW</nobr></code>: Store Floating-Point Control Word</a><br>
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<a href="nasmdocb.html#section-B.4.104">Section B.4.104: <code><nobr>FSTENV</nobr></code>: Store Floating-Point Environment</a><br>
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<a href="nasmdocb.html#section-B.4.105">Section B.4.105: <code><nobr>FSTSW</nobr></code>: Store Floating-Point Status Word</a><br>
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<a href="nasmdocb.html#section-B.4.106">Section B.4.106: <code><nobr>FSUB</nobr></code>, <code><nobr>FSUBP</nobr></code>, <code><nobr>FSUBR</nobr></code>, <code><nobr>FSUBRP</nobr></code>: Floating-Point Subtract</a><br>
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<a href="nasmdocb.html#section-B.4.107">Section B.4.107: <code><nobr>FTST</nobr></code>: Test <code><nobr>ST0</nobr></code> Against Zero</a><br>
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<a href="nasmdocb.html#section-B.4.108">Section B.4.108: <code><nobr>FUCOMxx</nobr></code>: Floating-Point Unordered Compare</a><br>
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<a href="nasmdocb.html#section-B.4.109">Section B.4.109: <code><nobr>FXAM</nobr></code>: Examine Class of Value in <code><nobr>ST0</nobr></code></a><br>
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<a href="nasmdocb.html#section-B.4.110">Section B.4.110: <code><nobr>FXCH</nobr></code>: Floating-Point Exchange</a><br>
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<a href="nasmdocb.html#section-B.4.111">Section B.4.111: <code><nobr>FXRSTOR</nobr></code>: Restore <code><nobr>FP</nobr></code>, <code><nobr>MMX</nobr></code> and <code><nobr>SSE</nobr></code> State</a><br>
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<a href="nasmdocb.html#section-B.4.112">Section B.4.112: <code><nobr>FXSAVE</nobr></code>: Store <code><nobr>FP</nobr></code>, <code><nobr>MMX</nobr></code> and <code><nobr>SSE</nobr></code> State</a><br>
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<a href="nasmdocb.html#section-B.4.113">Section B.4.113: <code><nobr>FXTRACT</nobr></code>: Extract Exponent and Significand</a><br>
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<a href="nasmdocb.html#section-B.4.114">Section B.4.114: <code><nobr>FYL2X</nobr></code>, <code><nobr>FYL2XP1</nobr></code>: Compute Y times Log2(X) or Log2(X+1)</a><br>
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<a href="nasmdocb.html#section-B.4.115">Section B.4.115: <code><nobr>HLT</nobr></code>: Halt Processor</a><br>
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<a href="nasmdocb.html#section-B.4.116">Section B.4.116: <code><nobr>IBTS</nobr></code>: Insert Bit String</a><br>
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<a href="nasmdocb.html#section-B.4.117">Section B.4.117: <code><nobr>IDIV</nobr></code>: Signed Integer Divide</a><br>
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<a href="nasmdocb.html#section-B.4.118">Section B.4.118: <code><nobr>IMUL</nobr></code>: Signed Integer Multiply</a><br>
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<a href="nasmdocb.html#section-B.4.119">Section B.4.119: <code><nobr>IN</nobr></code>: Input from I/O Port</a><br>
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<a href="nasmdocb.html#section-B.4.120">Section B.4.120: <code><nobr>INC</nobr></code>: Increment Integer</a><br>
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<a href="nasmdocb.html#section-B.4.121">Section B.4.121: <code><nobr>INSB</nobr></code>, <code><nobr>INSW</nobr></code>, <code><nobr>INSD</nobr></code>: Input String from I/O Port</a><br>
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<a href="nasmdocb.html#section-B.4.122">Section B.4.122: <code><nobr>INT</nobr></code>: Software Interrupt</a><br>
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<a href="nasmdocb.html#section-B.4.123">Section B.4.123: <code><nobr>INT3</nobr></code>, <code><nobr>INT1</nobr></code>, <code><nobr>ICEBP</nobr></code>, <code><nobr>INT01</nobr></code>: Breakpoints</a><br>
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<a href="nasmdocb.html#section-B.4.124">Section B.4.124: <code><nobr>INTO</nobr></code>: Interrupt if Overflow</a><br>
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<a href="nasmdocb.html#section-B.4.125">Section B.4.125: <code><nobr>INVD</nobr></code>: Invalidate Internal Caches</a><br>
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<a href="nasmdocb.html#section-B.4.126">Section B.4.126: <code><nobr>INVLPG</nobr></code>: Invalidate TLB Entry</a><br>
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<a href="nasmdocb.html#section-B.4.127">Section B.4.127: <code><nobr>IRET</nobr></code>, <code><nobr>IRETW</nobr></code>, <code><nobr>IRETD</nobr></code>: Return from Interrupt</a><br>
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<a href="nasmdocb.html#section-B.4.128">Section B.4.128: <code><nobr>Jcc</nobr></code>: Conditional Branch</a><br>
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<a href="nasmdocb.html#section-B.4.129">Section B.4.129: <code><nobr>JCXZ</nobr></code>, <code><nobr>JECXZ</nobr></code>: Jump if CX/ECX Zero</a><br>
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<a href="nasmdocb.html#section-B.4.130">Section B.4.130: <code><nobr>JMP</nobr></code>: Jump</a><br>
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<a href="nasmdocb.html#section-B.4.131">Section B.4.131: <code><nobr>LAHF</nobr></code>: Load AH from Flags</a><br>
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<a href="nasmdocb.html#section-B.4.132">Section B.4.132: <code><nobr>LAR</nobr></code>: Load Access Rights</a><br>
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<a href="nasmdocb.html#section-B.4.133">Section B.4.133: <code><nobr>LDMXCSR</nobr></code>: Load Streaming SIMD Extension Control/Status</a><br>
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<a href="nasmdocb.html#section-B.4.134">Section B.4.134: <code><nobr>LDS</nobr></code>, <code><nobr>LES</nobr></code>, <code><nobr>LFS</nobr></code>, <code><nobr>LGS</nobr></code>, <code><nobr>LSS</nobr></code>: Load Far Pointer</a><br>
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<a href="nasmdocb.html#section-B.4.135">Section B.4.135: <code><nobr>LEA</nobr></code>: Load Effective Address</a><br>
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<a href="nasmdocb.html#section-B.4.136">Section B.4.136: <code><nobr>LEAVE</nobr></code>: Destroy Stack Frame</a><br>
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<a href="nasmdocb.html#section-B.4.137">Section B.4.137: <code><nobr>LFENCE</nobr></code>: Load Fence</a><br>
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<a href="nasmdocb.html#section-B.4.138">Section B.4.138: <code><nobr>LGDT</nobr></code>, <code><nobr>LIDT</nobr></code>, <code><nobr>LLDT</nobr></code>: Load Descriptor Tables</a><br>
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<a href="nasmdocb.html#section-B.4.139">Section B.4.139: <code><nobr>LMSW</nobr></code>: Load/Store Machine Status Word</a><br>
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<a href="nasmdocb.html#section-B.4.140">Section B.4.140: <code><nobr>LOADALL</nobr></code>, <code><nobr>LOADALL286</nobr></code>: Load Processor State</a><br>
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<a href="nasmdocb.html#section-B.4.141">Section B.4.141: <code><nobr>LODSB</nobr></code>, <code><nobr>LODSW</nobr></code>, <code><nobr>LODSD</nobr></code>: Load from String</a><br>
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<a href="nasmdocb.html#section-B.4.142">Section B.4.142: <code><nobr>LOOP</nobr></code>, <code><nobr>LOOPE</nobr></code>, <code><nobr>LOOPZ</nobr></code>, <code><nobr>LOOPNE</nobr></code>, <code><nobr>LOOPNZ</nobr></code>: Loop with Counter</a><br>
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<a href="nasmdocb.html#section-B.4.143">Section B.4.143: <code><nobr>LSL</nobr></code>: Load Segment Limit</a><br>
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<a href="nasmdocb.html#section-B.4.144">Section B.4.144: <code><nobr>LTR</nobr></code>: Load Task Register</a><br>
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<a href="nasmdocb.html#section-B.4.145">Section B.4.145: <code><nobr>MASKMOVDQU</nobr></code>: Byte Mask Write</a><br>
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<a href="nasmdocb.html#section-B.4.146">Section B.4.146: <code><nobr>MASKMOVQ</nobr></code>: Byte Mask Write</a><br>
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<a href="nasmdocb.html#section-B.4.147">Section B.4.147: <code><nobr>MAXPD</nobr></code>: Return Packed Double-Precision FP Maximum</a><br>
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<a href="nasmdocb.html#section-B.4.148">Section B.4.148: <code><nobr>MAXPS</nobr></code>: Return Packed Single-Precision FP Maximum</a><br>
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<a href="nasmdocb.html#section-B.4.149">Section B.4.149: <code><nobr>MAXSD</nobr></code>: Return Scalar Double-Precision FP Maximum</a><br>
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<a href="nasmdocb.html#section-B.4.150">Section B.4.150: <code><nobr>MAXSS</nobr></code>: Return Scalar Single-Precision FP Maximum</a><br>
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<a href="nasmdocb.html#section-B.4.151">Section B.4.151: <code><nobr>MFENCE</nobr></code>: Memory Fence</a><br>
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<a href="nasmdocb.html#section-B.4.152">Section B.4.152: <code><nobr>MINPD</nobr></code>: Return Packed Double-Precision FP Minimum</a><br>
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<a href="nasmdocb.html#section-B.4.153">Section B.4.153: <code><nobr>MINPS</nobr></code>: Return Packed Single-Precision FP Minimum</a><br>
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<a href="nasmdocb.html#section-B.4.154">Section B.4.154: <code><nobr>MINSD</nobr></code>: Return Scalar Double-Precision FP Minimum</a><br>
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<a href="nasmdocb.html#section-B.4.155">Section B.4.155: <code><nobr>MINSS</nobr></code>: Return Scalar Single-Precision FP Minimum</a><br>
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<a href="nasmdocb.html#section-B.4.156">Section B.4.156: <code><nobr>MOV</nobr></code>: Move Data</a><br>
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<a href="nasmdocb.html#section-B.4.157">Section B.4.157: <code><nobr>MOVAPD</nobr></code>: Move Aligned Packed Double-Precision FP Values</a><br>
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<a href="nasmdocb.html#section-B.4.158">Section B.4.158: <code><nobr>MOVAPS</nobr></code>: Move Aligned Packed Single-Precision FP Values</a><br>
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<a href="nasmdocb.html#section-B.4.159">Section B.4.159: <code><nobr>MOVD</nobr></code>: Move Doubleword to/from MMX Register</a><br>
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<a href="nasmdocb.html#section-B.4.160">Section B.4.160: <code><nobr>MOVDQ2Q</nobr></code>: Move Quadword from XMM to MMX register.</a><br>
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<a href="nasmdocb.html#section-B.4.161">Section B.4.161: <code><nobr>MOVDQA</nobr></code>: Move Aligned Double Quadword</a><br>
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<a href="nasmdocb.html#section-B.4.162">Section B.4.162: <code><nobr>MOVDQU</nobr></code>: Move Unaligned Double Quadword</a><br>
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<a href="nasmdocb.html#section-B.4.163">Section B.4.163: <code><nobr>MOVHLPS</nobr></code>: Move Packed Single-Precision FP High to Low</a><br>
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<a href="nasmdocb.html#section-B.4.164">Section B.4.164: <code><nobr>MOVHPD</nobr></code>: Move High Packed Double-Precision FP</a><br>
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<a href="nasmdocb.html#section-B.4.165">Section B.4.165: <code><nobr>MOVHPS</nobr></code>: Move High Packed Single-Precision FP</a><br>
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<a href="nasmdocb.html#section-B.4.166">Section B.4.166: <code><nobr>MOVLHPS</nobr></code>: Move Packed Single-Precision FP Low to High</a><br>
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<a href="nasmdocb.html#section-B.4.167">Section B.4.167: <code><nobr>MOVLPD</nobr></code>: Move Low Packed Double-Precision FP</a><br>
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<a href="nasmdocb.html#section-B.4.168">Section B.4.168: <code><nobr>MOVLPS</nobr></code>: Move Low Packed Single-Precision FP</a><br>
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<a href="nasmdocb.html#section-B.4.169">Section B.4.169: <code><nobr>MOVMSKPD</nobr></code>: Extract Packed Double-Precision FP Sign Mask</a><br>
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<a href="nasmdocb.html#section-B.4.170">Section B.4.170: <code><nobr>MOVMSKPS</nobr></code>: Extract Packed Single-Precision FP Sign Mask</a><br>
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<a href="nasmdocb.html#section-B.4.171">Section B.4.171: <code><nobr>MOVNTDQ</nobr></code>: Move Double Quadword Non Temporal</a><br>
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<a href="nasmdocb.html#section-B.4.172">Section B.4.172: <code><nobr>MOVNTI</nobr></code>: Move Doubleword Non Temporal</a><br>
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<a href="nasmdocb.html#section-B.4.173">Section B.4.173: <code><nobr>MOVNTPD</nobr></code>: Move Aligned Four Packed Single-Precision FP Values Non Temporal</a><br>
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<a href="nasmdocb.html#section-B.4.174">Section B.4.174: <code><nobr>MOVNTPS</nobr></code>: Move Aligned Four Packed Single-Precision FP Values Non Temporal</a><br>
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<a href="nasmdocb.html#section-B.4.175">Section B.4.175: <code><nobr>MOVNTQ</nobr></code>: Move Quadword Non Temporal</a><br>
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<a href="nasmdocb.html#section-B.4.176">Section B.4.176: <code><nobr>MOVQ</nobr></code>: Move Quadword to/from MMX Register</a><br>
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<a href="nasmdocb.html#section-B.4.177">Section B.4.177: <code><nobr>MOVQ2DQ</nobr></code>: Move Quadword from MMX to XMM register.</a><br>
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<a href="nasmdocb.html#section-B.4.178">Section B.4.178: <code><nobr>MOVSB</nobr></code>, <code><nobr>MOVSW</nobr></code>, <code><nobr>MOVSD</nobr></code>: Move String</a><br>
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<a href="nasmdocb.html#section-B.4.179">Section B.4.179: <code><nobr>MOVSD</nobr></code>: Move Scalar Double-Precision FP Value</a><br>
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<a href="nasmdocb.html#section-B.4.180">Section B.4.180: <code><nobr>MOVSS</nobr></code>: Move Scalar Single-Precision FP Value</a><br>
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<a href="nasmdocb.html#section-B.4.181">Section B.4.181: <code><nobr>MOVSX</nobr></code>, <code><nobr>MOVZX</nobr></code>: Move Data with Sign or Zero Extend</a><br>
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<a href="nasmdocb.html#section-B.4.182">Section B.4.182: <code><nobr>MOVUPD</nobr></code>: Move Unaligned Packed Double-Precision FP Values</a><br>
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<a href="nasmdocb.html#section-B.4.183">Section B.4.183: <code><nobr>MOVUPS</nobr></code>: Move Unaligned Packed Single-Precision FP Values</a><br>
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<a href="nasmdocb.html#section-B.4.184">Section B.4.184: <code><nobr>MUL</nobr></code>: Unsigned Integer Multiply</a><br>
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<a href="nasmdocb.html#section-B.4.185">Section B.4.185: <code><nobr>MULPD</nobr></code>: Packed Single-FP Multiply</a><br>
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<a href="nasmdocb.html#section-B.4.186">Section B.4.186: <code><nobr>MULPS</nobr></code>: Packed Single-FP Multiply</a><br>
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<a href="nasmdocb.html#section-B.4.187">Section B.4.187: <code><nobr>MULSD</nobr></code>: Scalar Single-FP Multiply</a><br>
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<a href="nasmdocb.html#section-B.4.188">Section B.4.188: <code><nobr>MULSS</nobr></code>: Scalar Single-FP Multiply</a><br>
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<a href="nasmdocb.html#section-B.4.189">Section B.4.189: <code><nobr>NEG</nobr></code>, <code><nobr>NOT</nobr></code>: Two's and One's Complement</a><br>
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<a href="nasmdocb.html#section-B.4.190">Section B.4.190: <code><nobr>NOP</nobr></code>: No Operation</a><br>
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<a href="nasmdocb.html#section-B.4.191">Section B.4.191: <code><nobr>OR</nobr></code>: Bitwise OR</a><br>
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<a href="nasmdocb.html#section-B.4.192">Section B.4.192: <code><nobr>ORPD</nobr></code>: Bit-wise Logical OR of Double-Precision FP Data</a><br>
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<a href="nasmdocb.html#section-B.4.193">Section B.4.193: <code><nobr>ORPS</nobr></code>: Bit-wise Logical OR of Single-Precision FP Data</a><br>
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<a href="nasmdocb.html#section-B.4.194">Section B.4.194: <code><nobr>OUT</nobr></code>: Output Data to I/O Port</a><br>
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<a href="nasmdocb.html#section-B.4.195">Section B.4.195: <code><nobr>OUTSB</nobr></code>, <code><nobr>OUTSW</nobr></code>, <code><nobr>OUTSD</nobr></code>: Output String to I/O Port</a><br>
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<a href="nasmdocb.html#section-B.4.196">Section B.4.196: <code><nobr>PACKSSDW</nobr></code>, <code><nobr>PACKSSWB</nobr></code>, <code><nobr>PACKUSWB</nobr></code>: Pack Data</a><br>
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<a href="nasmdocb.html#section-B.4.197">Section B.4.197: <code><nobr>PADDB</nobr></code>, <code><nobr>PADDW</nobr></code>, <code><nobr>PADDD</nobr></code>: Add Packed Integers</a><br>
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<a href="nasmdocb.html#section-B.4.198">Section B.4.198: <code><nobr>PADDQ</nobr></code>: Add Packed Quadword Integers</a><br>
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<a href="nasmdocb.html#section-B.4.199">Section B.4.199: <code><nobr>PADDSB</nobr></code>, <code><nobr>PADDSW</nobr></code>: Add Packed Signed Integers With Saturation</a><br>
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<a href="nasmdocb.html#section-B.4.200">Section B.4.200: <code><nobr>PADDSIW</nobr></code>: MMX Packed Addition to Implicit Destination</a><br>
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<a href="nasmdocb.html#section-B.4.201">Section B.4.201: <code><nobr>PADDUSB</nobr></code>, <code><nobr>PADDUSW</nobr></code>: Add Packed Unsigned Integers With Saturation</a><br>
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<a href="nasmdocb.html#section-B.4.202">Section B.4.202: <code><nobr>PAND</nobr></code>, <code><nobr>PANDN</nobr></code>: MMX Bitwise AND and AND-NOT</a><br>
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<a href="nasmdocb.html#section-B.4.203">Section B.4.203: <code><nobr>PAUSE</nobr></code>: Spin Loop Hint</a><br>
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<a href="nasmdocb.html#section-B.4.204">Section B.4.204: <code><nobr>PAVEB</nobr></code>: MMX Packed Average</a><br>
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<a href="nasmdocb.html#section-B.4.205">Section B.4.205: <code><nobr>PAVGB</nobr></code> <code><nobr>PAVGW</nobr></code>: Average Packed Integers</a><br>
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<a href="nasmdocb.html#section-B.4.206">Section B.4.206: <code><nobr>PAVGUSB</nobr></code>: Average of unsigned packed 8-bit values</a><br>
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<a href="nasmdocb.html#section-B.4.207">Section B.4.207: <code><nobr>PCMPxx</nobr></code>: Compare Packed Integers.</a><br>
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<a href="nasmdocb.html#section-B.4.208">Section B.4.208: <code><nobr>PDISTIB</nobr></code>: MMX Packed Distance and Accumulate with Implied Register</a><br>
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<a href="nasmdocb.html#section-B.4.209">Section B.4.209: <code><nobr>PEXTRW</nobr></code>: Extract Word</a><br>
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<a href="nasmdocb.html#section-B.4.210">Section B.4.210: <code><nobr>PF2ID</nobr></code>: Packed Single-Precision FP to Integer Convert</a><br>
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<a href="nasmdocb.html#section-B.4.211">Section B.4.211: <code><nobr>PF2IW</nobr></code>: Packed Single-Precision FP to Integer Word Convert</a><br>
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<a href="nasmdocb.html#section-B.4.212">Section B.4.212: <code><nobr>PFACC</nobr></code>: Packed Single-Precision FP Accumulate</a><br>
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<a href="nasmdocb.html#section-B.4.213">Section B.4.213: <code><nobr>PFADD</nobr></code>: Packed Single-Precision FP Addition</a><br>
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<a href="nasmdocb.html#section-B.4.214">Section B.4.214: <code><nobr>PFCMPxx</nobr></code>: Packed Single-Precision FP Compare </a><br>
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<a href="nasmdocb.html#section-B.4.215">Section B.4.215: <code><nobr>PFMAX</nobr></code>: Packed Single-Precision FP Maximum</a><br>
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<a href="nasmdocb.html#section-B.4.216">Section B.4.216: <code><nobr>PFMIN</nobr></code>: Packed Single-Precision FP Minimum</a><br>
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<a href="nasmdocb.html#section-B.4.217">Section B.4.217: <code><nobr>PFMUL</nobr></code>: Packed Single-Precision FP Multiply</a><br>
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<a href="nasmdocb.html#section-B.4.218">Section B.4.218: <code><nobr>PFNACC</nobr></code>: Packed Single-Precision FP Negative Accumulate</a><br>
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<a href="nasmdocb.html#section-B.4.219">Section B.4.219: <code><nobr>PFPNACC</nobr></code>: Packed Single-Precision FP Mixed Accumulate</a><br>
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<a href="nasmdocb.html#section-B.4.220">Section B.4.220: <code><nobr>PFRCP</nobr></code>: Packed Single-Precision FP Reciprocal Approximation</a><br>
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<a href="nasmdocb.html#section-B.4.221">Section B.4.221: <code><nobr>PFRCPIT1</nobr></code>: Packed Single-Precision FP Reciprocal, First Iteration Step</a><br>
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<a href="nasmdocb.html#section-B.4.222">Section B.4.222: <code><nobr>PFRCPIT2</nobr></code>: Packed Single-Precision FP Reciprocal/ Reciprocal Square Root, Second Iteration Step</a><br>
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<a href="nasmdocb.html#section-B.4.223">Section B.4.223: <code><nobr>PFRSQIT1</nobr></code>: Packed Single-Precision FP Reciprocal Square Root, First Iteration Step</a><br>
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<a href="nasmdocb.html#section-B.4.224">Section B.4.224: <code><nobr>PFRSQRT</nobr></code>: Packed Single-Precision FP Reciprocal Square Root Approximation</a><br>
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<a href="nasmdocb.html#section-B.4.225">Section B.4.225: <code><nobr>PFSUB</nobr></code>: Packed Single-Precision FP Subtract</a><br>
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<a href="nasmdocb.html#section-B.4.226">Section B.4.226: <code><nobr>PFSUBR</nobr></code>: Packed Single-Precision FP Reverse Subtract</a><br>
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<a href="nasmdocb.html#section-B.4.227">Section B.4.227: <code><nobr>PI2FD</nobr></code>: Packed Doubleword Integer to Single-Precision FP Convert</a><br>
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<a href="nasmdocb.html#section-B.4.228">Section B.4.228: <code><nobr>PF2IW</nobr></code>: Packed Word Integer to Single-Precision FP Convert</a><br>
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<a href="nasmdocb.html#section-B.4.229">Section B.4.229: <code><nobr>PINSRW</nobr></code>: Insert Word</a><br>
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<a href="nasmdocb.html#section-B.4.230">Section B.4.230: <code><nobr>PMACHRIW</nobr></code>: Packed Multiply and Accumulate with Rounding</a><br>
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<a href="nasmdocb.html#section-B.4.231">Section B.4.231: <code><nobr>PMADDWD</nobr></code>: MMX Packed Multiply and Add</a><br>
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<a href="nasmdocb.html#section-B.4.232">Section B.4.232: <code><nobr>PMAGW</nobr></code>: MMX Packed Magnitude</a><br>
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<a href="nasmdocb.html#section-B.4.233">Section B.4.233: <code><nobr>PMAXSW</nobr></code>: Packed Signed Integer Word Maximum</a><br>
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<a href="nasmdocb.html#section-B.4.234">Section B.4.234: <code><nobr>PMAXUB</nobr></code>: Packed Unsigned Integer Byte Maximum</a><br>
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<a href="nasmdocb.html#section-B.4.235">Section B.4.235: <code><nobr>PMINSW</nobr></code>: Packed Signed Integer Word Minimum</a><br>
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<a href="nasmdocb.html#section-B.4.236">Section B.4.236: <code><nobr>PMINUB</nobr></code>: Packed Unsigned Integer Byte Minimum</a><br>
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<a href="nasmdocb.html#section-B.4.237">Section B.4.237: <code><nobr>PMOVMSKB</nobr></code>: Move Byte Mask To Integer</a><br>
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<a href="nasmdocb.html#section-B.4.238">Section B.4.238: <code><nobr>PMULHRWC</nobr></code>, <code><nobr>PMULHRIW</nobr></code>: Multiply Packed 16-bit Integers With Rounding, and Store High Word</a><br>
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<a href="nasmdocb.html#section-B.4.239">Section B.4.239: <code><nobr>PMULHRWA</nobr></code>: Multiply Packed 16-bit Integers With Rounding, and Store High Word</a><br>
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<a href="nasmdocb.html#section-B.4.240">Section B.4.240: <code><nobr>PMULHUW</nobr></code>: Multiply Packed 16-bit Integers, and Store High Word</a><br>
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<a href="nasmdocb.html#section-B.4.241">Section B.4.241: <code><nobr>PMULHW</nobr></code>, <code><nobr>PMULLW</nobr></code>: Multiply Packed 16-bit Integers, and Store</a><br>
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<a href="nasmdocb.html#section-B.4.242">Section B.4.242: <code><nobr>PMULUDQ</nobr></code>: Multiply Packed Unsigned 32-bit Integers, and Store.</a><br>
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<a href="nasmdocb.html#section-B.4.243">Section B.4.243: <code><nobr>PMVccZB</nobr></code>: MMX Packed Conditional Move</a><br>
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<a href="nasmdocb.html#section-B.4.244">Section B.4.244: <code><nobr>POP</nobr></code>: Pop Data from Stack</a><br>
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<a href="nasmdocb.html#section-B.4.245">Section B.4.245: <code><nobr>POPAx</nobr></code>: Pop All General-Purpose Registers</a><br>
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<a href="nasmdocb.html#section-B.4.246">Section B.4.246: <code><nobr>POPFx</nobr></code>: Pop Flags Register</a><br>
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<a href="nasmdocb.html#section-B.4.247">Section B.4.247: <code><nobr>POR</nobr></code>: MMX Bitwise OR</a><br>
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<a href="nasmdocb.html#section-B.4.248">Section B.4.248: <code><nobr>PREFETCH</nobr></code>: Prefetch Data Into Caches</a><br>
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<a href="nasmdocb.html#section-B.4.249">Section B.4.249: <code><nobr>PREFETCHh</nobr></code>: Prefetch Data Into Caches </a><br>
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<a href="nasmdocb.html#section-B.4.250">Section B.4.250: <code><nobr>PSADBW</nobr></code>: Packed Sum of Absolute Differences</a><br>
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<a href="nasmdocb.html#section-B.4.251">Section B.4.251: <code><nobr>PSHUFD</nobr></code>: Shuffle Packed Doublewords</a><br>
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<a href="nasmdocb.html#section-B.4.252">Section B.4.252: <code><nobr>PSHUFHW</nobr></code>: Shuffle Packed High Words</a><br>
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<a href="nasmdocb.html#section-B.4.253">Section B.4.253: <code><nobr>PSHUFLW</nobr></code>: Shuffle Packed Low Words</a><br>
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<a href="nasmdocb.html#section-B.4.254">Section B.4.254: <code><nobr>PSHUFW</nobr></code>: Shuffle Packed Words</a><br>
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<a href="nasmdocb.html#section-B.4.255">Section B.4.255: <code><nobr>PSLLx</nobr></code>: Packed Data Bit Shift Left Logical</a><br>
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<a href="nasmdocb.html#section-B.4.256">Section B.4.256: <code><nobr>PSRAx</nobr></code>: Packed Data Bit Shift Right Arithmetic</a><br>
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<a href="nasmdocb.html#section-B.4.257">Section B.4.257: <code><nobr>PSRLx</nobr></code>: Packed Data Bit Shift Right Logical</a><br>
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<a href="nasmdocb.html#section-B.4.258">Section B.4.258: <code><nobr>PSUBx</nobr></code>: Subtract Packed Integers</a><br>
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<a href="nasmdocb.html#section-B.4.259">Section B.4.259: <code><nobr>PSUBSxx</nobr></code>, <code><nobr>PSUBUSx</nobr></code>: Subtract Packed Integers With Saturation</a><br>
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<a href="nasmdocb.html#section-B.4.260">Section B.4.260: <code><nobr>PSUBSIW</nobr></code>: MMX Packed Subtract with Saturation to Implied Destination</a><br>
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<a href="nasmdocb.html#section-B.4.261">Section B.4.261: <code><nobr>PSWAPD</nobr></code>: Swap Packed Data </a><br>
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<a href="nasmdocb.html#section-B.4.262">Section B.4.262: <code><nobr>PUNPCKxxx</nobr></code>: Unpack and Interleave Data</a><br>
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<a href="nasmdocb.html#section-B.4.263">Section B.4.263: <code><nobr>PUSH</nobr></code>: Push Data on Stack</a><br>
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<a href="nasmdocb.html#section-B.4.264">Section B.4.264: <code><nobr>PUSHAx</nobr></code>: Push All General-Purpose Registers</a><br>
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<a href="nasmdocb.html#section-B.4.265">Section B.4.265: <code><nobr>PUSHFx</nobr></code>: Push Flags Register</a><br>
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<a href="nasmdocb.html#section-B.4.266">Section B.4.266: <code><nobr>PXOR</nobr></code>: MMX Bitwise XOR</a><br>
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<a href="nasmdocb.html#section-B.4.267">Section B.4.267: <code><nobr>RCL</nobr></code>, <code><nobr>RCR</nobr></code>: Bitwise Rotate through Carry Bit</a><br>
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<a href="nasmdocb.html#section-B.4.268">Section B.4.268: <code><nobr>RCPPS</nobr></code>: Packed Single-Precision FP Reciprocal</a><br>
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<a href="nasmdocb.html#section-B.4.269">Section B.4.269: <code><nobr>RCPSS</nobr></code>: Scalar Single-Precision FP Reciprocal</a><br>
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<a href="nasmdocb.html#section-B.4.270">Section B.4.270: <code><nobr>RDMSR</nobr></code>: Read Model-Specific Registers</a><br>
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<a href="nasmdocb.html#section-B.4.271">Section B.4.271: <code><nobr>RDPMC</nobr></code>: Read Performance-Monitoring Counters</a><br>
|
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<a href="nasmdocb.html#section-B.4.272">Section B.4.272: <code><nobr>RDSHR</nobr></code>: Read SMM Header Pointer Register</a><br>
|
|
<a href="nasmdocb.html#section-B.4.273">Section B.4.273: <code><nobr>RDTSC</nobr></code>: Read Time-Stamp Counter</a><br>
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|
<a href="nasmdocb.html#section-B.4.274">Section B.4.274: <code><nobr>RET</nobr></code>, <code><nobr>RETF</nobr></code>, <code><nobr>RETN</nobr></code>: Return from Procedure Call</a><br>
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<a href="nasmdocb.html#section-B.4.275">Section B.4.275: <code><nobr>ROL</nobr></code>, <code><nobr>ROR</nobr></code>: Bitwise Rotate</a><br>
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<a href="nasmdocb.html#section-B.4.276">Section B.4.276: <code><nobr>RSDC</nobr></code>: Restore Segment Register and Descriptor</a><br>
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<a href="nasmdocb.html#section-B.4.277">Section B.4.277: <code><nobr>RSLDT</nobr></code>: Restore Segment Register and Descriptor</a><br>
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<a href="nasmdocb.html#section-B.4.278">Section B.4.278: <code><nobr>RSM</nobr></code>: Resume from System-Management Mode</a><br>
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<a href="nasmdocb.html#section-B.4.279">Section B.4.279: <code><nobr>RSQRTPS</nobr></code>: Packed Single-Precision FP Square Root Reciprocal</a><br>
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<a href="nasmdocb.html#section-B.4.280">Section B.4.280: <code><nobr>RSQRTSS</nobr></code>: Scalar Single-Precision FP Square Root Reciprocal</a><br>
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<a href="nasmdocb.html#section-B.4.281">Section B.4.281: <code><nobr>RSTS</nobr></code>: Restore TSR and Descriptor</a><br>
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<a href="nasmdocb.html#section-B.4.282">Section B.4.282: <code><nobr>SAHF</nobr></code>: Store AH to Flags</a><br>
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<a href="nasmdocb.html#section-B.4.283">Section B.4.283: <code><nobr>SAL</nobr></code>, <code><nobr>SAR</nobr></code>: Bitwise Arithmetic Shifts</a><br>
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<a href="nasmdocb.html#section-B.4.284">Section B.4.284: <code><nobr>SALC</nobr></code>: Set AL from Carry Flag</a><br>
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<a href="nasmdocb.html#section-B.4.285">Section B.4.285: <code><nobr>SBB</nobr></code>: Subtract with Borrow</a><br>
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|
<a href="nasmdocb.html#section-B.4.286">Section B.4.286: <code><nobr>SCASB</nobr></code>, <code><nobr>SCASW</nobr></code>, <code><nobr>SCASD</nobr></code>: Scan String</a><br>
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<a href="nasmdocb.html#section-B.4.287">Section B.4.287: <code><nobr>SETcc</nobr></code>: Set Register from Condition</a><br>
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|
<a href="nasmdocb.html#section-B.4.288">Section B.4.288: <code><nobr>SFENCE</nobr></code>: Store Fence</a><br>
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|
<a href="nasmdocb.html#section-B.4.289">Section B.4.289: <code><nobr>SGDT</nobr></code>, <code><nobr>SIDT</nobr></code>, <code><nobr>SLDT</nobr></code>: Store Descriptor Table Pointers</a><br>
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<a href="nasmdocb.html#section-B.4.290">Section B.4.290: <code><nobr>SHL</nobr></code>, <code><nobr>SHR</nobr></code>: Bitwise Logical Shifts</a><br>
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|
<a href="nasmdocb.html#section-B.4.291">Section B.4.291: <code><nobr>SHLD</nobr></code>, <code><nobr>SHRD</nobr></code>: Bitwise Double-Precision Shifts</a><br>
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<a href="nasmdocb.html#section-B.4.292">Section B.4.292: <code><nobr>SHUFPD</nobr></code>: Shuffle Packed Double-Precision FP Values</a><br>
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|
<a href="nasmdocb.html#section-B.4.293">Section B.4.293: <code><nobr>SHUFPS</nobr></code>: Shuffle Packed Single-Precision FP Values</a><br>
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<a href="nasmdocb.html#section-B.4.294">Section B.4.294: <code><nobr>SMI</nobr></code>: System Management Interrupt</a><br>
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<a href="nasmdocb.html#section-B.4.295">Section B.4.295: <code><nobr>SMINT</nobr></code>, <code><nobr>SMINTOLD</nobr></code>: Software SMM Entry (CYRIX)</a><br>
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|
<a href="nasmdocb.html#section-B.4.296">Section B.4.296: <code><nobr>SMSW</nobr></code>: Store Machine Status Word</a><br>
|
|
<a href="nasmdocb.html#section-B.4.297">Section B.4.297: <code><nobr>SQRTPD</nobr></code>: Packed Double-Precision FP Square Root</a><br>
|
|
<a href="nasmdocb.html#section-B.4.298">Section B.4.298: <code><nobr>SQRTPS</nobr></code>: Packed Single-Precision FP Square Root</a><br>
|
|
<a href="nasmdocb.html#section-B.4.299">Section B.4.299: <code><nobr>SQRTSD</nobr></code>: Scalar Double-Precision FP Square Root</a><br>
|
|
<a href="nasmdocb.html#section-B.4.300">Section B.4.300: <code><nobr>SQRTSS</nobr></code>: Scalar Single-Precision FP Square Root</a><br>
|
|
<a href="nasmdocb.html#section-B.4.301">Section B.4.301: <code><nobr>STC</nobr></code>, <code><nobr>STD</nobr></code>, <code><nobr>STI</nobr></code>: Set Flags</a><br>
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|
<a href="nasmdocb.html#section-B.4.302">Section B.4.302: <code><nobr>STMXCSR</nobr></code>: Store Streaming SIMD Extension Control/Status</a><br>
|
|
<a href="nasmdocb.html#section-B.4.303">Section B.4.303: <code><nobr>STOSB</nobr></code>, <code><nobr>STOSW</nobr></code>, <code><nobr>STOSD</nobr></code>: Store Byte to String</a><br>
|
|
<a href="nasmdocb.html#section-B.4.304">Section B.4.304: <code><nobr>STR</nobr></code>: Store Task Register</a><br>
|
|
<a href="nasmdocb.html#section-B.4.305">Section B.4.305: <code><nobr>SUB</nobr></code>: Subtract Integers</a><br>
|
|
<a href="nasmdocb.html#section-B.4.306">Section B.4.306: <code><nobr>SUBPD</nobr></code>: Packed Double-Precision FP Subtract</a><br>
|
|
<a href="nasmdocb.html#section-B.4.307">Section B.4.307: <code><nobr>SUBPS</nobr></code>: Packed Single-Precision FP Subtract</a><br>
|
|
<a href="nasmdocb.html#section-B.4.308">Section B.4.308: <code><nobr>SUBSD</nobr></code>: Scalar Single-FP Subtract</a><br>
|
|
<a href="nasmdocb.html#section-B.4.309">Section B.4.309: <code><nobr>SUBSS</nobr></code>: Scalar Single-FP Subtract</a><br>
|
|
<a href="nasmdocb.html#section-B.4.310">Section B.4.310: <code><nobr>SVDC</nobr></code>: Save Segment Register and Descriptor</a><br>
|
|
<a href="nasmdocb.html#section-B.4.311">Section B.4.311: <code><nobr>SVLDT</nobr></code>: Save LDTR and Descriptor</a><br>
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<a href="nasmdocb.html#section-B.4.312">Section B.4.312: <code><nobr>SVTS</nobr></code>: Save TSR and Descriptor</a><br>
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<a href="nasmdocb.html#section-B.4.313">Section B.4.313: <code><nobr>SYSCALL</nobr></code>: Call Operating System</a><br>
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<a href="nasmdocb.html#section-B.4.314">Section B.4.314: <code><nobr>SYSENTER</nobr></code>: Fast System Call</a><br>
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<a href="nasmdocb.html#section-B.4.315">Section B.4.315: <code><nobr>SYSEXIT</nobr></code>: Fast Return From System Call</a><br>
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<a href="nasmdocb.html#section-B.4.316">Section B.4.316: <code><nobr>SYSRET</nobr></code>: Return From Operating System</a><br>
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<a href="nasmdocb.html#section-B.4.317">Section B.4.317: <code><nobr>TEST</nobr></code>: Test Bits (notional bitwise AND)</a><br>
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<a href="nasmdocb.html#section-B.4.318">Section B.4.318: <code><nobr>UCOMISD</nobr></code>: Unordered Scalar Double-Precision FP compare and set EFLAGS</a><br>
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<a href="nasmdocb.html#section-B.4.319">Section B.4.319: <code><nobr>UCOMISS</nobr></code>: Unordered Scalar Single-Precision FP compare and set EFLAGS</a><br>
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<a href="nasmdocb.html#section-B.4.320">Section B.4.320: <code><nobr>UD0</nobr></code>, <code><nobr>UD1</nobr></code>, <code><nobr>UD2</nobr></code>: Undefined Instruction</a><br>
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<a href="nasmdocb.html#section-B.4.321">Section B.4.321: <code><nobr>UMOV</nobr></code>: User Move Data</a><br>
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<a href="nasmdocb.html#section-B.4.322">Section B.4.322: <code><nobr>UNPCKHPD</nobr></code>: Unpack and Interleave High Packed Double-Precision FP Values</a><br>
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<a href="nasmdocb.html#section-B.4.323">Section B.4.323: <code><nobr>UNPCKHPS</nobr></code>: Unpack and Interleave High Packed Single-Precision FP Values</a><br>
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<a href="nasmdocb.html#section-B.4.324">Section B.4.324: <code><nobr>UNPCKLPD</nobr></code>: Unpack and Interleave Low Packed Double-Precision FP Data</a><br>
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<a href="nasmdocb.html#section-B.4.325">Section B.4.325: <code><nobr>UNPCKLPS</nobr></code>: Unpack and Interleave Low Packed Single-Precision FP Data</a><br>
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<a href="nasmdocb.html#section-B.4.326">Section B.4.326: <code><nobr>VERR</nobr></code>, <code><nobr>VERW</nobr></code>: Verify Segment Readability/Writability</a><br>
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<a href="nasmdocb.html#section-B.4.327">Section B.4.327: <code><nobr>WAIT</nobr></code>: Wait for Floating-Point Processor</a><br>
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<a href="nasmdocb.html#section-B.4.328">Section B.4.328: <code><nobr>WBINVD</nobr></code>: Write Back and Invalidate Cache</a><br>
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<a href="nasmdocb.html#section-B.4.329">Section B.4.329: <code><nobr>WRMSR</nobr></code>: Write Model-Specific Registers</a><br>
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<a href="nasmdocb.html#section-B.4.330">Section B.4.330: <code><nobr>WRSHR</nobr></code>: Write SMM Header Pointer Register</a><br>
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<a href="nasmdocb.html#section-B.4.331">Section B.4.331: <code><nobr>XADD</nobr></code>: Exchange and Add</a><br>
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<a href="nasmdocb.html#section-B.4.332">Section B.4.332: <code><nobr>XBTS</nobr></code>: Extract Bit String</a><br>
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<a href="nasmdocb.html#section-B.4.333">Section B.4.333: <code><nobr>XCHG</nobr></code>: Exchange</a><br>
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<a href="nasmdocb.html#section-B.4.334">Section B.4.334: <code><nobr>XLATB</nobr></code>: Translate Byte in Lookup Table</a><br>
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<a href="nasmdocb.html#section-B.4.335">Section B.4.335: <code><nobr>XOR</nobr></code>: Bitwise Exclusive OR</a><br>
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<a href="nasmdocb.html#section-B.4.336">Section B.4.336: <code><nobr>XORPD</nobr></code>: Bitwise Logical XOR of Double-Precision FP Values</a><br>
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<a href="nasmdocb.html#section-B.4.337">Section B.4.337: <code><nobr>XORPS</nobr></code>: Bitwise Logical XOR of Single-Precision FP Values</a><br>
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