385 lines
9.8 KiB
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385 lines
9.8 KiB
HTML
<HTML>
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<!-- This HTML file has been created by texi2html 1.52
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from ../texi/as.texinfo on 24 April 1999 -->
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<TITLE>Using as - v850 Dependent Features</TITLE>
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</HEAD>
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<BODY>
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Go to the <A HREF="as_1.html">first</A>, <A HREF="as_23.html">previous</A>, <A HREF="as_25.html">next</A>, <A HREF="as_27.html">last</A> section, <A HREF="as_toc.html">table of contents</A>.
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<P><HR><P>
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<H1><A NAME="SEC261" HREF="as_toc.html#TOC261">v850 Dependent Features</A></H1>
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<P>
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<A NAME="IDX863"></A>
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</P>
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<H2><A NAME="SEC262" HREF="as_toc.html#TOC262">Options</A></H2>
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<P>
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<A NAME="IDX864"></A>
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<A NAME="IDX865"></A>
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<CODE>as</CODE> supports the following additional command-line options
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for the V850 processor family:
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</P>
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<P>
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<A NAME="IDX866"></A>
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<A NAME="IDX867"></A>
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<DL COMPACT>
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<DT><CODE>-wsigned_overflow</CODE>
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<DD>
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<A NAME="IDX868"></A>
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Causes warnings to be produced when signed immediate values overflow the
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space available for then within their opcodes. By default this option
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is disabled as it is possible to receive spurious warnings due to using
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exact bit patterns as immediate constants.
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<A NAME="IDX869"></A>
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<DT><CODE>-wunsigned_overflow</CODE>
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<DD>
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Causes warnings to be produced when unsigned immediate values overflow
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the space available for then within their opcodes. By default this
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option is disabled as it is possible to receive spurious warnings due to
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using exact bit patterns as immediate constants.
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<A NAME="IDX870"></A>
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<DT><CODE>-mv850</CODE>
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<DD>
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Specifies that the assembled code should be marked as being targeted at
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the V850 processor. This allows the linker to detect attempts to link
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such code with code assembled for other processors.
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</DL>
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<H2><A NAME="SEC263" HREF="as_toc.html#TOC263">Syntax</A></H2>
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<H3><A NAME="SEC264" HREF="as_toc.html#TOC264">Special Characters</A></H3>
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<P>
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<A NAME="IDX871"></A>
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<A NAME="IDX872"></A>
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<SAMP>`#'</SAMP> is the line comment character.
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<H3><A NAME="SEC265" HREF="as_toc.html#TOC265">Register Names</A></H3>
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<P>
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<A NAME="IDX873"></A>
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<A NAME="IDX874"></A>
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<CODE>as</CODE> supports the following names for registers:
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<DL COMPACT>
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<DT><CODE>general register 0</CODE>
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<DD>
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<A NAME="IDX875"></A>
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r0, zero
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<DT><CODE>general register 1</CODE>
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<DD>
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r1
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<DT><CODE>general register 2</CODE>
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<DD>
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r2, hp
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<A NAME="IDX876"></A>
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<DT><CODE>general register 3</CODE>
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<DD>
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r3, sp
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<A NAME="IDX877"></A>
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<DT><CODE>general register 4</CODE>
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<DD>
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r4, gp
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<A NAME="IDX878"></A>
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<DT><CODE>general register 5</CODE>
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<DD>
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r5, tp
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<DT><CODE>general register 6</CODE>
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<DD>
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r6
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<DT><CODE>general register 7</CODE>
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<DD>
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r7
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<DT><CODE>general register 8</CODE>
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<DD>
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r8
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<DT><CODE>general register 9</CODE>
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<DD>
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r9
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<DT><CODE>general register 10</CODE>
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<DD>
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r10
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<DT><CODE>general register 11</CODE>
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<DD>
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r11
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<DT><CODE>general register 12</CODE>
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<DD>
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r12
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<DT><CODE>general register 13</CODE>
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<DD>
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r13
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<DT><CODE>general register 14</CODE>
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<DD>
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r14
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<DT><CODE>general register 15</CODE>
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<DD>
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r15
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<DT><CODE>general register 16</CODE>
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<DD>
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r16
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<DT><CODE>general register 17</CODE>
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<DD>
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r17
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<DT><CODE>general register 18</CODE>
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<DD>
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r18
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<DT><CODE>general register 19</CODE>
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<DD>
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r19
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<DT><CODE>general register 20</CODE>
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<DD>
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r20
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<DT><CODE>general register 21</CODE>
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<DD>
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r21
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<DT><CODE>general register 22</CODE>
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<DD>
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r22
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<DT><CODE>general register 23</CODE>
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<DD>
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r23
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<DT><CODE>general register 24</CODE>
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<DD>
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r24
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<DT><CODE>general register 25</CODE>
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<DD>
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r25
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<DT><CODE>general register 26</CODE>
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<DD>
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r26
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<DT><CODE>general register 27</CODE>
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<DD>
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r27
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<DT><CODE>general register 28</CODE>
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<DD>
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r28
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<DT><CODE>general register 29</CODE>
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<DD>
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r29
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<A NAME="IDX879"></A>
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<DT><CODE>general register 30</CODE>
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<DD>
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r30, ep
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<A NAME="IDX880"></A>
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<DT><CODE>general register 31</CODE>
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<DD>
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r31, lp
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<A NAME="IDX881"></A>
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<DT><CODE>system register 0</CODE>
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<DD>
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eipc
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<A NAME="IDX882"></A>
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<DT><CODE>system register 1</CODE>
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<DD>
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eipsw
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<A NAME="IDX883"></A>
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<DT><CODE>system register 2</CODE>
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<DD>
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fepc
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<A NAME="IDX884"></A>
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<DT><CODE>system register 3</CODE>
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<DD>
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fepsw
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<A NAME="IDX885"></A>
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<DT><CODE>system register 4</CODE>
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<DD>
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ecr
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<A NAME="IDX886"></A>
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<DT><CODE>system register 5</CODE>
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<DD>
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psw
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</DL>
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<H2><A NAME="SEC266" HREF="as_toc.html#TOC266">Floating Point</A></H2>
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<P>
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<A NAME="IDX887"></A>
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<A NAME="IDX888"></A>
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The V850 family uses IEEE floating-point numbers.
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</P>
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<H2><A NAME="SEC267" HREF="as_toc.html#TOC267">V850 Machine Directives</A></H2>
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<P>
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<A NAME="IDX889"></A>
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<A NAME="IDX890"></A>
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<DL COMPACT>
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<DT><CODE>.offset <VAR><expression></VAR></CODE>
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<DD>
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<A NAME="IDX891"></A>
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Moves the offset into the current section to the specified amount.
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<A NAME="IDX892"></A>
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<DT><CODE>.section "name", <type></CODE>
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<DD>
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This is an extension to the standard .section directive. It sets the
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current section to be <type> and creates an alias for this section
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called "name".
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<A NAME="IDX893"></A>
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<DT><CODE>.v850</CODE>
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<DD>
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Specifies that the assembled code should be marked as being targeted at
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the V850 processor. This allows the linker to detect attempts to link
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such code with code assembled for other processors.
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</DL>
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<H2><A NAME="SEC268" HREF="as_toc.html#TOC268">Opcodes</A></H2>
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<P>
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<A NAME="IDX894"></A>
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<A NAME="IDX895"></A>
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<CODE>as</CODE> implements all the standard V850 opcodes.
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</P>
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<P>
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<CODE>as</CODE> also implements the following pseudo ops:
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</P>
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<DL COMPACT>
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<DT><CODE>hi0()</CODE>
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<DD>
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<A NAME="IDX896"></A>
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Computes the higher 16 bits of the given expression and stores it into
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the immediate operand field of the given instruction. For example:
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<SAMP>`mulhi hi0(here - there), r5, r6'</SAMP>
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computes the difference between the address of labels 'here' and
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'there', takes the upper 16 bits of this difference, shifts it down 16
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bits and then mutliplies it by the lower 16 bits in register 5, putting
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the result into register 6.
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<A NAME="IDX897"></A>
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<DT><CODE>lo()</CODE>
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<DD>
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Computes the lower 16 bits of the given expression and stores it into
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the immediate operand field of the given instruction. For example:
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<SAMP>`addi lo(here - there), r5, r6'</SAMP>
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computes the difference between the address of labels 'here' and
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'there', takes the lower 16 bits of this difference and adds it to
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register 5, putting the result into register 6.
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<A NAME="IDX898"></A>
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<DT><CODE>hi()</CODE>
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<DD>
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Computes the higher 16 bits of the given expression and then adds the
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value of the most significant bit of the lower 16 bits of the expression
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and stores the result into the immediate operand field of the given
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instruction. For example the following code can be used to compute the
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address of the label 'here' and store it into register 6:
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<SAMP>`movhi hi(here), r0, r6'</SAMP>
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<SAMP>`movea lo(here), r6, r6'</SAMP>
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The reason for this special behaviour is that movea performs a sign
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extention on its immediate operand. So for example if the address of
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'here' was 0xFFFFFFFF then without the special behaviour of the hi()
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pseudo-op the movhi instruction would put 0xFFFF0000 into r6, then the
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movea instruction would takes its immediate operand, 0xFFFF, sign extend
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it to 32 bits, 0xFFFFFFFF, and then add it into r6 giving 0xFFFEFFFF
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which is wrong (the fifth nibble is E). With the hi() pseudo op adding
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in the top bit of the lo() pseudo op, the movhi instruction actually
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stores 0 into r6 (0xFFFF + 1 = 0x0000), so that the movea instruction
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stores 0xFFFFFFFF into r6 - the right value.
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<A NAME="IDX899"></A>
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<DT><CODE>sdaoff()</CODE>
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<DD>
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Computes the offset of the named variable from the start of the Small
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Data Area (whoes address is held in register 4, the GP register) and
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stores the result as a 16 bit signed value in the immediate operand
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field of the given instruction. For example:
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<SAMP>`ld.w sdaoff(_a_variable)[gp],r6'</SAMP>
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loads the contents of the location pointed to by the label '_a_variable'
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into register 6, provided that the label is located somewhere within +/-
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32K of the address held in the GP register. [Note the linker assumes
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that the GP register contains a fixed address set to the address of the
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label called '__gp'. This can either be set up automatically by the
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linker, or specifically set by using the <SAMP>`--defsym __gp=<value>'</SAMP>
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command line option].
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<A NAME="IDX900"></A>
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<DT><CODE>tdaoff()</CODE>
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<DD>
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Computes the offset of the named variable from the start of the Tiny
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Data Area (whoes address is held in register 30, the EP register) and
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stores the result as a
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7 or 8 bit unsigned value in the immediate
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operand field of the given instruction. For example:
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<SAMP>`sld.w tdaoff(_a_variable)[ep],r6'</SAMP>
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loads the contents of the location pointed to by the label '_a_variable'
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into register 6, provided that the label is located somewhere within +256
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bytes of the address held in the EP register. [Note the linker assumes
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that the EP register contains a fixed address set to the address of the
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label called '__ep'. This can either be set up automatically by the
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linker, or specifically set by using the <SAMP>`--defsym __ep=<value>'</SAMP>
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command line option].
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<A NAME="IDX901"></A>
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<DT><CODE>zdaoff()</CODE>
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<DD>
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Computes the offset of the named variable from address 0 and stores the
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result as a 16 bit signed value in the immediate operand field of the
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given instruction. For example:
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<SAMP>`movea zdaoff(_a_variable),zero,r6'</SAMP>
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puts the address of the label '_a_variable' into register 6, assuming
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that the label is somewhere within the first 32K of memory. (Strictly
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speaking it also possible to access the last 32K of memory as well, as
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the offsets are signed).
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</DL>
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<P>
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For information on the V850 instruction set, see <CITE>V850
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Family 32-/16-Bit single-Chip Microcontroller Architecture Manual</CITE> from NEC.
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Ltd.
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</P>
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<P>
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@raisesections
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</P>
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<P><HR><P>
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Go to the <A HREF="as_1.html">first</A>, <A HREF="as_23.html">previous</A>, <A HREF="as_25.html">next</A>, <A HREF="as_27.html">last</A> section, <A HREF="as_toc.html">table of contents</A>.
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</BODY>
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</HTML>
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