54 lines
3.0 KiB
HTML
54 lines
3.0 KiB
HTML
<html><!DOCTYPE HTML PUBLIC "-//IETF//DTD HTML 2.0//EN">
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<head>
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<title>80386 Programmer's Reference Manual -- Section 12.1</title>
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</head>
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<body>
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<b>up:</b> <a href="C12.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/C12.HTM">Chapter 12 -- Debugging</a><br>
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<b>prev:</b> <a href="C12.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/C12.HTM">Chapter 12 -- Debugging</a><br>
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<b>next:</b> <a href="S12_02.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/S12_02.HTM">12.2 Debug Registers</a>
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<p>
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<hr>
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<p>
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<h1>12.1 Debugging Features of the Architecture</h1>
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The features of the 80386 architecture that support debugging include:
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<dl>
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<dt>Reserved debug interrupt vector
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<dd>Permits processor to automatically invoke a debugger task or procedure when an event occurs that is of interest to the debugger.
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<dt>Four debug address registers
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<dd>Permit programmers to specify up to four addresses that the CPU will automatically monitor.
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<dt>Debug control register
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<dd>Allows programmers to selectively enable various debug conditions associated with the four debug addresses.
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<dt>Debug status register
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<dd>Helps debugger identify condition that caused debug exception.
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<dt>Trap bit of TSS (T-bit)
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<dd>Permits monitoring of task switches.
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<dt>Resume flag (RF) of flags register
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<dd>Allows an instruction to be restarted after a debug exception without immediately causing another debug exception due to the same condition.
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<dt>Single-step flag (TF)
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<dd>Allows complete monitoring of program flow by specifying whether the CPU should cause a debug exception with the execution of every instruction.
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<dt>Breakpoint instruction
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<dd>Permits debugger intervention at any point in program execution and aids debugging of debugger programs.
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<dt>Reserved interrupt vector for breakpoint exception
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<dd>Permits processor to automatically invoke a handler task or procedure upon encountering a breakpoint instruction.
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</dl>
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These features make it possible to invoke a debugger that is either a separate task or a procedure in the context of the current task. The debugger can be invoked under any of the following kinds of conditions:
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<ul>
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<li>Task switch to a specific task.
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<li>Execution of the breakpoint instruction.
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<li>Execution of every instruction.
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<li>Execution of any instruction at a given address.
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<li>Read or write of a byte, word, or doubleword at any specified address.
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<li>Write to a byte, word, or doubleword at any specified address.
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<li>Attempt to change a debug register.
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</ul>
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<p>
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<hr>
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<p><b>up:</b> <a href="C12.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/C12.HTM">Chapter 12 -- Debugging</a><br>
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<b>prev:</b> <a href="C12.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/C12.HTM">Chapter 12 -- Debugging</a><br>
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<b>next:</b> <a href="S12_02.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/S12_02.HTM">12.2 Debug Registers</a>
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</body>
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