40 lines
5.4 KiB
HTML
40 lines
5.4 KiB
HTML
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<title>80386 Programmer's Reference Manual -- Section 14.8</title>
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<b>up:</b> <a href="C14.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/C14.HTM">Chapter 14 -- 80386 Real-Address Mode</a><br>
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<b>prev:</b> <a href="S14_07.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/S14_07.HTM">14.7 Differences From 8086</a><br>
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<b>next:</b> <a href="C15.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/C15.HTM">Chapter 15 -- Virtual 8086 Mode</a>
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<hr>
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<p>
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<h1>14.8 Differences From 80286 Real-Address Mode</h1>
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The few differences that exist between 80386 real-address mode and 80286 real-address mode are not likely to affect any existing 80286 programs except possibly the system initialization procedures.
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<h2>14.8.1 Bus Lock</h2>
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The 80286 processor implements the bus lock function differently than the 80386. Programs that use forms of memory locking specific to the 80286 may not execute properly if transported to a specific application of the 80386.
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<p>The <a href="LOCK.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/LOCK.HTM">LOCK</a> prefix and its corresponding output signal should only be used to prevent other bus masters from interrupting a data movement operation. <a href="LOCK.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/LOCK.HTM">LOCK</a> may only be used with the following 80386 instructions when they modify memory. An undefined-opcode exception results from using <a href="LOCK.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/LOCK.HTM">LOCK</a> before any other instruction.
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<ul>
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<li>Bit test and change: <a href="BTS.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/BTS.HTM">BTS</a>, <a href="BTR.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/BTR.HTM">BTR</a>, <a href="BTC.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/BTC.HTM">BTC</a>.
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<li>Exchange: <a href="XCHG.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/XCHG.HTM">XCHG</a>.
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<li>One-operand arithmetic and logical: <a href="INC.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/INC.HTM">INC</a>, <a href="DEC.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/DEC.HTM">DEC</a>, <a href="NOT.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/NOT.HTM">NOT</a>, and <a href="NEG.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/NEG.HTM">NEG</a>.
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<li>Two-operand arithmetic and logical: <a href="ADD.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/ADD.HTM">ADD</a>, <a href="ADC.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/ADC.HTM">ADC</a>, <a href="SUB.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/SUB.HTM">SUB</a>, <a href="SBB.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/SBB.HTM">SBB</a>, <a href="AND.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/AND.HTM">AND</a>, <a href="OR.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/OR.HTM">OR</a>, <a href="XOR.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/XOR.HTM">XOR</a>.
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</ul>
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A locked instruction is guaranteed to lock only the area of memory defined by the destination operand, but may lock a larger memory area. For example, typical 8086 and 80286 configurations lock the entire physical memory space. With the 80386, the defined area of memory is guranteed to be locked against access by a processor executing a locked instruction on exactly the same memory area, i.e., an operand with identical starting address and identical length.
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<h2>14.8.2 Location of First Instruction</h2>
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The starting location is 0FFFFFFF0H (sixteen bytes from end of 32-bit address space) on the 80386 rather than 0FFFFF0H (sixteen bytes from end of 24-bit address space) as on the 80286. Many 80286 ROM initialization programs will work correctly in this new environment. Others can be made to work correctly with external hardware that redefines the signals on A{31-20}.
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<h2>14.8.3 Initial Values of General Registers</h2>
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On the 80386, certain general registers may contain different values after RESET than on the 80286. This should not cause compatibility problems, because the content of 8086 registers after RESET is undefined. If self-test is requested during the reset sequence and errors are detected in the 80386 unit, EAX will contain a nonzero value. EDX contains the component and revision identifier . Refer to <a href="C10.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/C10.HTM">Chapter 10</a> for more information .
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<h2>14.8.4 MSW Initialization</h2>
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The 80286 initializes the MSW register to FFF0H, but the 80386 initializes this register to 0000H. This difference should have no effect, because the bits that are different are undefined on the 80286. Programs that read the value of the MSW will behave differently on the 80386 only if they depend on the setting of the undefined, high-order bits.
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<p>
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<hr>
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<p><b>up:</b> <a href="C14.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/C14.HTM">Chapter 14 -- 80386 Real-Address Mode</a><br>
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<b>prev:</b> <a href="S14_07.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/S14_07.HTM">14.7 Differences From 8086</a><br>
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<b>next:</b> <a href="C15.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/C15.HTM">Chapter 15 -- Virtual 8086 Mode</a>
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</body>
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