39 lines
5.1 KiB
HTML
39 lines
5.1 KiB
HTML
<html><!DOCTYPE HTML PUBLIC "-//IETF//DTD HTML 2.0//EN">
|
|
<html>
|
|
|
|
<head>
|
|
<title>80386 Programmer's Reference Manual -- Section 15.4</title>
|
|
</head>
|
|
|
|
<body>
|
|
<b>up:</b> <a href="C15.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/C15.HTM">Chapter 15 -- Virtual 8086 Mode</a><br>
|
|
<b>prev:</b> <a href="S15_03.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/S15_03.HTM">15.3 Entering and Leaving V86 Mode</a><br>
|
|
<b>next:</b> <a href="S15_05.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/S15_05.HTM">15.5 Virtual I/O</a>
|
|
<p>
|
|
<hr>
|
|
<p>
|
|
<h1>15.4 Additional Sensitive Instructions</h1>
|
|
When the 80386 is executing in V86 mode, the instructions <a href="PUSHF.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/PUSHF.HTM">PUSHF</a>, <a href="POPF.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/POPF.HTM">POPF</a>, <a href="INT.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/INT.HTM">INT n</a>, and <a href="IRET.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/IRET.HTM">IRET</a> are sensitive to IOPL. The instructions <a href="IN.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/IN.HTM">IN</a>, <a href="INS.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/INS.HTM">INS</a>, <a href="OUT.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/OUT.HTM">OUT</a>, and <a href="OUTS.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/OUTS.HTM">OUTS</a>, which are ordinarily sensitive in protected mode, are not sensitive in V86 mode. Following is a complete list of instructions that are sensitive in V86 mode:
|
|
<ul>
|
|
<li><a href="CLI.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/CLI.HTM">CLI</a> -- Clear Interrupt-Enable Flag
|
|
<li><a href="STI.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/STI.HTM">STI</a> -- Set Interrupt-Enable Flag
|
|
<li><a href="LOCK.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/LOCK.HTM">LOCK</a> -- Assert Bus-Lock Signal
|
|
<li><a href="PUSHF.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/PUSHF.HTM">PUSHF</a> -- Push Flags
|
|
<li><a href="POPF.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/POPF.HTM">POPF</a> -- Pop Flags
|
|
<li><a href="INT.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/INT.HTM">INT n</a> -- Software Interrupt
|
|
<li><a href="RET.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/RET.HTM">RET</a> -- Interrupt Return
|
|
</ul>
|
|
CPL is always three in V86 mode; therefore, if IOPL < 3, these instructions will trigger a general-protection exceptions. These instructions are made sensitive so that their functions can be simulated by the V86 monitor.
|
|
<h2>15.4.1 Emulating 8086 Operating System Calls</h2>
|
|
<a href="INT.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/INT.HTM">INT n</a> is sensitive so that the V86 monitor can intercept calls to the 8086 OS. Many 8086 operating systems are called by pushing parameters onto the stack, then executing an <a href="INT.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/INT.HTM">INT n</a> instruction. If IOPL < 3, <a href="INT.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/INT.HTM">INT n</a> instructions will be intercepted by the V86 monitor. The V86 monitor can then emulate the function of the 8086 operating system or reflect the interrupt back to the 8086 operating system in V86 mode.
|
|
<h2>15.4.2 Virtualizing the Interrupt-Enable Flag</h2>
|
|
When the processor is executing 8086 code in a V86 task, the instructions <a href="PUSHF.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/PUSHF.HTM">PUSHF</a>, <a href="POPF.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/POPF.HTM">POPF</a>, and <a href="IRET.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/IRET.HTM">IRET</a> are sensitive to IOPL so that the V86 monitor can control changes to the interrupt-enable flag (IF). Other instructions that affect IF (<a href="STI.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/STI.HTM">STI</a> and <a href="CLI.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/CLI.HTM">CLI</a>) are IOPL sensitive both in 8086 code and in 80386/80386 code.
|
|
<p>Many 8086 programs that were designed to execute on single-task systems set and clear IF to control interrupts. However, when these same programs are executed in a multitasking environment, such control of IF can be disruptive. If IOPL is less than three, all instructions that change or interrogate IF will trap to the V86 monitor. The V86 monitor can then control IF in a manner that both suits the needs of the larger environment and is transparent to the 8086 program.
|
|
<p>
|
|
<hr>
|
|
<p><b>up:</b> <a href="C15.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/C15.HTM">Chapter 15 -- Virtual 8086 Mode</a><br>
|
|
<b>prev:</b> <a href="S15_03.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/S15_03.HTM">15.3 Entering and Leaving V86 Mode</a><br>
|
|
<b>next:</b> <a href="S15_05.HTM" tppabs="http://webster.cs.ucr.edu/Page_TechDocs/Doc386/S15_05.HTM">15.5 Virtual I/O</a>
|
|
</body>
|
|
|