118 lines
3.8 KiB
HTML
118 lines
3.8 KiB
HTML
<HTML>
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<HEAD>
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<!-- This HTML file has been created by texi2html 1.52
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from ../texi/ld.texinfo on 7 November 1998 -->
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<TITLE>Using LD, the GNU linker - Machine Dependent Features</TITLE>
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</HEAD>
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<BODY>
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Go to the <A HREF="ld_1.html">first</A>, <A HREF="ld_3.html">previous</A>, <A HREF="ld_5.html">next</A>, <A HREF="ld_8.html">last</A> section, <A HREF="ld_toc.html">table of contents</A>.
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<P><HR><P>
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<H1><A NAME="SEC27" HREF="ld_toc.html#TOC27">Machine Dependent Features</A></H1>
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<P>
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<A NAME="IDX359"></A>
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<CODE>ld</CODE> has additional features on some platforms; the following
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sections describe them. Machines where <CODE>ld</CODE> has no additional
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functionality are not listed.
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</P>
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<H2><A NAME="SEC28" HREF="ld_toc.html#TOC28"><CODE>ld</CODE> and the H8/300</A></H2>
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<P>
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<A NAME="IDX360"></A>
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For the H8/300, <CODE>ld</CODE> can perform these global optimizations when
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you specify the <SAMP>`--relax'</SAMP> command-line option.
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</P>
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<DL COMPACT>
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<DT><EM>relaxing address modes</EM>
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<DD>
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<A NAME="IDX361"></A>
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<CODE>ld</CODE> finds all <CODE>jsr</CODE> and <CODE>jmp</CODE> instructions whose
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targets are within eight bits, and turns them into eight-bit
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program-counter relative <CODE>bsr</CODE> and <CODE>bra</CODE> instructions,
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respectively.
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<A NAME="IDX362"></A>
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<DT><EM>synthesizing instructions</EM>
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<DD>
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<CODE>ld</CODE> finds all <CODE>mov.b</CODE> instructions which use the
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sixteen-bit absolute address form, but refer to the top
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page of memory, and changes them to use the eight-bit address form.
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(That is: the linker turns <SAMP>`mov.b <CODE>@</CODE><VAR>aa</VAR>:16'</SAMP> into
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<SAMP>`mov.b <CODE>@</CODE><VAR>aa</VAR>:8'</SAMP> whenever the address <VAR>aa</VAR> is in the
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top page of memory).
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</DL>
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<H2><A NAME="SEC29" HREF="ld_toc.html#TOC29"><CODE>ld</CODE> and the Intel 960 family</A></H2>
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<P>
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<A NAME="IDX363"></A>
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</P>
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<P>
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You can use the <SAMP>`-A<VAR>architecture</VAR>'</SAMP> command line option to
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specify one of the two-letter names identifying members of the 960
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family; the option specifies the desired output target, and warns of any
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incompatible instructions in the input files. It also modifies the
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linker's search strategy for archive libraries, to support the use of
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libraries specific to each particular architecture, by including in the
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search loop names suffixed with the string identifying the architecture.
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</P>
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<P>
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For example, if your <CODE>ld</CODE> command line included <SAMP>`-ACA'</SAMP> as
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well as <SAMP>`-ltry'</SAMP>, the linker would look (in its built-in search
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paths, and in any paths you specify with <SAMP>`-L'</SAMP>) for a library with
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the names
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</P>
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<PRE>
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try
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libtry.a
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tryca
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libtryca.a
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</PRE>
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<P>
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The first two possibilities would be considered in any event; the last
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two are due to the use of <SAMP>`-ACA'</SAMP>.
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</P>
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<P>
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You can meaningfully use <SAMP>`-A'</SAMP> more than once on a command line, since
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the 960 architecture family allows combination of target architectures; each
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use will add another pair of name variants to search for when <SAMP>`-l'</SAMP>
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specifies a library.
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</P>
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<P>
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<A NAME="IDX364"></A>
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<A NAME="IDX365"></A>
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<CODE>ld</CODE> supports the <SAMP>`--relax'</SAMP> option for the i960 family. If
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you specify <SAMP>`--relax'</SAMP>, <CODE>ld</CODE> finds all <CODE>balx</CODE> and
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<CODE>calx</CODE> instructions whose targets are within 24 bits, and turns
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them into 24-bit program-counter relative <CODE>bal</CODE> and <CODE>cal</CODE>
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instructions, respectively. <CODE>ld</CODE> also turns <CODE>cal</CODE>
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instructions into <CODE>bal</CODE> instructions when it determines that the
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target subroutine is a leaf routine (that is, the target subroutine does
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not itself call any subroutines).
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</P>
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<P><HR><P>
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Go to the <A HREF="ld_1.html">first</A>, <A HREF="ld_3.html">previous</A>, <A HREF="ld_5.html">next</A>, <A HREF="ld_8.html">last</A> section, <A HREF="ld_toc.html">table of contents</A>.
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</BODY>
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</HTML>
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