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599 lines
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HTML
<HTML>
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<HEAD>
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<!-- This HTML file has been created by texi2html 1.54
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from ../texi/make.texinfo on 19 July 2000 -->
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<TITLE>GNU make - Writing Makefiles</TITLE>
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<link href="make_4.html" rel=Next>
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<link href="make_2.html" rel=Previous>
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<link href="make_toc.html" rel=ToC>
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</HEAD>
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<BODY>
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<p>Go to the <A HREF="make_1.html">first</A>, <A HREF="make_2.html">previous</A>, <A HREF="make_4.html">next</A>, <A HREF="make_19.html">last</A> section, <A HREF="make_toc.html">table of contents</A>.
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<P><HR><P>
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<H1><A NAME="SEC12" HREF="make_toc.html#TOC12">Writing Makefiles</A></H1>
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<P>
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<A NAME="IDX48"></A>
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The information that tells <CODE>make</CODE> how to recompile a system comes from
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reading a data base called the <STRONG>makefile</STRONG>.
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</P>
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<H2><A NAME="SEC13" HREF="make_toc.html#TOC13">What Makefiles Contain</A></H2>
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<P>
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Makefiles contain five kinds of things: <STRONG>explicit rules</STRONG>,
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<STRONG>implicit rules</STRONG>, <STRONG>variable definitions</STRONG>, <STRONG>directives</STRONG>,
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and <STRONG>comments</STRONG>. Rules, variables, and directives are described at
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length in later chapters.
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</P>
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<UL>
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<LI>
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<A NAME="IDX49"></A>
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<A NAME="IDX50"></A>
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An <STRONG>explicit rule</STRONG> says when and how to remake one or more files,
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called the rule's targets. It lists the other files that the targets
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depend on, call the <STRONG>prerequisites</STRONG> of the target, and may also give
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commands to use to create or update the targets. See section <A HREF="make_4.html#SEC20">Writing Rules</A>.
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<A NAME="IDX51"></A>
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<A NAME="IDX52"></A>
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<LI>
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An <STRONG>implicit rule</STRONG> says when and how to remake a class of files
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based on their names. It describes how a target may depend on a file
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with a name similar to the target and gives commands to create or
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update such a target. See section <A HREF="make_10.html#SEC93">Using Implicit Rules</A>.
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<A NAME="IDX53"></A>
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<LI>
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A <STRONG>variable definition</STRONG> is a line that specifies a text string
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value for a variable that can be substituted into the text later. The
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simple makefile example shows a variable definition for <CODE>objects</CODE>
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as a list of all object files (see section <A HREF="make_2.html#SEC8">Variables Make Makefiles Simpler</A>).
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<A NAME="IDX54"></A>
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<LI>
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A <STRONG>directive</STRONG> is a command for <CODE>make</CODE> to do something special while
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reading the makefile. These include:
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<UL>
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<LI>
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Reading another makefile (see section <A HREF="make_3.html#SEC15">Including Other Makefiles</A>).
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<LI>
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Deciding (based on the values of variables) whether to use or
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ignore a part of the makefile (see section <A HREF="make_7.html#SEC71">Conditional Parts of Makefiles</A>).
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<LI>
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Defining a variable from a verbatim string containing multiple lines
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(see section <A HREF="make_6.html#SEC67">Defining Variables Verbatim</A>).
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</UL>
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<A NAME="IDX55"></A>
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<A NAME="IDX56"></A>
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<LI>
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<SAMP>`#'</SAMP> in a line of a makefile starts a <STRONG>comment</STRONG>. It and the rest of
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the line are ignored, except that a trailing backslash not escaped by
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another backslash will continue the comment across multiple lines.
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Comments may appear on any of the lines in the makefile, except within a
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<CODE>define</CODE> directive, and perhaps within commands (where the shell
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decides what is a comment). A line containing just a comment (with
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perhaps spaces before it) is effectively blank, and is ignored.</UL>
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<H2><A NAME="SEC14" HREF="make_toc.html#TOC14">What Name to Give Your Makefile</A></H2>
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<P>
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<A NAME="IDX57"></A>
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<A NAME="IDX58"></A>
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<A NAME="IDX59"></A>
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<A NAME="IDX60"></A>
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</P>
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<P>
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By default, when <CODE>make</CODE> looks for the makefile, it tries the
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following names, in order: <TT>`GNUmakefile'</TT>, <TT>`makefile'</TT>
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and <TT>`Makefile'</TT>.<A NAME="IDX61"></A>
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<A NAME="IDX62"></A>
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<A NAME="IDX63"></A>
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</P>
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<P>
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<A NAME="IDX64"></A>
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Normally you should call your makefile either <TT>`makefile'</TT> or
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<TT>`Makefile'</TT>. (We recommend <TT>`Makefile'</TT> because it appears
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prominently near the beginning of a directory listing, right near other
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important files such as <TT>`README'</TT>.) The first name checked,
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<TT>`GNUmakefile'</TT>, is not recommended for most makefiles. You should
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use this name if you have a makefile that is specific to GNU
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<CODE>make</CODE>, and will not be understood by other versions of
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<CODE>make</CODE>. Other <CODE>make</CODE> programs look for <TT>`makefile'</TT> and
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<TT>`Makefile'</TT>, but not <TT>`GNUmakefile'</TT>.
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</P>
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<P>
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If <CODE>make</CODE> finds none of these names, it does not use any makefile.
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Then you must specify a goal with a command argument, and <CODE>make</CODE>
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will attempt to figure out how to remake it using only its built-in
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implicit rules. See section <A HREF="make_10.html#SEC93">Using Implicit Rules</A>.
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</P>
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<P>
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<A NAME="IDX65"></A>
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<A NAME="IDX66"></A>
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<A NAME="IDX67"></A>
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If you want to use a nonstandard name for your makefile, you can specify
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the makefile name with the <SAMP>`-f'</SAMP> or <SAMP>`--file'</SAMP> option. The
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arguments <SAMP>`-f <VAR>name</VAR>'</SAMP> or <SAMP>`--file=<VAR>name</VAR>'</SAMP> tell
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<CODE>make</CODE> to read the file <VAR>name</VAR> as the makefile. If you use
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more than one <SAMP>`-f'</SAMP> or <SAMP>`--file'</SAMP> option, you can specify several
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makefiles. All the makefiles are effectively concatenated in the order
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specified. The default makefile names <TT>`GNUmakefile'</TT>,
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<TT>`makefile'</TT> and <TT>`Makefile'</TT> are not checked automatically if you
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specify <SAMP>`-f'</SAMP> or <SAMP>`--file'</SAMP>.<A NAME="IDX68"></A>
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<A NAME="IDX69"></A>
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<A NAME="IDX70"></A>
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<A NAME="IDX71"></A>
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</P>
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<H2><A NAME="SEC15" HREF="make_toc.html#TOC15">Including Other Makefiles</A></H2>
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<P>
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<A NAME="IDX72"></A>
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<A NAME="IDX73"></A>
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</P>
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<P>
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<A NAME="IDX74"></A>
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The <CODE>include</CODE> directive tells <CODE>make</CODE> to suspend reading the
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current makefile and read one or more other makefiles before continuing.
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The directive is a line in the makefile that looks like this:
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</P>
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<PRE>
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include <VAR>filenames</VAR>...
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</PRE>
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<P>
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<VAR>filenames</VAR> can contain shell file name patterns.
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<A NAME="IDX75"></A>
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<A NAME="IDX76"></A>
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<A NAME="IDX77"></A>
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</P>
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<P>
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Extra spaces are allowed and ignored at the beginning of the line, but
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a tab is not allowed. (If the line begins with a tab, it will be
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considered a command line.) Whitespace is required between
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<CODE>include</CODE> and the file names, and between file names; extra
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whitespace is ignored there and at the end of the directive. A
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comment starting with <SAMP>`#'</SAMP> is allowed at the end of the line. If
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the file names contain any variable or function references, they are
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expanded. See section <A HREF="make_6.html#SEC57">How to Use Variables</A>.
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</P>
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<P>
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For example, if you have three <TT>`.mk'</TT> files, <TT>`a.mk'</TT>,
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<TT>`b.mk'</TT>, and <TT>`c.mk'</TT>, and <CODE>$(bar)</CODE> expands to
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<CODE>bish bash</CODE>, then the following expression
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</P>
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<PRE>
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include foo *.mk $(bar)
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</PRE>
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<P>
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is equivalent to
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</P>
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<PRE>
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include foo a.mk b.mk c.mk bish bash
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</PRE>
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<P>
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When <CODE>make</CODE> processes an <CODE>include</CODE> directive, it suspends
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reading of the containing makefile and reads from each listed file in
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turn. When that is finished, <CODE>make</CODE> resumes reading the
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makefile in which the directive appears.
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</P>
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<P>
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One occasion for using <CODE>include</CODE> directives is when several programs,
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handled by individual makefiles in various directories, need to use a
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common set of variable definitions
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(see section <A HREF="make_6.html#SEC64">Setting Variables</A>) or pattern rules
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(see section <A HREF="make_10.html#SEC98">Defining and Redefining Pattern Rules</A>).
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</P>
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<P>
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Another such occasion is when you want to generate prerequisites from
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source files automatically; the prerequisites can be put in a file that
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is included by the main makefile. This practice is generally cleaner
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than that of somehow appending the prerequisites to the end of the main
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makefile as has been traditionally done with other versions of
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<CODE>make</CODE>. See section <A HREF="make_4.html#SEC43">Generating Prerequisites Automatically</A>.
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<A NAME="IDX78"></A>
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<A NAME="IDX79"></A>
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<A NAME="IDX80"></A>
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</P>
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<P>
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<A NAME="IDX81"></A>
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<A NAME="IDX82"></A>
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<A NAME="IDX83"></A>
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<A NAME="IDX84"></A>
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<A NAME="IDX85"></A>
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<A NAME="IDX86"></A>
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<A NAME="IDX87"></A>
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If the specified name does not start with a slash, and the file is not
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found in the current directory, several other directories are searched.
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First, any directories you have specified with the <SAMP>`-I'</SAMP> or
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<SAMP>`--include-dir'</SAMP> option are searched
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(see section <A HREF="make_9.html#SEC92">Summary of Options</A>).
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Then the following directories (if they exist)
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are searched, in this order:
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<TT>`<VAR>prefix</VAR>/include'</TT> (normally <TT>`/usr/local/include'</TT>
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<A NAME="DOCF1" HREF="make_foot.html#FOOT1">(1)</A>)
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<TT>`/usr/gnu/include'</TT>,
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<TT>`/usr/local/include'</TT>, <TT>`/usr/include'</TT>.
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</P>
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<P>
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If an included makefile cannot be found in any of these directories, a
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warning message is generated, but it is not an immediately fatal error;
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processing of the makefile containing the <CODE>include</CODE> continues.
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Once it has finished reading makefiles, <CODE>make</CODE> will try to remake
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any that are out of date or don't exist.
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See section <A HREF="make_3.html#SEC17">How Makefiles Are Remade</A>.
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Only after it has tried to find a way to remake a makefile and failed,
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will <CODE>make</CODE> diagnose the missing makefile as a fatal error.
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</P>
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<P>
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If you want <CODE>make</CODE> to simply ignore a makefile which does not exist
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and cannot be remade, with no error message, use the <CODE>-include</CODE>
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directive instead of <CODE>include</CODE>, like this:
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</P>
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<PRE>
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-include <VAR>filenames</VAR>...
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</PRE>
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<P>
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This is acts like <CODE>include</CODE> in every way except that there is no
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error (not even a warning) if any of the <VAR>filenames</VAR> do not exist.
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For compatibility with some other <CODE>make</CODE> implementations,
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<CODE>sinclude</CODE> is another name for <CODE>-include</CODE>.
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</P>
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<H2><A NAME="SEC16" HREF="make_toc.html#TOC16">The Variable <CODE>MAKEFILES</CODE></A></H2>
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<P>
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<A NAME="IDX88"></A>
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<A NAME="IDX89"></A>
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</P>
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<P>
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<A NAME="IDX90"></A>
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If the environment variable <CODE>MAKEFILES</CODE> is defined, <CODE>make</CODE>
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considers its value as a list of names (separated by whitespace) of
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additional makefiles to be read before the others. This works much like
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the <CODE>include</CODE> directive: various directories are searched for those
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files (see section <A HREF="make_3.html#SEC15">Including Other Makefiles</A>). In addition, the
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default goal is never taken from one of these makefiles and it is not an
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error if the files listed in <CODE>MAKEFILES</CODE> are not found.
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</P>
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<P>
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<A NAME="IDX91"></A>
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The main use of <CODE>MAKEFILES</CODE> is in communication between recursive
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invocations of <CODE>make</CODE> (see section <A HREF="make_5.html#SEC50">Recursive Use of <CODE>make</CODE></A>). It usually is not desirable to set the environment
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variable before a top-level invocation of <CODE>make</CODE>, because it is
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usually better not to mess with a makefile from outside. However, if
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you are running <CODE>make</CODE> without a specific makefile, a makefile in
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<CODE>MAKEFILES</CODE> can do useful things to help the built-in implicit
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rules work better, such as defining search paths (see section <A HREF="make_4.html#SEC26">Searching Directories for Prerequisites</A>).
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</P>
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<P>
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Some users are tempted to set <CODE>MAKEFILES</CODE> in the environment
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automatically on login, and program makefiles to expect this to be done.
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This is a very bad idea, because such makefiles will fail to work if run by
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anyone else. It is much better to write explicit <CODE>include</CODE> directives
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in the makefiles. See section <A HREF="make_3.html#SEC15">Including Other Makefiles</A>.
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</P>
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<H2><A NAME="SEC17" HREF="make_toc.html#TOC17">How Makefiles Are Remade</A></H2>
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<P>
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<A NAME="IDX92"></A>
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<A NAME="IDX93"></A>
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<A NAME="IDX94"></A>
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Sometimes makefiles can be remade from other files, such as RCS or SCCS
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files. If a makefile can be remade from other files, you probably want
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<CODE>make</CODE> to get an up-to-date version of the makefile to read in.
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</P>
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<P>
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To this end, after reading in all makefiles, <CODE>make</CODE> will consider
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each as a goal target and attempt to update it. If a makefile has a
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rule which says how to update it (found either in that very makefile or
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in another one) or if an implicit rule applies to it (see section <A HREF="make_10.html#SEC93">Using Implicit Rules</A>), it will be updated if necessary. After
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all makefiles have been checked, if any have actually been changed,
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<CODE>make</CODE> starts with a clean slate and reads all the makefiles over
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again. (It will also attempt to update each of them over again, but
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normally this will not change them again, since they are already up to
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date.)
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</P>
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<P>
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If you know that one or more of your makefiles cannot be remade and you
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want to keep <CODE>make</CODE> from performing an implicit rule search on
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them, perhaps for efficiency reasons, you can use any normal method of
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preventing implicit rule lookup to do so. For example, you can write an
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explicit rule with the makefile as the target, and an empty command
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string (see section <A HREF="make_5.html#SEC56">Using Empty Commands</A>).
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</P>
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<P>
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If the makefiles specify a double-colon rule to remake a file with
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commands but no prerequisites, that file will always be remade
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(see section <A HREF="make_4.html#SEC42">Double-Colon Rules</A>). In the case of makefiles, a makefile that has a
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double-colon rule with commands but no prerequisites will be remade every
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time <CODE>make</CODE> is run, and then again after <CODE>make</CODE> starts over
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and reads the makefiles in again. This would cause an infinite loop:
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<CODE>make</CODE> would constantly remake the makefile, and never do anything
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else. So, to avoid this, <CODE>make</CODE> will <STRONG>not</STRONG> attempt to
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remake makefiles which are specified as targets of a double-colon rule
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with commands but no prerequisites.
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</P>
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<P>
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If you do not specify any makefiles to be read with <SAMP>`-f'</SAMP> or
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<SAMP>`--file'</SAMP> options, <CODE>make</CODE> will try the default makefile names;
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see section <A HREF="make_3.html#SEC14">What Name to Give Your Makefile</A>. Unlike
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makefiles explicitly requested with <SAMP>`-f'</SAMP> or <SAMP>`--file'</SAMP> options,
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<CODE>make</CODE> is not certain that these makefiles should exist. However,
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if a default makefile does not exist but can be created by running
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<CODE>make</CODE> rules, you probably want the rules to be run so that the
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makefile can be used.
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</P>
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<P>
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Therefore, if none of the default makefiles exists, <CODE>make</CODE> will try
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to make each of them in the same order in which they are searched for
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(see section <A HREF="make_3.html#SEC14">What Name to Give Your Makefile</A>)
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until it succeeds in making one, or it runs out of names to try. Note
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that it is not an error if <CODE>make</CODE> cannot find or make any makefile;
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a makefile is not always necessary.
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</P>
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<P>
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When you use the <SAMP>`-t'</SAMP> or <SAMP>`--touch'</SAMP> option
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(see section <A HREF="make_9.html#SEC88">Instead of Executing the Commands</A>),
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you would not want to use an out-of-date makefile to decide which
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targets to touch. So the <SAMP>`-t'</SAMP> option has no effect on updating
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makefiles; they are really updated even if <SAMP>`-t'</SAMP> is specified.
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Likewise, <SAMP>`-q'</SAMP> (or <SAMP>`--question'</SAMP>) and <SAMP>`-n'</SAMP> (or
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<SAMP>`--just-print'</SAMP>) do not prevent updating of makefiles, because an
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out-of-date makefile would result in the wrong output for other targets.
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Thus, <SAMP>`make -f mfile -n foo'</SAMP> will update <TT>`mfile'</TT>, read it in,
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and then print the commands to update <TT>`foo'</TT> and its prerequisites
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without running them. The commands printed for <TT>`foo'</TT> will be those
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specified in the updated contents of <TT>`mfile'</TT>.
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</P>
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<P>
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However, on occasion you might actually wish to prevent updating of even
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the makefiles. You can do this by specifying the makefiles as goals in
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the command line as well as specifying them as makefiles. When the
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makefile name is specified explicitly as a goal, the options <SAMP>`-t'</SAMP>
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and so on do apply to them.
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</P>
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<P>
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Thus, <SAMP>`make -f mfile -n mfile foo'</SAMP> would read the makefile
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<TT>`mfile'</TT>, print the commands needed to update it without actually
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running them, and then print the commands needed to update <TT>`foo'</TT>
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without running them. The commands for <TT>`foo'</TT> will be those
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specified by the existing contents of <TT>`mfile'</TT>.
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</P>
|
|
|
|
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|
<H2><A NAME="SEC18" HREF="make_toc.html#TOC18">Overriding Part of Another Makefile</A></H2>
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|
|
|
<P>
|
|
<A NAME="IDX95"></A>
|
|
<A NAME="IDX96"></A>
|
|
Sometimes it is useful to have a makefile that is mostly just like
|
|
another makefile. You can often use the <SAMP>`include'</SAMP> directive to
|
|
include one in the other, and add more targets or variable definitions.
|
|
However, if the two makefiles give different commands for the same
|
|
target, <CODE>make</CODE> will not let you just do this. But there is another way.
|
|
|
|
</P>
|
|
<P>
|
|
<A NAME="IDX97"></A>
|
|
In the containing makefile (the one that wants to include the other),
|
|
you can use a match-anything pattern rule to say that to remake any
|
|
target that cannot be made from the information in the containing
|
|
makefile, <CODE>make</CODE> should look in another makefile.
|
|
See section <A HREF="make_10.html#SEC98">Defining and Redefining Pattern Rules</A>, for more information on pattern rules.
|
|
|
|
</P>
|
|
<P>
|
|
For example, if you have a makefile called <TT>`Makefile'</TT> that says how
|
|
to make the target <SAMP>`foo'</SAMP> (and other targets), you can write a
|
|
makefile called <TT>`GNUmakefile'</TT> that contains:
|
|
|
|
</P>
|
|
|
|
<PRE>
|
|
foo:
|
|
frobnicate > foo
|
|
|
|
%: force
|
|
@$(MAKE) -f Makefile $@
|
|
force: ;
|
|
</PRE>
|
|
|
|
<P>
|
|
If you say <SAMP>`make foo'</SAMP>, <CODE>make</CODE> will find <TT>`GNUmakefile'</TT>,
|
|
read it, and see that to make <TT>`foo'</TT>, it needs to run the command
|
|
<SAMP>`frobnicate > foo'</SAMP>. If you say <SAMP>`make bar'</SAMP>, <CODE>make</CODE> will
|
|
find no way to make <TT>`bar'</TT> in <TT>`GNUmakefile'</TT>, so it will use the
|
|
commands from the pattern rule: <SAMP>`make -f Makefile bar'</SAMP>. If
|
|
<TT>`Makefile'</TT> provides a rule for updating <TT>`bar'</TT>, <CODE>make</CODE>
|
|
will apply the rule. And likewise for any other target that
|
|
<TT>`GNUmakefile'</TT> does not say how to make.
|
|
|
|
</P>
|
|
<P>
|
|
The way this works is that the pattern rule has a pattern of just
|
|
<SAMP>`%'</SAMP>, so it matches any target whatever. The rule specifies a
|
|
prerequisite <TT>`force'</TT>, to guarantee that the commands will be run even
|
|
if the target file already exists. We give <TT>`force'</TT> target empty
|
|
commands to prevent <CODE>make</CODE> from searching for an implicit rule to
|
|
build it--otherwise it would apply the same match-anything rule to
|
|
<TT>`force'</TT> itself and create a prerequisite loop!
|
|
|
|
</P>
|
|
|
|
|
|
<H2><A NAME="SEC19" HREF="make_toc.html#TOC19">How <CODE>make</CODE> Reads a Makefile</A></H2>
|
|
<P>
|
|
<A NAME="IDX98"></A>
|
|
<A NAME="IDX99"></A>
|
|
|
|
</P>
|
|
<P>
|
|
GNU <CODE>make</CODE> does its work in two distinct phases. During the first
|
|
phase it reads all the makefiles, included makefiles, etc. and
|
|
internalizes all the variables and their values, implicit and explicit
|
|
rules, and constructs a dependency graph of all the targets and their
|
|
prerequisites. During the second phase, <CODE>make</CODE> uses these internal
|
|
structures to determine what targets will need to be rebuilt and to
|
|
invoke the rules necessary to do so.
|
|
|
|
</P>
|
|
<P>
|
|
It's important to understand this two-phase approach because it has a
|
|
direct impact on how variable and function expansion happens; this is
|
|
often a source of some confusion when writing makefiles. Here we will
|
|
present a summary of the phases in which expansion happens for different
|
|
constructs within the makefile. We say that expansion is
|
|
<STRONG>immediate</STRONG> if it happens during the first phase: in this case
|
|
<CODE>make</CODE> will expand any variables or functions in that section of a
|
|
construct as the makefile is parsed. We say that expansion is
|
|
<STRONG>deferred</STRONG> if expansion is not performed immediately. Expansion of
|
|
deferred construct is not performed until either the construct appears
|
|
later in an immediate context, or until the second phase.
|
|
|
|
</P>
|
|
<P>
|
|
You may not be familiar with some of these constructs yet. You can
|
|
reference this section as you become familiar with them, in later
|
|
chapters.
|
|
|
|
</P>
|
|
|
|
<H3>Variable Assignment</H3>
|
|
<P>
|
|
<A NAME="IDX100"></A>
|
|
<A NAME="IDX101"></A>
|
|
<A NAME="IDX102"></A>
|
|
<A NAME="IDX103"></A>
|
|
<A NAME="IDX104"></A>
|
|
|
|
</P>
|
|
<P>
|
|
Variable definitions are parsed as follows:
|
|
|
|
</P>
|
|
|
|
<PRE>
|
|
<VAR>immediate</VAR> = <VAR>deferred</VAR>
|
|
<VAR>immediate</VAR> ?= <VAR>deferred</VAR>
|
|
<VAR>immediate</VAR> := <VAR>immediate</VAR>
|
|
<VAR>immediate</VAR> += <VAR>deferred</VAR> or <VAR>immediate</VAR>
|
|
|
|
define <VAR>immediate</VAR>
|
|
<VAR>deferred</VAR>
|
|
endef
|
|
</PRE>
|
|
|
|
<P>
|
|
For the append operator, <SAMP>`+='</SAMP>, the right-hand side is considered
|
|
immediate if the variable was previously set as a simple variable
|
|
(<SAMP>`:='</SAMP>), and deferred otherwise.
|
|
|
|
</P>
|
|
|
|
<H3>Conditional Syntax</H3>
|
|
<P>
|
|
<A NAME="IDX105"></A>
|
|
<A NAME="IDX106"></A>
|
|
<A NAME="IDX107"></A>
|
|
<A NAME="IDX108"></A>
|
|
|
|
</P>
|
|
<P>
|
|
All instances of conditional syntax are parsed immediately, in their
|
|
entirety; this includes the <CODE>ifdef</CODE>, <CODE>ifeq</CODE>, <CODE>ifndef</CODE>,
|
|
and <CODE>ifneq</CODE> forms.
|
|
|
|
</P>
|
|
|
|
<H3>Rule Definition</H3>
|
|
<P>
|
|
<A NAME="IDX109"></A>
|
|
<A NAME="IDX110"></A>
|
|
<A NAME="IDX111"></A>
|
|
<A NAME="IDX112"></A>
|
|
<A NAME="IDX113"></A>
|
|
|
|
</P>
|
|
<P>
|
|
A rule is always expanded the same way, regardless of the form:
|
|
|
|
</P>
|
|
|
|
<PRE>
|
|
<VAR>immediate</VAR> : <VAR>immediate</VAR> ; <VAR>deferred</VAR>
|
|
<VAR>deferred</VAR>
|
|
</PRE>
|
|
|
|
<P>
|
|
That is, the target and prerequisite sections are expanded immediately,
|
|
and the commands used to construct the target are always deferred. This
|
|
general rule is true for explicit rules, pattern rules, suffix rules,
|
|
static pattern rules, and simple prerequisite definitions.
|
|
|
|
</P>
|
|
<P><HR><P>
|
|
<p>Go to the <A HREF="make_1.html">first</A>, <A HREF="make_2.html">previous</A>, <A HREF="make_4.html">next</A>, <A HREF="make_19.html">last</A> section, <A HREF="make_toc.html">table of contents</A>.
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